Fast and Lossless Graph Division Method for Layout Decomposition Using SPQR-Tree Wai-Shing Luk Huiping Huang State Key Laboratory of ASIC & System Cadence Shanghai Inc., Shanghai, P. R. China Fudan University, Shanghai, P. R. China Email: [email protected] Email: [email protected] Abstract—Double patterning lithography is the most likely solution for or nearly planar. However, the ILP approach is known to be time 32nm and below process nodes due to its cost effectiveness. To enable consuming. To reduce the problem size, graph partitioning techniques this technique, layout decomposition is applied to split a layout into have been proposed to partition a large layout into smaller pieces, two non-conflicting patterns. Nevertheless, this problem is NP-hard in general, especially for layouts with random logic. Thus, high quality such as a modified FM algorithm [10]. However, the quality of results are hard to be achieved in reasonable time. Previously, several results (QoR) is not guaranteed in this kind of methods. On the graph partitioning techniques have been presented in order to speed up other hand, one can observe that if the underlying conflict graph has the process, with the tradeoff of the quality of results (QoR). We propose biconnected components, each of them can be solved independently a graph division method that does not have this deficiency. First, we start with a conflict graph derived from a layout. Based on a data structure without sacrificing any QoR [6]–[8], [11]. Usually significant speedup named SPQR-tree, the graph is divided into its triconnected components can be observed when this method is applied. Thus, it is reasonable to in linear time. The solutions of these components are then combined in a ask if we could further divide each biconnected component in order way that no QoR is lost. Thus, we call this method a ”lossless” method. to achieve even better speedup without any QoR lost. In this paper, Experimental results show that the proposed method can achieve 5X we attempt to answer this question with the investigation of a data speedup without sacrificing any QoR. structure named SPQR-tree [12]. I. INTRODUCTION SPQR-tree has been successfully applied to the graph drawing Double patterning lithography (DPL) [1] is the most likely solution applications [13]. Nevertheless, it is still little known in the EDA for 32nm and below process nodes for large volume chip production field. One remarkable result of SPQR-tree is that a biconnected graph due to its cost effectiveness. The idea of the technique is rather can be divided into its triconnected components in linear time with simple: instead of exposing the photoresist layer once under one the help of this data structure [14]. Thus, the division consumes photomask, it exposes the layer twice by splitting the mask into two only very small amount of time compared with the whole color parts, each with features half as dense. As a result, the pattern density assignment process. Furthermore, we derive an algorithm that merges in each exposure is decreased by half and hence resolution and the solutions of triconnected components in linear time. Inspired depth of focus (DOF) are improved. For example, as shown in Fig.1, by the deferred-merge embedding (DME) algorithm in clock tree the features in two different colors are printed in two separated synthesis [15], the algorithm consists of a bottom-up phase followed lithography steps. Although this idea is simple, the implementation by a top-down one. In the bottom-up phase, two potential solutions for of it remains challenging from both standpoints of fabrication [2], each triconnected component are computed. The decision of selecting [3] and design automation [4], [5]. which solution is deferred to the top-down phase. Consequently, our method enables us to accelerate the process without sacrificing any QoR. Thus, we call this method a ”lossless” method. In addition, this method does not contain any tuning parameters. It is flexible enough to be integrated into any layout decomposition framework. The rest of this paper is organized as follows. In Section II, we describe the problem formulation of the layout decomposition. A brief Fig. 1. Double patterning: the red features are printed in one lithography introduction of SPQR-tree is given in Section III. After that, the graph step, and the green ones in another lithography step. division method is presented in Section IV. Experimental results are given in Section V. Finally, we give the conclusions and future work From the design automation point of view, one of the biggest suggestion in Section VI. Note that unless declared explicitly, all the challenges is that such layout decomposition problem is NP-hard in example layouts in the figures are taken from Nangate 45nm open general. High quality results are hard to be achieved in reasonable cell library which can be downloaded from http://www.nangate.com. time for full chip layouts. Nevertheless, high quality is desired because one single error in a feature could make the whole device II. PROBLEM FORMULATION fails. As it turns out, the problem is strongly related to the color Given a layout which is specified by features in polygonal shapes, assignment problem encountered in the alternating phase shifting features are first fractured into rectangles. Note that some rectangles mask technique [6]–[8]. Many innovative approaches have been may further be sliced into smaller pieces to resolve conflicts. Pro- proposed to tackle this problem, such as integer linear program viding that a set of rectangles is given, a conflict graph G = (V; E) (ILP) approach [5], [9] and graph-theoretic approach [6]–[8], [10]. is then constructed in which the set of vertices V represents the One of the advantages of the ILP approach is that it makes almost set of rectangles. Note that layout fracturing and node splitting will no assumption to the underlying conflict graph, whereas the graph- generate rectangles that touch with others. Touching rectangles are theoretic approach usually assumes that the conflict graph is sparse assumed not to be in conflict. Two non-touching rectangles are in 978-1-4244-8192-7/10/$26.00 ©2010 IEEE 112 e f b d h a c g Fig. 3. An example of a conflict graph with its triconnected components. Fig. 2. An example of a layout and its corresponding conflict graph. The fa; bg, fc; dg, fc; eg, fc; fg and fg; hg are separation pairs. blue lines represent edges with positive weights and the green ones represent edges with negative weights. components without affecting any QoR. A vertex is called a cut- vertex of a connected graph G if removing it will disconnect G. If no conflict if their minimum distance is less than a minimum coloring cut-vertex can be found in G, then the graph is called a biconnected spacing and they meet certain criteria. Conflicting rectangles should graph, and is denoted by G0 here. A division of G into its biconnected be assigned to different masks. Thus, for each pair of conflicting components can be performed in linear time by identifying the cut- rectangles, there is an edge with positive weight between the two vertices using a simple depth-first search. It can easily be shown that corresponding vertices. Moreover, two touching rectangles assigned the color assignment problem can be solved for each biconnected to different masks will create a stitch, which should be avoided as component separately without affecting any QoR [6]. possible [9]. Thus, for each pair of touching rectangles, there is an Similarly, a pair of vertices is called a separation pair of G0 if edge with negative weight between the two corresponding vertices, removing the pair of vertices will disconnect G0. For example, as so that same mask is preferred. An example of a layout and its shown in Fig. 3, removing either fa; bg, fc; dg, fc; eg, fc; fg or corresponding conflict graph is shown in Fig. 2. As shown in the fg; hg will disconnect the conflict graph. If no separation pair can figure, the blue lines represent the edges with positive weights and be found in G0, then it is called a triconnected graph. A division of G0 the green ones represent edges with negative weights. into its triconnected components can be performed by identifying the In this paper, we focus on the techniques where the conflict separation pairs in linear time with the help of SPQR-tree [14]. Each graph is assumed to be given. The color assignment problem is now tree node of SPQR-tree is associated with a triconnected component 0 formulated as follows: of G called skeleton, and is denoted as Gs. A skeleton represents a 0 • INSTANCE: Graph G = (V; E) and a function w : E 7! Z contraction of G based on a set of virtual edges. Each virtual edge 0 • SOLUTION: Disjoint vertex subsets V0 and V1 so that V0[V1 = represents a portion of G . A skeleton was classified into four types V and V0 \ V1 = ;. in the original paper, namely S (series), P (parallel), Q (trivial) and P • MINIMIZE: the total cost w(e) where Ec = f(u; v): R (rigid) [12]: e2Ec u; v 2 V0 or u; v 2 V1; (u; v) 2 Eg • Series: the skeleton is a cycle graph. We assign each disjoint vertex subset Vi with a distinct color and • Parallel: the skeleton contains only two vertices s and t, and k say that two vertices are in the same color if they belong to the same parallel edges between s and t where k ≥ 3. Vi. Without loss of generality, we may assume that G is a biconnected • Trivial: the skeleton contains only two vertices s and t, and two graph.