Symbols (AHDL) Page 1 of 3 Symbols See Also The symbols listed below have predefined meanings in AHDL. The following list includes symbols that are used as operators and comparators in Boolean expressions and as operators in arithmetic expressions. Symbol: Function: _ (underscore) Acts as user-defined, legal characters in symbolic names. (See Quoted & Unquoted Names for more information.) - (dash) Starts a VHDL-style comment, which extends to the end of the line. (See Comments & Documentation for more information.) / (forward slash) -- (two dashes) % (percent) Encloses AHDL-style comments. (See "Comments & Documentation" for more information.) ( ) (left & right z Enclose and define sequential group names. parentheses) z Enclose port names in Subdesign Sections and Function Prototype Statements. z Optionally enclose inputs and outputs of truth tables in Truth Table Statements. z Enclose bits and states of State Machine Declarations. z Enclose highest priority operations in Boolean and arithmetic expressions. z Enclose parameter definitions in Parameters Statements, Instance Declarations, and parameter names in Function Prototype Statements and in-line logic function references. z Optionally enclose the condition in an Assert Statement. z Enclose the arguments of evaluated functions in Define Statements. [ ] (left & right z Enclose the range of a single-range or dual-range group name. brackets) z Enclose a number in the name of a node that is part of a single- range or dual-range group. z Enclose a range in the name of a set of nodes that are part of a single-range or dual-range group. ' ' (single quotation Enclose quoted symbolic names. (See "Quoted & Unquoted Names" for marks) more information.) mk:@MSITStore:c:\altera\quartus41\bin\quartus.chm::/ahdl/ahdl_elements_symbols.htm 9/10/2004 Symbols (AHDL) Page 2 of 3 " " (double z Enclose strings in Title Statements, Parameters Statements, and quotation marks) Assert Statements. z Enclose a file name in Include Statements. z Enclose digits in non-decimal numbers. (period) z Separates symbolic names of logic function variables from port names. z Separates extensions from file names. .. (ellipsis) Separates the MSB from the LSB in ranges. ; (semicolon) Ends AHDL statements and sections. , (comma) Separates members of sequential groups and lists. : (colon) Separates symbolic names from types in declarations. = (equals) z Assigns default GND and VCC values to inputs in a Subdesign Section. z Assigns settings to options in an Options Statement. z Assigns a default value to a parameter in a Parameters Statement or an in-line logic function reference. z Assigns values to state machine states. z Assigns values in Boolean equations. z Connects a signal to a port in an in-line logic function reference that uses named port association. => (arrow) z Separates inputs from outputs in Truth Table Statements. z Separates WHEN clauses from Boolean expressions in Case Statements. + (plus) Addition operator - (minus) Subtraction operator == (two equal signs) Numeric or string equality operator ! (exclamation NOT operator point) != (exclamation Not equal to operator equals) > (greater than) Greater than comparator >= (greater than Greater than or equal to comparator equals) mk:@MSITStore:c:\altera\quartus41\bin\quartus.chm::/ahdl/ahdl_elements_symbols.htm 9/10/2004 Symbols (AHDL) Page 3 of 3 < (less than) Less than comparator <= (less than Less than or equal to comparator equals) & (ampersand) AND operator !& (exclamation NAND operator ampersand) $ (dollar sign) XOR operator !$ (exclamation XNOR operator dollar) # (pound sign) OR operator !# (exclamation NOR operator pound) ? (question mark) Ternary operator Back to Top mk:@MSITStore:c:\altera\quartus41\bin\quartus.chm::/ahdl/ahdl_elements_symbols.htm 9/10/2004.