Equations for DI4268 ()5− 29File 1()1− 6 Equation 1 EDITED BY MARTIN ROWE AND FRAN GRANVILLE Equations for DI4268 ()5− 29File 1()1− 6 R2 VVFB = OUTNOM , R2 + R1 Equations for DI4268 ()5− 29File 1()1− 6 Equation 1 designREADERSideas SOLVEquationE DESIGN2 PROBLEMS Equation 1 R2 VVFB = OUTNOM , R + R VOUTNOM 2 1 RR1= 2 1. R2 VVFBV=FB OUTNOM , Add margining capability DIs Inside R2 + R1 Equation 2 to a dc/dc converter Equations for DI4268 ()5− 29File 1()561− A 6 better approach to designing Equationan RTD3 interface with a spread- Brian Vasquez, Maxim Integrated Products, Dallas, TX sheet Equation 2 You can easily add margining converter’s feedback pin. The circuit in V Equation 1 58 ShuntRR regulator= OUTNOM monitors 1 . capability—that is, the ability Figure 1 assumes a high impedance. 1 2 battery voltage VFB to digitally adjust the output voltage— Assume that you want to add a 20% Equations for DI4268 ()56− 29File 1()1− 6 VOUTNOM 60 Power 1RR. 8V =supply meets automo1 . - to a dc/dc converter by making a single margining capability to the dc/dc con- RR1= 2 11 2 = 2 × R2. 0. 6V VFB connection to the circuit (Figure 1). verter’s output so that the Rmaximum,2 tive-transient-voltage specs EquationVVFB = sOUTNOM for DI4268 ()5− 29, File 1()1− 6 Equation 3 The dashed line in the figure shows nominal, and minimum outputR Rvoltages Equation 1 2 + 1 60 Locked-sync sine generator the connection. The extra IC is a two- would be 2.16, 1.8, and 1.44V, respec- covers three decades with low 2 Equation 3 or four-channel, I C (inter-integrated- tively. First, determine the necessary distortion Equation 1 circuit)-adjustable-current DS4402 or relationship between R1 and R2, which Equation 4 Equation 2 EWhat are your design problems DS4404 DAC. Because each DAC yields the nominal output whenR2 the cur- 1. 8V VVFB = OUTNOM , and solutions?RR1= 2 Publish1 them= 2 ×hereR2. output is 0 mA at power-up, the extra rent of the DS4404 DACR is 0+ mA:R 0. 6V circuitry is essentially transparent to 2 1 and receive $150! Send your R2 II= + I , 1. 8V the system until you write a command VV= , (1) RRD1Design 2 RR IdeasS4404 to edndesignideas@1 2 R . FB OUTNOM VOUTNOM 1= 2 = × 2 2 RR1= 2 R2+1R1. reedbusiness.com. 0. 6V using the I C bus. V For example, assume that the input whereEquation V is the 2 feedbackFB voltage and FB ETo see all of EDN's Design voltage is 3 to 5.5V; the output voltage V is the nominal output volt- Equation 5Equation 4 OUTNOM Ideas, visit www.edn.com/design is 1.8V, which is the desired nominal age. Solving for R , Equation 2 1 ideas. output voltage; and the feedback volt- Equation 3 Equation 4 VOUTNOM age is 0.6V. You can obtain the feed- RR1= 2 1. (2) II I , V IDDS4404 = IIRRRRD11= 2. 2 + S4404 back voltage from the dc/dc converter’s FB mumEquation outputs fvoltage:or DI4268 (5-29)File 1(7-12) data sheet; be sure to verify that it is For this example, VOUTNOM RR1= 2 1. II I , (4) within the output-voltage range that V RRD1= 2 + S4404 1. 8VFB the current DAC’s data sheet speci- RR 1 2 R . (3) where I isEquation the current5 through R , I Equation1= 2 3 = × 2 EquationR1s for DI4268 (5-29)File1 1R2(7-12) fies as sinking or sourcing voltage de- 0. 6V Equationis the current6 through R , and I is Equation 7 2 DS4404 pending on whether you are sinking or SummingEquation the 3currents at the feedback the currentEquation into the DAC.5 sourcing current. You should also ver- node derives the current to make the IDDS4404 = IIRR1 2. (5) ify the input impedance of the dc/dc output voltage increase to the maxi- Equation VV7 V 1. 8V I OUTMAXFB ; I FB , (6) EquationRR= V 4 1= 2 × R . R1 = I = II R.2 = 1CC 2 2 DDS4404R RR1 2 R 0. 6V V1 � V V2 1. 8V I = OUTMAXXFB � FB . whereDS4404 VOUTMAX is the maximum output RR1= 2 1= 2 × R2. Equation R6 R V voltage. 1 2 CC IIR3 =R40. + 6IV , RRD1 2 S4404 V �V V I = EquationOUTMA6XXFB � FB . (7) DS4404 DS4404 SDAEquation 4 2 R R OR TO I C MASTER OR 1 2 VIN V VV V OUT DS4402 SCL MICROPROCESSOR OUTMAXFB FB DC/DC- Equation 5 EquationYou can IsimplifyR81 = Equation 7 by solv; I-R2 = , CONVERTER I A0 2 R R R1 R1 Equation 4DETERMINES I C ing Equation 1 for R and 1then substi - 2 CIRCUIT IDS4404 A1 SLAVE ADDRESS 2 VVOUTMAXF B VFB FB OUT0 IIRRD1= 2 + I S4404, tuting, whichI yields: ; I , V R1 = R2 = FB FS0 Equation 8 R1 R2 I R I II . R2 2 DDS4404R= RRDE1TERMINE 2 S MAXIMUM VVOUTMAX� OUTNOM IIRRD1= 2 FS + I FUS4404LL-SCA, LE CURRENT I = . (8) DS4404 R Equation 5 FOR DS4404 1 In margin percentage, you can express Figure 1 The circuitry to the right of the dashed line adds margining capability. VV� IEquation 8 OUTMAXas: OUTNOM . Equation 5 DS4404 = Equation 6 R1 I = II . DDS4404 RR1 2 Equation 9 IDDS4404 = IIRR1 2. SEPTEMBER 18, 2008 | EDN 55 edn080529di42681 DIANE VV V I = OUTMAXFB ; I = FB , R1 R2 Equation 9 VMARGIN R1 R2 OUTNOM × Equation 6 IDS4404 = , R1 Equation 6 VMOUTNOM × ARGIN IDS4404 = , VVOUTMAXF B VFB R1 IR1 = ; IR2 = , R R 1 2Equation 10 VVOUTMAXF B VFB IR1 = ; IR2 = , R1 R2 Equation 10 VOUTNOM × MARGIN R1 = = IDS4404 V 1.. 8 × 0 2MARGIN OUTNOM × 720 . R1 = �3 = Ω = 0. 5I×DS104404 1.. 8 × 0 2 720 . 11 �3 = Ω Equation0. 5 ×10 Equation 11 R 720 R =1 = = 360Ω. 2 2 2 R 720 R =1 = = 360Ω. 2 2 2 Equation 12 Equation 12 V 31 1. 23 R REF FS = × = �3 × IFS 4 0. 5 ×10 V31 31 1. 23 R RE=F19,065 Ω ≈ 19 kΩ. FS =4 × = �3 × IFS 4 0. 5 ×10 31 =19,065 Ω ≈ 19 kΩ. 4 Equations for DI4268 (5-29)File 1(7-12) Equations for DI4268 (5-29)File 1(7-12) Equations for DI4268 (5-29)File 1(7-12) Equation 7 Equations for DI4268 (5-29)File 1(7-12) Equation 7 Equation 7 VOUTMAXXF�V B VFB IDS4404 = � . R1 R2 Equations for DI4268 (5-29) File 1(13-18) Equation 7 V �V V VOUTMAXXF�V B VFB I = OUTMAXXFB � FB . IDS4404 = � . DS4404 R R R1 R2 1 2 Equations for DI4268 (5-29) File 1(13-18) Equation 8 Equations for DI4268 (5-29) File 1(13-18) Equations for DI4268 (5-29) File 1(13-18) Equation 13 VOUTMAXXF�V B VFB IDS4404 = � . Equation 8 R1 R2 Equation 8 VVOUTMAX� OUTNOM Equation 13 IDS4404 = . Equation 13 R1 I STEPEquation SIZE13= FS = NO. OF STEPS VV� VVOUTMAX� OUTNOM OUTMAX OUTNOM IDS4404 = . �3 IDS4404 = . Equation 8 R 0. 5 ×10 IFS R 1 STEP SIZE== 16.1 µIA/STEP,FS = 1 STEP31 SIZE= NO. OF STEPS = NO. OFIFS STEPS Equation 9 STEP SIZE�3= = 0. 5 ×10�3 NO. OF STEPS Equation0. 5 ×10 14= 16.1 µA/STEP, VVOUTMAX� OUTNOM 31 �3 = 16.1 µA/STEP, IDS4404 = . 0. 5 ×3110 Equation 9 R = 16.1 µA/STEP, Equation 9 VM1× ARGIN 31 designideas I OUTNOM , EquationEquation14 s for DI4268 (5-29) File 1(13-18) DS4404 = Equation 14 R I (REGISSTER SETTING)= 1 EquationOUT 14 mum output voltage.VM This resolution× ARGI isN mineSTEP the SIZE DS4404’s× REGISTER output currentSETTING. as a VMOUTNOM × ARGIN I OUTNOM , I = , (9) EquationDS44049= IOUT(REGISSTER SETTING)= DS4404 more than adequate for thisR example. functionIOUT( REGIof registerSSTER setting: SETTING)= R1 1 Equation 13 You could, for instance, begin by ar- I (REGISSTER SETTING)= STEPOUT SIZE × REGISTER SETTING.(14) where the margin is 0.2 to implement bitrarilyEquation choosing10 the full-scale current STEPEquation SIZE ×15REGISTER SETTING. 620% margining in this case. Before in the center, or 1.25 mA, of the speci- STEP SIZE × REGISTER SETTING. VMOUTNOM × ARGIN you can use this relationship to calcu- fiedIDS range4404 = and then performing all the, NoteEquation that 15this register setting does R IFS Equation 10 Equation 10 1 EquationSTEPR 15 SI180ZE= = late R1 and R2, you must select the full- calculations. Instead, for illustrative not include1 the sign bit, which selects EquationR2 = =15 = 90NO.Ω. OF STEPS scale current. purposes,V OUTNOthe calculationsM × MARGI areN shown sink or source.2 The2�3 DS4404 sinks cur- According to the DS4404’s data forR the1 = endpoints of the range: 0.5= and rent when0. 5 the×10 sign bit is zero, mak- I R 180 = 16.1 µA/STEP, sheet, the full-scale current must be 2 mA. Analyzing DSthe4404 0.5-mA case first, ingR the outputR1 31180 voltage90 increase. to the R2 = 1 = = 90Ω. 1.. 8 0 2 2 = R2 = 1802 = Ω 0.5 to 2 mA to guarantee the specifi- youEquation performV 10OUTNOthe× followingM × MARGI calculationsN maximumEquation21 output162 voltage. It sources VOUTNOM × MARGIN R = = 720Ω. = R2 =Equation= 14 = 90Ω. Rcations1 = for accuracy and linearity.= Un- and then1 repeat0. 5 × 10for�I the3 2-mA case. current when2 the2 sign bit is one, mak- IDS4404 DS4404 fortunately, no formula is available for Using Equation 9 and solving for R1 ing the output voltage decrease toward calculating the ideal full-scale current. yields: 1.. 8 × 0 2 theEquation minimum16 output voltage. 1.. 8 × 0 2 = 720Ω. Equation 16 The desired number= of720 steps,Ω.