Topics of this Slideset CS429: Computer Organization and Architecture Instruction Set Architecture Intro to Assembly language Programmer visible state Dr. Bill Young Department of Computer Science Y86 Rudiments University of Texas at Austin RISC vs. CISC architectures Last updated: October 2, 2019 at 18:05 CS429 Slideset 6: 1 Instruction Set Architecture CS429 Slideset 6: 2 Instruction Set Architecture Instruction Set Architecture Why Y86? Assembly Language View Processor state: registers, The Y86 is a “toy” machine that is similar to the x86 but much memory, etc. simpler. It is a gentler introduction to assembly level programming Instructions and how than the x86. instructions are encoded just a few instructions as opposed Layer of Abstraction to hundreds for the x86; Above: how to program fewer addressing modes; Application machine, processor executes Program simpler system state; instructions sequentially Compiler OS Below: What needs to be absolute addressing. ISA ISA Layer built Everything you learn about the Y86 will apply to the x86 with very Use variety of tricks to CPU Design little modification. But the main reason we’re bothering with the make it run faster Y86 is because we’ll be explaining pipelining in that context. Circuit Design E.g., execute multiple instructions Chip Layout simultaneously CS429 Slideset 6: 3 Instruction Set Architecture CS429 Slideset 6: 4 Instruction Set Architecture Language / Machine Semantics Fetch / Decode / Execute Cycle The most fundamental abstraction for the machine semantics for the x86/Y86 or similar machines is the fetch-decode-execute cycle. This is also called the von Neumann architecture. There are various means of giving a semantics or meaning to a programming system. The machine repeats the following steps forever: Probably the most sensible for an assembly (or machine) language 1 fetch the next instruction is an operational semantics, also known as an interpreter semantics. from memory (the PC tells you which is next); That is, we explain the semantics of each possible operation in the language by explaining the effect that execution of the operation 2 decode the instruction (in has on the machine state. the control unit); 3 execute the instruction, updating the state appropriately; 4 go to step 1. CS429 Slideset 6: 5 Instruction Set Architecture CS429 Slideset 6: 6 Instruction Set Architecture Y86 Processor State Y86 Instructions Program Condition Memory Registers codes OF ZF SF %rax %rsp %r8 %r12 We’re actually describing two languages: the assembly language %rcx %rbp %r9 %r13 and the machine language. There is nearly a 1-1 correspondence PC %rdx %rsi %r10 %r14 Stat between them. %rbx %rdi %r11 Machine Language Instructions Program registers: almost the same as x86-64, each 64-bits 1-10 bytes of information read from memory Condition flags: 1-bit flags set by arithmetic and logical Can determine instruction length from first byte operations. OF: Overflow, ZF: Zero, SF: Negative Not as many instruction types and simpler encoding than x86-64 Program counter: indicates address of instruction Each instruction accesses and modifies some part(s) of the Memory program state. Byte-addressable storage array Words stored in little-endian byte order Status code: (status can be AOK, HLT, INS, ADR) to indicate state of program execution. CS429 Slideset 6: 7 Instruction Set Architecture CS429 Slideset 6: 8 Instruction Set Architecture Y86 Instruction Set Example from C to Assembly Suppose we have the following simple C program in file code.c. Byte 0123456789 int sumInts ( long int n) halt 0 0 { nop 1 0 /* Add the integers from 1..n. */ cmovXX rA,rB 2 fn rA rB long int i; irmovq V,rB 3 0 F rB V long int sum = 0; rmmovq rA,D(rB) 4 0 rA rB D for ( i = 1; i <= n; i++ ) { mrmovq D(rB),rA 5 0 rA rB D sum += i; } OPq rA,rB 6 fn rA rB return sum ; jXX Dest 7 fn Dest } call Dest 8 0 Dest ret 9 0 We used long int to force usage of the 64-bit registers. You can pushq rA A 0 rA F generate assembly using the following command: popq rA B 0 rA F > gcc -O -S code.c CS429 Slideset 6: 9 Instruction Set Architecture CS429 Slideset 6: 10 Instruction Set Architecture x86 Assembly Example Y86 Assembly Example .file ”code.c” This is a hand translation into Y86 assembler: .text .globl sumInts sumInts : .type sumInts , @function andq %rdi,%rdi # test % rdi = n sumInts : .LFB0 : jle .L4 # if <= 0, done .cfi startproc irmovq$1,%rcx # constant 1 testq %rdi, %rdi irmovq$0,%rax #sum=0 j l e .L4 irmovq$1,%rdx #i=1 movq $0, %rax .L3 : movq $1, %rdx rrmovq %rdi,%rsi #temp=n .L3 : addq %rdx,%rax #sum+=i addq %rdx, %rax addq $1, %rdx addq %rcx,%rdx #i+=1 cmpq %rdx, %rdi subq %rdx,%rsi #temp-=i j g e .L3 jge .L3 # if >= 0, goto L3 ret ret # else return sum .L4 : .L4 : movq $0, %rax irmovq$0,%rax #done ret .cfi endproc ret .LFE0 : .size sumInts, . −sumInts How does it get the argument? How does it return the value? .ident ”GCC: (Ubuntu 4.8.4 −2ubuntu1˜14.04) 4.8.4” − .section .note.GNUCS429 Slideset 6: 11stackInstruction ,””,@progbits Set Architecture CS429 Slideset 6: 12 Instruction Set Architecture Encoding Registers Y86 Instruction Set (2) Each register has an associated 4-bit ID: cmovXX rA,rB 2 fn rA rB %rax 0 %r8 8 %rcx 1 %r9 9 %rdx 2 %r10 A Encompasses: %rbx 3 %r11 B %rsp 4 %r12 C rrmovq rA,rB 2 0 move from register to register %rbp 5 %r13 D cmovle rA,rB 2 1 move if less or equal %rsi 6 %r14 E cmovl rA,rB 2 2 move if less %rdi 7 no reg F cmove rA,rB 2 3 move if equal cmovne rA,rB 2 4 move if not equal cmovge rA,rB 2 5 move if greater or equal Almost the same encoding as in x86-64. cmovg rA,rB 2 6 move if greater Most of these registers are general purpose; %rsp has special functionality. CS429 Slideset 6: 13 Instruction Set Architecture CS429 Slideset 6: 14 Instruction Set Architecture Y86 Instruction Set (3) Y86 Instruction Set (4) jXX Dest 7 fn Dest OPq rA,rB 6 fn rA rB Encompasses: Encompasses: jmp Dest 7 0 unconditional jump addq rA,rB 6 0 add jle Dest 7 1 jump if less or equal subq rA,rB 6 1 subtract jl Dest 7 2 jump if less andq rA,rB 6 2 and je Dest 7 3 jump if equal xorq rA,rB 6 3 exclusive or jne Dest 7 4 jump if not equal jge Dest 7 5 jump if greater or equal jg Dest 7 6 jump if greater CS429 Slideset 6: 15 Instruction Set Architecture CS429 Slideset 6: 16 Instruction Set Architecture Simple Addressing Modes Conventions It’s important to understand how individual operations update the Immediate: value system state. But that’s not enough! irmovq $0xab, %rbx Much of the way the Y86/x86 operates is based on a a set of Reg[R] Register: programming conventions. Without them, you won’t understand rrmovq %rcx, %rbx how programs work, what the compiler generates, or how your code can interact with code written by others. Normal (R): Mem[Reg[R]] Register R specifies memory address. This is often called indirect addressing. mrmovq (%rcx), %rax Displacement D(R): Mem[Reg[R]+D] Register R specifies start of memory region. Constant displacement D specifies offset mrmovq 8(%rcb),%rdx CS429 Slideset 6: 17 Instruction Set Architecture CS429 Slideset 6: 18 Instruction Set Architecture Conventions Sample Program Let’s write a fragment of Y86 assembly code. Our program swaps the 8-byte values starting in memory locations 0x0100 (value A) The following are conventions necessary to make programs interact: and 0x0200 (value B). How do you pass arguments to a procedure? start : xorq %rax, %rax Where are variables (local, global, static) created? mrmovq 0x100(%rax), %rbx How does a procedure return a value? mrmovq 0x200(%rax), %rcx rmmovq %rcx, 0x100(%rax) How do procedures preserve the state/data of the caller? rmmovq %rbx, 0x200(%rax) halt Some of these (e.g., the direction the stack grows) are reflected in specific machine operations; others are purely conventions. Reg. Use %rax 0 It’s usually a good idea to have a table like %rbx A this to keep track of the use of registers. %rcx B CS429 Slideset 6: 19 Instruction Set Architecture CS429 Slideset 6: 20 Instruction Set Architecture Sample Program: Machine Code A Peek Ahead: Argument Passing Registers: First 6 arguments Now, we generate the machine code for our sample program. Assume that it is stored in memory starting at location 0x030. I 1. %rdi Stack: arguments 7+ did this by hand, so check for errors! 2. %rsi 3. %rdx ... 0x030:6300 #xorq%rax,%rax 4. %rcx Arg n 0x032: 50300001000000000000 # mrmovq 0x100(%rax), %rbx 5. %r8 0x03c: 50100002000000000000 # mrmovq 0x200(%rax), %rcx ... 0x046: 40100001000000000000 # rmmovq %rcx , 0x100(%rax) 6. %r9 Arg 8 0x050: 40300002000000000000 # rmmovq %rbx , 0x200(%rax) Arg 7 ← %rsp 0x05a:00 #halt This convention is for GNU/Linux; Windows is different. Mnemonic to Reg. Use recall order: “Diane’s silk dress cost $89.” Push in reverse order. %rax 0 Only allocate stack space %rbx A Return value when needed. %rcx B %rax CS429 Slideset 6: 21 Instruction Set Architecture CS429 Slideset 6: 22 Instruction Set Architecture Instruction Example Effects on the State Addition Instruction Generic form Encoded representation You completely characterize an operation by saying how it changes the state. addq rA, rB 6 0 rA rB What effects does addq %rsi, %rdi have on the state? Add value in register rA to that in register rB.