VCC VDD RC RC RD RD vO1 vO2 vO1 vO2 Q1 Q2 M1 M2 vI2 vI1 vI1 vI2 R RS E VSS VEE Discrete, resistor-based differential am- Discrete resistor difference amplifier plifier with “long-tailed” pair of NPN with N-channel MOSFETs. Not very transistors. practical because of poor MOSFET per- VCC formance with resistor loads. VDD RC RC RBIAS RD RD vO1 vO2 Q1 Q2 vO1 vO2 vI1 vI2 M1 M2 I C4 vI1 vI2 Q3 Q4 ISS Bias current VEE Q4 acts as a constant current source re- VSS placing RE to make the outputs more Replacing the bias resistor RS with a nearly proportional to the input voltage constant current source reduces cost, ar- difference. RBIAS sets the current by de- ea, and most importantly the error. The termining the current in Q3 and the cur- common mode rejection ratio improves rent in Q4 is the same because Q3 and markedly. Q4 are matched. VCC VDD Current Mirror Current Mirror In Out In Out iM = iC1 iC1 – iC2 iC1 i iM = iD1 i – i D1 D1 D2 iC2 iD2 Q1 Q2 M1 M2 v IN1 v vIN1 v IN2 IN2 VEE VSS Concept of using a current mirror circuit Use of a current mirror in N-channel to allow subtraction of collector currents MOSFET difference amplifier for single at a simple node by KCL. ended output and higher common mode rejection. iIN i iIN iOUT OUT Q1 Q2 M1 M2 VEE VSS The primitive current mirror in MOS The most basic current mirror with devices. Because MOSFETs usually hi have lower output resistances than BJTs, i FE IN and an output resistance OUT h 2 this circuit often causes lower gains than FE its BJT counterpart. VVCE A equal to rO2 . IC VCC RBIAS iIN iOUT iIN Q1 Q3 Q2 iOUT RE Q1 Q2 Q VEE VEE Widlar current source, for which kT IC1 IC 2 ln . The collector cur- Wilson current mirror –this has a much qR I EC2 higher output resistance from the rent of Q2 may be much lower than Q1 cascoding effect of Q3. However its with only a modest value for RE. The minimum output voltage is higher by output impedance is also raised by a fac- VBE. tor usually between 3 and 6 times the 02 value of r . iIN iOUT VCC iIN i OUT Q3 Q4 Q3 Q1 Q2 Q1 Q2 VEE VEE Current mirror using a common collector Wilson current mirror with an additional stage to balance input and output. Output transistor, Q3, to equalize the collector- impedance is still rO2. The minimum emitter voltages of the matched pair Q1- output voltage is very low – VCESAT of Q2. Reduces current mismatch from the Q2. Early effect. i i iIN iOUT IN OUT VBIAS M3 M4 M4 M3 M1 M2 M1 M2 VSS VSS A Wilson current mirror in MOS devices A cascoded current mirror with M3 and with a fourth transistor, M3, to equalize M4 as the cascoding transistors. With the drain-source voltages of the matched careful selection of VBIAS this circuit can pair M1 – M2. Because of the relatively have an output resistance that is much high value of VTH, this circuit, which higher than the uncascoded version. The requires a minimum voltage drop of advantage over the Wilson configuration is that it can operate with input to VSS 2VVTH OV across the left and drop of only VVTH OV and output to VSS VVTH 2 OV on the right, may not be satis- of 2V . factory for low voltage systems. OV VCC VDD M2 RE2 M3 M4 M5 Q2 Q3 Q1 Q4 M1 RB Multiple P-channel sources: M1 is a long, narrow device that sets the current VEE level. Usually M2, M3, M4, and M5 Multiple PNP current sources; IC3 and have the same lengths but may differ in IC4 are matched to IC1 (the control tran- width to set different output current val- sistor) but IC2 is reduced by RE2 . The ues. When precise matching is needed, Q2 – RE2 combination is a Widlar cur- wider devices are made of paralleled de- rent source. vices with the same width as the control transistor, M2. VCC VDD M3 M4 Q3 Q4 (control) (control) iM = iD1 iD1 iD1 – iD2 iM = iC1 iC1 – iC2 iC1 iD2 iC2 M1 M2 Q1 Q2 vIN1 vIN2 v IN1 vIN2 VEE VSS Simplest bipolar current mirror within a Simplest CMOS MOSFET current mir- differential amplifier. Q3 is the control ror within a differential amplifier. M3 is transistor for the current source Q4. Be- the control transistor for the current cause Q3 is connected as a diode, it has a source M4. Because M3 has its drain low impedance to the power supply. Q4 and gate connected, it has a low imped- is open collector and so exhibits a rela- ance to the power supply ( ZM 331/ gm ). tively high output impedance, that is, it M4 has an open drain and so exhibits a approximates a constant current source. relatively high output impedance, that is, it too approximates a constant current source. Constant Current Sources (Biasing) I sense Complementary Differential Pair Symmetry Resistor Input Stage Output Inp uts (2 – PNP transistors) Compensation Stage Capacitor Output Current Mirror -A Short Circuit (Diff to single-ended Protection conversion) Block Diagram of a Bipolar Operational Amplifier The tables show the quiescent conditions for the transistors in the bipolar operational am- plifier that I use in class. The assumptions about the devices are: Device Type VBE hFE = VA VCESAT NPN 0.6 volts 100 150 volts 0.2 volts PNP 0.6 70 30 0.3 Quiescent Currents and Transistor Model Parameters Transistor IC IB re ro gm = IC/kt/q Q7 227 ua. 2.27 ua. 113 ohm 704 kohm 8790 usie. Q8 14.2 0.142 1.8 K 12.4 Meg. 549 usie. Q9 227 3.35 113 132 K 8720 Q10 227 2.3 113 174 K 8720 Q11 30 0.43 860 1.3 Meg. 1150 Q12, Q13 15 0.21 1.72 K 2.7 Meg. 573 Q14, Q15 15 0.15 1.72 K 10.7 Meg. 576 Q16 12.3 0.12 2.1 K 14.2 Meg. 477 VCC RE 1.8 KΩ IC11 = 30 A. Q2 Q9 Q11 Q10 Q1 Q5 Q12 Q13 50 K 35 Invert Non-invert D1 vOUT D2 35 D3 CCOMP = 15 pf. 100 K Q4 Q16 Q3 Q8 Q14 Q15 50 K Q7 Q6 50 K 50 K 35 500 500 VEE .