electronic materials Article Ta2O5/SiO2 Multicomponent Dielectrics for Amorphous Oxide TFTs Jorge Martins 1,* , Asal Kiazadeh 1, Joana V. Pinto 1, Ana Rovisco 1 , Tiago Gonçalves 1, Jonas Deuermeier 1 , Eduardo Alves 2, Rodrigo Martins 1, Elvira Fortunato 1 and Pedro Barquinha 1,* 1 i3N/CENIMAT, Department of Materials Science, NOVA School of Science and Technology and CEMOP/UNINOVA, NOVA University Lisbon, Campus de Caparica, 2829-516 Caparica, Portugal; [email protected] (A.K.); [email protected] (J.V.P.); [email protected] (A.R.); [email protected] (T.G.); [email protected] (J.D.); [email protected] (R.M.); [email protected] (E.F.) 2 IPFN, Instituto Superior Técnico, University of Lisbon, EN 10, km 139,7 2695-066 Bobadela, Portugal; [email protected] * Correspondence: [email protected] (J.M.); [email protected] (P.B.) Abstract: Co-sputtering of SiO2 and high-κ Ta2O5 was used to make multicomponent gate dielec- tric stacks for In-Ga-Zn-O thin-film transistors (IGZO TFTs) under an overall low thermal budget (T = 150 ◦C). Characterization of the multicomponent layers and of the TFTs working characteristics (employing them) was performed in terms of static performance, reliability, and stability to under- stand the role of the incorporation of the high-κ material in the gate dielectric stack. It is shown that inherent disadvantages of the high-κ material, such as poorer interface properties and poor gate insulation, can be counterbalanced by inclusion of SiO2 both mixed with Ta2O5 and as thin interfacial layers. A stack comprising a (Ta2O5)x(SiO2)100 − x film with x = 69 and a thin SiO2 film at the interface µ ≈ 2· −1· −1 with IGZO resulted in the best performing TFTs, with field-effect mobility ( FE) 16 cm V s , 7 subthreshold slope (SS) ≈ 0.15 V/dec and on/off ratio exceeding 10 . Anomalous Vth shifts were observed during positive gate bias stress (PGBS), followed by very slow recoveries (time constant Citation: Martins, J.; Kiazadeh, A.; 5 Pinto, J.V.; Rovisco, A.; Gonçalves, T.; exceeding 8 × 10 s), and analysis of the stress and recovery processes for the different gate di- Deuermeier, J.; Alves, E.; Martins, R.; electric stacks showed that the relevant mechanism is not dominated by the interfaces but seems Fortunato, E.; Barquinha, P.; et al. to be related to the migration of charged species in the dielectric. The incorporation of additional Ta2O5/SiO2 Multicomponent SiO2 layers into the gate dielectric stack is shown to effectively counterbalance this anomalous shift. Dielectrics for Amorphous Oxide This multilayered gate dielectric stack approach is in line with both the large area and the flexible TFTs. Electron. Mater. 2021, 2, 1–16. electronics needs, yielding reliable devices with performance suitable for successful integration on https://doi.org/10.3390/ new electronic applications. electronicmat2010001 Keywords: Ta2O5/SiO2; TFTs; anomalous Vth shift; multicomponent dielectrics; high-κ dielectrics Received: 11 November 2020 Accepted: 22 December 2020 Published: 29 December 2020 1. Introduction Publisher’s Note: MDPI stays neu- tral with regard to jurisdictional claims Amorphous oxide (AO) thin films have greatly progressed in a relatively short time, in published maps and institutional having found market application in the display industry where materials such as indium- affiliations. gallium-zinc oxide (IGZO) appear as an advantageous alternative to Si technologies [1,2]. Besides conventional electronics, their characteristics make them suitable for concepts such as transparent and flexible electronics [3–5] or even paper electronics [6–9], allowing for interesting applications in fields such as medical, security and item tracking [10,11], Copyright: © 2020 by the authors. Li- crucial under the scope of the Internet of Things (IoT). One of the main advantages of AO is censee MDPI, Basel, Switzerland. This their good properties even when fabricated at low temperatures, with temperatures below article is an open access article distributed 200 ◦C being imposed when considering flexible substrates or even paper substrates. Lower under the terms and conditions of the annealing temperatures unavoidably result in poorer device performance and stability. Creative Commons Attribution (CC BY) When considering these lower annealing temperatures the IGZO properties are known license (https://creativecommons.org/ licenses/by/4.0/). to be strongly related to its processing conditions [12] and adjustment of the cation ratio Electron. Mater. 2021, 2, 1–16. https://doi.org/10.3390/electronicmat2010001 https://www.mdpi.com/journal/electronicmat Electron. Mater. 2021, 2, FOR PEER REVIEW 2 Electron. Mater. 2021, 2 2 ratio in the material thus plays a major role in its optimization [13]. In addition, employing in the material thus plays a major role in its optimization [13]. In addition, employing dielectrics with high dielectric permittivity, εr, (high-κ dielectrics) can compensate for dielectrics with high dielectric permittivity, #r, (high-κ dielectrics) can compensate for poorer performances performances by by reducing reducing driving driving voltag voltageses (e.g., (e.g., as asrequired required in power-efficient in power-efficient ap- plicationsapplications within within IoT) IoT) and and improving improving gate gatevoltage voltage swing swing due to due higher to higher gate capacitances gate capaci- [14,15].tances [For14,15 low]. Fortemperature low temperature deposition deposition of dielectrics, of dielectrics, physical techniques physical techniques such as pulsed such laseras pulsed deposition laser deposition(PLD) [16,17], (PLD) thermal [16,17 evaporation], thermal evaporation [18,19] and sputtering [18,19] and can sputtering be used, canthe latterbe used, allowing the latter the deposition allowing theof most deposition materials of without most materials any intentional without substrate any intentional heating [20],substrate at a large heating scale [20 and], at with a large low scale contamination and with low[21]. contaminationSeveral high-κ [materials21]. Several have high- beenκ employedmaterials havefor gate been dielectrics employed in for low-temper gate dielectricsature inIGZO low-temperature TFTs (or other IGZO ZnO-based TFTs (or TFTs) other including: Al2O3 [22–24], HfO2 [25], Ta2O5 [26,27], Y2O3 [28–30] and ZrO2 [31]. Nevertheless, ZnO-based TFTs) including: Al2O3 [22–24], HfO2 [25], Ta2O5 [26,27], Y2O3 [28–30] and high-κ materials present some disadvantages, aggravated by low thermal budgets, when ZrO2 [31]. Nevertheless, high-κ materials present some disadvantages, aggravated by 2 comparedlow thermal to conventional budgets, when dielectrics compared such to as conventional SiO . While dielectricshaving a relatively such as SiOlow2 .permit- While tivityhaving (ε ar = relatively 3.9), SiO low2 is stable, permittivity has a very (#r = high 3.9), SiOband2 is gap stable, (Eg) hasof 9 a eV very and high has band a low gap defect (Eg) densityof 9 eV andmaking has ait lowa good defect insulator density with making a high it a goodbreakdown insulator voltage. with aAdditionally, high breakdown it is amorphousvoltage. Additionally, and has a good it is amorphousinterface with and IGZO. has a On good the interface other hand, with ionic IGZO. bonds On thein high- otherκ dielectricshand, ionic result bonds in inhigh high- defectκ dielectrics concentrations result inwith high oxygen defect vacancies concentrations (VO) being with oxygenthe pri- maryvacancies source (V Oof) beingtraps. theThese primary can be source a source of traps. of fixed These charges can be or a act source as electron of fixed traps, charges scat- or teringact as electroncarriers traps,in the scatteringchannel (decreasing carriers in themobility), channel changing (decreasing the mobility),threshold changingvoltage (V theth) andthreshold assisting voltage oxide (V breakdownth) and assisting and gate oxide leak breakdownage mechanisms and gate [32], leakage decreasing mechanisms device [per-32], formance,decreasing stability device performance,and reliability. stability Furthermore, and reliability. high-κ materials Furthermore, are often high- κpolycrystallinematerials are (evenoften polycrystallineat low temperatures) (even atwith low grain temperatures) boundaries with contributing grain boundaries both to contributingdegraded surface both propertiesto degraded and surface acting properties as preferential and acting paths as for preferential leakage current paths forand leakage impurity current diffusion and [33,34].impurity When diffusion choosing [33,34 the]. Whendielectric choosing material the, band dielectric alignment material, should band be alignment considered should as at leastbe considered 1 eV of conduction/valence as at least 1 eV ofconduction/valence band offset is desirable band for offset blocki isng desirable electron/hole for blocking injec- tion.electron/hole εr is normally injection. inversely#r is normally proportional inversely to Eg proportional(Figure 1), and to the Eg (Figure band alignment1), and the of band sev- eralalignment dielectrics of several with IGZO dielectrics can be with foun IGZOd in the can work be found of Hays in theet al. work [35]. of Hays et al. [35]. Figure 1. Dielectric constant vers versusus band gap for oxides. Adapted fr fromom [[35],35], with the permission of AIP Publishing. Incorporation of higher Eg materials with high-κ dielectricsdielectrics effectivelyeffectively increasesincreases EEGG and can result in amorphous materials to much