The Performance Wall of Parallelized Sequential Computing: the Dark Performance and the Roofline of Performance Gain

The Performance Wall of Parallelized Sequential Computing: the Dark Performance and the Roofline of Performance Gain

Graphical Abstract The performance wall of parallelized sequential computing: the dark performance and the roofline of performance gain János Végh Using parallel computing for achieving the needed higher performance adds one more limitation to the already known ones. The performance gain of parallelized sequential processor systems has a theoretical upper limit, derived from the laws of nature, the paradigm and the technical implementation of computing. Based on the different limiting factors, the paper derives some theoretical upper limit of the performance gain. From the rigorously controlled database of supercomputers, performance gains of the ever-built supercomputers are analyzed and compared to the theoretical bound. It is shown that the present implementations already achieved the theoretical upper bound. The upper bound of the performance gain for processor-based brain simulation is also derived. The roofline of performance gain of supercomputers HPL 1st by RMax 8 10 HPL 2nd by RMax HPL 3rd by RMax HPL 7 Best by αeff 10 HPCG 1st by RMax HPCG 2nd by RMax 6 HPCG 10 3rd by RMax HPCG Best by RMax Brain simulation 105 P erformance gain 104 103 102 1994 1996 1998 2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 Year arXiv:1908.02280v1 [cs.DC] 2 Aug 2019 Highlights The performance wall of parallelized sequential computing: the dark performance and the roofline of performance gain János Végh • A new limitation of computing performance is derived • A new merit for parallelization is introduced • The theoretically possible performance gain is already achieved • The performance of brain simulation is compared with that of the benchmarks The performance wall of parallelized sequential computing: ? the dark performance and the roofline of performance gain János Végh aKalimános BT, Hungary. 4032 Debrecen, Komlóssy 26. ARTICLEINFO ABSTRACT Keywords: The computing performance today is developing mainly using parallelized sequential computing, in efficiency many forms. The paper scrutinizes whether the performance of that type of computing has an upper single-processor limit. The simple considerations point out that the theoretically possible upper bound is practically performance achieved, and that the main obstacle of to step further is the presently used computing paradigm and performance gain implementation technology. In addition to the former "walls", also the "performance wall" must be supercomputer considered. As the paper points out, similarly to the "dark silicon", also the "dark performance" is brain simulation always present in the parallelized many-processor systems. 1. Introduction the effort to understand the relevant characteristics of the benchmark applications they use, if they are to arrive at the The parallelization in the computing today becomes more correct design decisions for building larger multiprocessor and more focus [5]. After that the growth of the single- systems"[41]. The rules of game are different for the segre- processor performance has stalled [45], the only hope for gated processors and the parallelized ones [51]; the larger are making computing systems with higher performance is to the systems, the more remarkable deviations appear in their assemble them from a large number of sequentially work- behavior. In addition to the already known limitations [35], ing computers. "Computer architects have long sought the "The City of Gold" (El Dorado) of computer design: to cre- valid for segregated processors, a new limitation, valid for ate powerful computers simply by connecting many existing parallelized processors appears [55]. This paper presents that the well-known Amdahl’s law, smaller ones."[37]. Solving the satisfying scalability of the the commonly used computing paradigm (the single-processor task, however, is not simple at all. One of the major motiva- approach [3]) and the commonly used implementation tech- tions of the origin of the Gordon Bell Prize was to increase nology together form a strong upper bound for the perfor- the resulting performance gain of the parallelized sequential a speedup of at least 200 times on a real problem mance of the parallelized sequential computing systems, and systems: " the experienced failures, saturation, etc. experiences can be running on a general purpose parallel processor"[6]. Valid- attributed to approaching and attempting to exceed that up- It is known from the very beginnings, that the " "We realize that Amdahl’s Law is ity of the Single Processor Approach to Achieving Large- per bound. In section2 one of the few, fundamental laws of computing" Scale Computing Capabilities [38], and "[3, 41] is at least question- reinterpret it for the targeted goal. The section introduces able, and the really large-scale tasks (like building super- the mathematical formalism used and derives the deployed computers comprising millions of single processors or build- logical merits. Based on the idea of Amdahl, in section3 ing brain simulators from single processors) may face seri- a general model of parallel computing in constructed. In ous scalability issues. After the initial difficulties, for today this (by intention) strongly simplified model the contribu- the large-scale supercomputers are stretched to the limits [7], tions are classified either as parallelizable or nonparalleliz- and although the EFlops (payload) performance has not yet 104 able ones. The section provides an overview of the compo- been achieved, already the times higher performance is nents contributing to the non-parallelizable fraction of pro- planned [32]. Many of the planned large-scale supercom- cessing, and attempts to reveal their origin and behavior. By puters, however, are delayed, canceled, paused, withdrawn, properly interpreting the contributions, it shows that under re-targeted, etc. It looks like that in the present "gold rush" it different conditions different contributions can have the role has not been scrutinized whether the resulting payload per- formance of parallelized systems has some upper bound of being the performance-limiting factor. The section in- . In terprets also the role of the benchmarks, and explains why the known feasibility studies this aspect remains out of sight the different benchmarks produce different results. Section4 in USA [44], in EU [17], in Japan [18] and in China [32]. The shows that the parallelized sequential computing systems have designers did not follow "that system designers must make their inherent performance bound, and shows numerous po- ? This work is supported by the National Research, Development and tential limiting factors. The section also provides some supercomputer- Innovation Fund of Hungary, under K funding scheme Projects no. 125547 specific numerical examples. and 132683, as well as ERC-ECAS support of project 861938 is acknowl- The last two sections directly underpin the previous theo- edged < Corresponding author retical discussion with measured data. In section5 some spe- [email protected] (J. Végh) cific supercomputer features are discussed, where the case is ORCID(s): 0000-0001-7511-2910 (J. Végh) well documented and the special case enables to draw gen- J. Végh: Preprint submitted to Elsevier Page 1 of 17 The roofline of parallelized performance gain eral conclusions. This section also discusses the near (pre- • the parallel and sequential runtime components are dictable) future of large-scale supercomputers and their be- only slightly affected by cache operation havior. Section6 draws some statistical conclusions, based wires get increasingly slower relative to gates on the available supercomputer database, containing rigor- • the ously verified, reliable data for the complete supercomputer 2.3. Amdahl’s case under realistic conditions history. The large number of data enables, among others, to not derive conclusions about a new law of the electronic devel- The realistic case is that parallelized parts are of equal opment, to tell where and when it is advantageous to apply length (even if they comprise exactly the same instructions). graphic accelerator units, as well as to derive a "roofline" The hardware operation in modern processors may execute model of supercomputing. them in considerably different times; for examples see [53, 24], and references cited therein; operation of hardware ac- celerators inside a core, or network operation between pro- 2. Amdahl’s classic analysis cessors, etc. One can also see that the time required to con- 2.1. Origin and interpretation trol parallelization is not negligible and varying; represent- ing another source of performance bound. The most commonly known and cited limitation on par- The static correspondence between program chunks and allelization speedup ([3], the so called Amdahl’s law) con- processing units can be very inefficient: all assigned pro- siders the fact that some parts (Pi) of a code can be par- cessing units must wait the delayed unit. The measurable allelized, some (Si) must remain sequential. Amdahl only performance does not match the nominal performance: lead- wanted to draw the attention to that when putting together ing to the appearance of the "dark performance": the pro- several single processors, and using Single Processor Ap- cessors cannot be utilized at the same time, much similar to proach (SPA), the available speed gain due to using large- how fraction of cores (because of energy dissipation) can- scale computing capabilities has a theoretical upper bound. not be utilized at the same time, leading to the issue "dark He also mentioned that data housekeeping (non-payload

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