SIGRETICS $5.00 8080 ImUIATORmonuol TABlE or conTEnTS Foreword.................................................................................................... 3 Chapter 1 Introduction ...................................................................................... 5 General .................................................................................................. 7 Bit Slice Architecture ..................................................................................... 7 Chapter 2 Theory of Operation .............................................................................. 9 Emulator Architecture. .. ... .. .. .. .. .. .. .. ... ... ... ... .. .... .. .... .. .. .. .... 10 Design Considerations .................................................................................... 11 The 8080 Emulator Pipeline ............................................................................... 12 Memory And 1/0 Controls ................................................................................. 13 Addressing Microcontral Memory. ..... .... ... ... .. .. ... .... ... .. .. .. .. .... .. ... .. .. .. .. .... 13 Microinstruction Format. .. ... .. ... .. .. ... ... ...... ... ..... .... .... .. .. .. .. .... 14 Chapter 3 Signetics Microassembler ......................................................................... 21 The Assembly Process .................................................................................... 23 The Microassembly Language ............................................................................. 23 Micraassembly Language Statements ...................................................................... 24 Chapter 4 8080 Emulator KLt Assembly ....................................................................... 27 Kit Assembly ............................................................................................. 29 Checkout Procedure ...................................................................................... 29 Appendices.................................... ........... .................................................. 31 Appendix A 8080 Emulator Specifications .................................................................. 32 Logic Diagram.............................. ............................................................. 32 Parts List ................................................................................................ 36 PC Board-Assembly Drawing ............................................................................ 37 PC Board Pin-Out and Signal Descriptions ................................................................ 39 System Timing. .. 42 Appendix B PROM Truth Tables ........................................................................... 45 Appendix C 8080 Emulator Instruction Set ................................................................. 55 Appendix D SIN 3001 MCU and SIN 3002 CPE Data Sheets ................................................. 63 Appendix E Microcode Listing ............................................................................. 81 Si!lDOliCS 2 Si!lDotiCS FOREWORD Despite the numerous advances in micro­ To your system software, the Signetics 8080 FEATURES OF THE SIGNETICS processor technology, there still remain Emulator looks just like the microcomputer 8080 EMULATOR many technological niches that have not yet it emulates. Except for timing loops, soft­ been filled. One example is a fast micro­ ware that has been developed and de­ • Complete emulation of 7-chip 8080A processor with both the powerful instruc­ bugged for an 8080 system will run directly CPU system tion set and extensive software support that on the 8080 Emulator. • Built with Signetics series 3000 Schottky is provided with an MOS machine like the microprocessor chip set 8080. In addition to providing industry with a • Processor cycle times from 150ns to In recognition of this need, Signetics has Schottky-bipolar 8080 CPU system, the static developed an 8080 Emulator using its high 8080 Emulator also gives Signetics an • Microprogrammed architecture speed Series 3000 microprocessor chip set. opportunity to present its Series 3000 • Implementation of entire 8080 instruction The Emulator significantly increases the microprocessor chip set in the light of a set speed of the 8080A system without costly practical, accomplished design. Toward • Available microprogram space for user redesign of system software. The Emulator this end, this manual is more than just a defined macro instructions is capable of achieving system speeds from reference guide for 8080 Emulator users. It • Multiply and Divide macro instructions two to nine times faster than the 8080A. also contains a wealth of information on the • Automatic trap for undefined or illegal application, structure, and operation of bit­ op-codes (machine enters wait state) The Signetics 8080 Emulator bridges the slice processors. Basic microprogramming • Instruction execution 2 to 9 times faster gap between high-performance "custom concepts are first introduced and then than 8080A built" bipolar CPUs and the slower, "off the applied to the Emulator's design. This • Power on reset provided shelf" MOS microprocessors. While the approach is designed to give the reader a • Single phase clock provided "custom built" bipolar machines are fast, basic understanding of bit-slice CPU design • On board clock provided their unique nature requires in-house and microprogramming techniques. • Single 5-volt supply operation development of an assembler and other • Board dimensions and edge connector support software. The MOS machines, on compatible with Intel's SBC 80 series the other hand, offer assemblers, high-level This manual assumes that the reader has • Complete 8080 software compatibility languages, development systems and many some experience with microprocessors, (except for timing loops) other support features. They are, however, particularly the 8080 system. For a detailed inherently slow. The Signetics 8080 Emula­ description of the 8080, refer to the 8080 tor offers the best of both worlds. It is an Microcomputer Systems User's Manual 8080 that runs at bipolar speeds. published by Intel Corporation. Si!lDotiCS 3 4 S!!IDotiCS CIIAPTIR I InTRODUCTion S(gnntics 5 6 Si!lDOliCS GENERAL 8080 EMULATOR BLOCK DIAGRAM The Signetics 8080 Emulator is a bipolar Schottky microcomputer. Using the Signet­ ics Series 3000 microprocessor chip set, a r-------- -------, complete 8080A CPU system has been ~ I implemented. The Emulator replaces a 02 system consisting of the 8080A microproc­ 8224 essor, the 8224 clock generator, the 8228 CLOCK SYNC GENERATOR system controller, two 8226 bidirectional & DRIVER READY ports, and two 8212 bus d rivers. A block RST diagram of the emulated system is shown in Figure 1. 8080A STSTB CPU The Signetics 8080 Emulator is a kit. A PC board, all of the necessary ICs and discrete components, and support documentation 8228 SYSTEM are provided. The Emulator kit can be CONTROLLER assembled by a skilled technician in four to six hours using the assembly instructions presented in Chapter 4. All PROMs are preprogrammed. BIT SLICE ARCHITECTURE Advantages The primary advantages in using bit slice architecture are: 1. The availability of microprogram mabie LSI components. ADDRESS BUS 2. The inherent speed advantage of these LSI components. 3. Design flexibility. DATA BUS With microprogrammable LSls, the system component count can be reduced to a manageable level, resulting in lower manu­ Figure 1 facturing costs and design simplification. With LSI components capable of running at adding of two operands and depositing the parallel hardware control operations will increase Schottky-bipolar speeds, it is possible to sum in a specific register. This kind of useful or decrease. respectively. develop machines that will run with micro function is called a "macro instruction." In Vertically: By increasing or decreasing the cycle times of less than 200 nanoseconds. the case of the 8080 Emulator, all of the number of microinstructions. the capability of the Many applications require this high speed original 8080 instructions are macro in­ CPU will increase or decrease. accordingly. performance which cannot be achieved by structions. The execution of each macro MaS microprocessors. instruction is accomplished by one or more It is possible to optimize the CPU design by microinstructions, depending on the macro optimizing the size (horizontally and vertically) of the Control Store. Total flexibility is achieved instruction's complexity. An example of design flexibility is the ability through the process of optimization in the to expand or contract the size of the Control Store. microprogram both vertically and horizon­ 3. Microprogram Sequence Control-This func­ tally to fit the requirements of the particular A simplified structure of a micropro­ application. Horizontal expansion is tion is implemented efficiently with the N3001. grammed CPU is illustrated in Figure 2. The N3001 controls and provides the address achieved by adding more control bits to the There are five major building blocks, name­ sequencing function for the Control Store. The microinstruction word. Vertical expansion ly: address thus formed is called the "micropro­ is achieved by adding microinstructions to gram address." the microprogram. Additional flexibility is 1. The Central Processing Section-This is the provided by the cascadability of bit slice section where the actual logic and arithmetic 4. Macro Instruction