Computer Architecture and Organisation

Computer Architecture and Organisation

Lesson Plan for the session started W.e.f. Name of Institute Akido College Of Engineering Name of Teacher with Designation Sonam Kaushik( Assistant Professor) Department CSE Month Class Topic/Chapter covered Academic activity Test/Assignement Boolean algebra and Logic gates, Combinational logic blocks Sequential logic blocks(Latches, Flip-Flops, Registers, Counters) Store program control concept, Flynn’s classification of computers (SISD, MISD, MIMD) Assignement 1 Multilevel viewpoint of a machine: digital logic, micro architecture, ISA JAN CSE 4th Operating system,high level language,structured organisation. LECTURE CPU, caches, main memory secondary memory units & I/O Performance metrics; MIPS, MFLOPS Assignement 2 Tutorial-1 Instruction set based classification of processors (RISC, CISC, and their comparison addressing modes: register, immediate,direct,indirect,indexed Operations in the instruction set; Arithmetic and Logical, Data Transfer Assignement 1 Control Flow Instruction set formats (fixed,variable,hybrid) LECTURE FEB CSE 4th Language of the machine: 8086 simulation using MSAM Assignement 2 Tutorial-2 CPU Architecture types (accumulator, register) stack, memory/ register detailed data path of a typical register based CPU Fetch-Decode-Execute cycle (typically 3 to 5 stage microinstruction sequencing Assignement 1 implementation of control unit Enhancing performance with piprlining The need for a memory hierarchy CSE 4th Locality of reference principle, Memory hierarchy in LECTURE MARCH practice: Cache, main memory and secondary memory Memory parameters: access/ cycle time, cost per bit); Main memory (Semiconductor RAM & ROM organization, memory expansion, Static & dynamic memory types) Assignement 2 Cache memory (Associative & direct mapped cache organizations Tutorial-3 Goals of parallelism (Exploitation of concurrency, throughput enhancement Amdahl’s law Instruction level parallelism (pipelining, super scaling –basic features); Processor level parallelism (Multiprocessor systems overview). Instruction codes, computer register, computer instructions, timing and control, Assignement 1 instruction cycle type of instructions, memory reference register reference. I/O reference APRIL CSE 4th Basics of Logic Design, LECTURE accumulator logic Control memory address sequencing micro-instruction formats micro-program sequencer Assignement 2 Stack Organization, Instruction Formats Types of interrupts; Tutorial-4.

View Full Text

Details

  • File Type
    pdf
  • Upload Time
    -
  • Content Languages
    English
  • Upload User
    Anonymous/Not logged-in
  • File Pages
    1 Page
  • File Size
    -

Download

Channel Download Status
Express Download Enable

Copyright

We respect the copyrights and intellectual property rights of all users. All uploaded documents are either original works of the uploader or authorized works of the rightful owners.

  • Not to be reproduced or distributed without explicit permission.
  • Not used for commercial purposes outside of approved use cases.
  • Not used to infringe on the rights of the original creators.
  • If you believe any content infringes your copyright, please contact us immediately.

Support

For help with questions, suggestions, or problems, please contact us