instruments Article Monolithically-Integrated Single-Photon Avalanche Diode in a Zero-Change Standard CMOS Process for Low-Cost and Low-Voltage LiDAR Application Jinsoo Rhim 1,* , Xiaoge Zeng 1, Zhihong Huang 1, Sai Rahul Chalamalasetti 1, Marco Fiorentino 1, Raymond Beausoleil 1 and Myung-Jae Lee 2 1 Hewlett Packard Labs, Hewlett Packard Enterprise, Palo Alto, CA 94304, USA; [email protected] (X.Z.); [email protected] (Z.H.); [email protected] (S.R.C.); marco.fi[email protected] (M.F.); [email protected] (R.B.) 2 Center for Optoelectronic Materials and Devices, Korea Institue of Science and Technology (KIST), Seoul 02792, Korea; [email protected] * Correspondence: [email protected] Received: 30 April 2019; Accepted: 21 June 2019; Published: 25 June 2019 Abstract: We present a single-photon sensor based on the single-photon avalanche diode (SPAD) that is suitable for low-cost and low-voltage light detection and ranging (LiDAR) applications. It is implemented in a zero-change standard 0.18-µm complementary metal oxide semiconductor process at the minimum cost by excluding any additional processing step for customized doping profiles. The SPAD is based on circular shaped P+/N-well junction of 8-µm diameter, and it achieves low breakdown voltage below 10 V so that the operation voltage of the single-photon sensor can be minimized. The quenching and reset circuit is integrated monolithically to capture photon-generated output pulses for measurement. A complete characterization of our single-photon sensor is provided. Keywords: single photon avalanche diode; monolithic integration; zero-change standard CMOS technology 1. Introduction Light detection and ranging (LiDAR) has attracted significant research and development interest over recent years as demands for three-dimensional (3D) imaging technologies have increased in various fields including automotive vehicles, drones, robots, and many other scientific, medical and consumer applications [1,2]. Among others, single-photon avalanche diode (SPAD) technology is a critical building block of such LiDAR systems as it can simultaneously improve sensitivity and timing accuracy [3]. Especially, SPADs implemented in a standard complementary metal oxide semiconductor (CMOS) process is the key that enables high-volume production of low-cost single-photon sensors. Although many efforts have been focusing on realizing CMOS-compatible SPADs and single-photon sensors in deep-submicron CMOS technology [4–16], the majority of them rely on non-standard processes with customized layers that increase the cost and design complexity. In this article, we present a SPAD-based single-photon sensor that is suitable for low-cost and low-voltage LiDAR systems in mobile devices and automotive vehicles. Our sensor is fully compatible with a standard 0.18-µm CMOS process where our SPAD and active quenching and reset circuit (AQRC) are monolithically integrated at the minimum cost as it excludes any of additional processing step for customized doping profile. Our sensor is carefully designed to minimize the operation voltage without sacrificing a significant amount of performance. We provide a full characterization including Instruments 2019, 3, 33; doi:10.3390/instruments3020033 www.mdpi.com/journal/instruments Instruments 2019, 4, x FOR PEER REVIEW 2 of 9 Instruments 2019, 3, 33 2 of 9 characterization including current-voltage characteristics, dark-count rate (DCR), afterpulsing probabilitycurrent-voltage, photon characteristics, detection probability dark-count (PDP), rate and (DCR), photon afterpulsing timing jitter. probability, photon detection probability (PDP), and photon timing jitter. 2. Single-Photon Sensor 2. Single-Photon Sensor Figure 1a,b shows the microscope image of the SPAD-based single-photon sensor and the cross- sectionalFigure view1a,b of showsSPAD, therespectively microscope, which image is of fabricated the SPAD-based in standard single-photon 180 nm CMOS sensor technology and the (1P6Mcross-sectional mixed-signal view and of SPAD, RF applications) respectively, from which TSMC is fabricated. Our SPAD in standard is based 180 on nm a P CMOS+/N-well technology junction in + a circular(1P6M mixed-signal shape, and the and diameter RF applications) is 8 μm. from P-well TSMC. guard Our-ring SPAD that is basedhas 2- onμm a width P /N-well surrounds junction the µ µ junctionin a circular to protect shape, the and device the diameter from premature is 8 m. breakdown P-well guard-ring at the thatdevice has perimeter, 2- m width which surrounds can be the junction to protect the device from premature breakdown at the device perimeter, which can be confirmed by a light emission test at 15 V of reverse bias voltage as shown in Figure 1a. An additional confirmed by a light emission test at 15 V of reverse bias voltage as shown in Figure1a. An additional shallow-trench isolation (STI) guard-ring is implemented outside of the P-well guard-ring to prevent shallow-trench isolation (STI) guard-ring is implemented outside of the P-well guard-ring to prevent lateral tunneling in between P+ and N+ contact regions. However, such STI may dramatically increase lateral tunneling in between P+ and N+ contact regions. However, such STI may dramatically increase the density of deep-level carrier generation centers at its interface, especially when it is located close the density of deep-level carrier generation centers at its interface, especially when it is located close to to thethe multiplicationmultiplication region region of of SPAD SPAD [17 [].17 For]. For this this reason, reason, the STIthe isSTI located is located outside outside the P-well the P guard-ring-well guard- ringto to make make sure sure that that only only a negligible a negligible amount amount of defect of defect contributes contribute tos the to noisethe noise of SPAD of SPAD and itsand size its issize is minimized toto have have a a better better fill fill factor. factor. The The deep deep N-well N-well layer layer implemented implemented beneath beneath the junction the junction not only not onlyconnects connects the the contact contact regions regions for the for cathode the cathode but also but extends also extends the photon-absorption the photon-absorption region into region deeper into deepersilicon silicon substrate substrate so that moreso that carriers more generated carriers from generated photons atfrom near-infrared photons (NIR)at near wavelengths-infrared (NIR) are wavelengthscaptured and are achieves captured higher and PDP.achieves The sensorhigher occupies PDP. The 20 sensorµm 40 occupiesµm of area 20 inμm total × 40 and μm the of active area in × totalarea and of SPADthe active is 50.24 areaµ mof2 ,SPAD which is results 50.24 inμm 6.3%2, which of fill-factor results in for 6.3% a single of fill pixel.-factor Such for a a fill single factor pixel is . Suchexpected a fill factor to improve is expected by the to factor improve of two by or the more factor for of a lineartwo or or more two-dimensional for a linear or array two- bydimensional sharing arraydeep by the sharing N-well deep of the the adjacent N-well SPADs of the and adjacent optimizing SPAD thes circuitand optimizing design. The the fill circuit factor candesign. be further The fill factorimproved can be by further using improved micro lenses by [ 18using]. micro lenses [18]. Figure 1. a Figure 1. (a) Microscope( ) Microscope image of image the fabricated of the fabricated single single-photon-photon sensor sensor and the and light the light emission emission test test result result;; (b) Cross- (b) Cross-sectional view of a single-photon avalanche diode (SPAD). sectional view of a single-photon avalanche diode (SPAD). Figure 2 illustrates the circuit diagram of our AQRC and the output waveform of the SPAD. For Geiger-mode operation, reverse bias voltage beyond its breakdown is applied to the cathode of the SPAD while the anode is connected to the AQRC so that output pulses of the SPAD are properly shaped and then provided to field programmable gate arrays (FPGA) or other equipment for Instruments 2019, 3, 33 3 of 9 Figure2 illustrates the circuit diagram of our AQRC and the output waveform of the SPAD. InstrumentsFor Geiger-mode 2019, 4, x FOR operation, PEER REVIEW reverse bias voltage beyond its breakdown is applied to the cathode of3 of the 9 SPAD while the anode is connected to the AQRC so that output pulses of the SPAD are properly shaped measurement.and then provided For an to active field programmable quenching operation, gate arrays a p-type (FPGA) transistor or other and equipment a strong- forarm measurement. latch-based comparatorFor an active form quenching a closed operation, loop so that a p-typethe anode transistor of SPAD and is aquickly strong-arm charged latch-based to the quenching comparator voltage form (VQ)a closed through loop sothe that PMOS the anode transistor of SPAD once is quicklyit gets chargedlarger than to the the quenching threshold voltage voltage (VQ) (Vth) through of the the comparator.PMOS transistor Such anode once it voltage gets larger then than turns the on threshold the n-type voltage transistor (Vth) for of an the active comparator. reset operation Such anode after somevoltage period then of turns time, on which the n-typeis known transistor as the dead for an-time active of the reset sensor, operation and it aftercan vary some from period 20 to of 30 time, ns bywhich a programmable is known as delay the dead-time line. The ofAQRC the sensor, is implemented and it can with vary 3.3 from V I/O 20 totransistors 30 ns by with a programmable a thick gate todelay withstand line. The large AQRC overdrive is implemented voltages withthat comes 3.3 V I /Ofrom transistors the reverse with bias a thick voltage gate toof withstandthe SPAD large for Geigeroverdrive-mode voltages operation.