QJAVAC: Java Compiler Design for High Parallelism Queue Java Byte Code Li.Qiang.Wang, Ben A.Abderazek, Soichi Shigeta, Tsutomu Yoshinaga and Masahiro Sowa1 1Graduate School of Information Systems, The University of Electro-Communications 1-5-1 Chofugaoka, Chofu-shi, 182-858 Tokyo, Japan Tel: +81-424-43-5697, Fax: +81-424-43-5681 e-mail : [email protected], ben, shigeta, yosinaga, sowa @is.uec.ac.jp { } Abstract: In this paper, we will describe the imple- the operands of the next operation. mentation and the evaluation of a Queue-Java compiler In this paper, we will describe the implementation (QJAVAC), which is a part of whole research project and the evaluation of a Queue Java compiler (QJAVAC), at our laboratory, for high-level parallelism Queue- which is a part of whole research project at Sowa Labo- Java bytecodes without too much need for parallelism ratory, for high-level parallelism Queue-Java bytecodes scheduling. We will also describe a new type of syntax without too much need for parallelism scheduling of byte tree-Queue Abstract Syntax Tree(QAST) that is used code. We will describe a new type of syntax tree -Queue for an optimized Queue Java Virtual Machine (QJVM) Abstract Syntax Tree(QAST) that is used for an opti- instruction generation. With the QJAVAC compiler, we mized QJVM instruction generation. have successfully compiled the Java source code to the The rest of this paper is organized as follow: In sec- QJVM byte code. the achieved average degree of paral- tion 2, we review the related work and the background. lelism is about 2.11 times greater than that of a general In section 3, we describe the Queue-based Java com- Java byte code. piler (QJAVAC) implementation. We also show in this section the algorithm for generating the new proposed 1. Introduction QAST and how instructions are generated in QJAVAC by using QAST. In section 4, we describe the used Java is steadily increasing in popularity in the em- benchmarks as well as our evaluation results. Finally bedded and network chips arena. The Java technology we give our concluding remarks and the future work. achieves its platform independence by compiling Java source code into machine independent “bytecodes” that 2. QJAVA System Description are executed on the JVM. These bytecodes are typically 2.1 QJAVA Architecture Overview executed by an Interpreter, or a Just-In-Time (JIT) compiler, or executed directly by specialized Java pro- The queue-based execution model (QEM) performs cessors. In addition, it was widely recognized that each most operations on a first-in-firstt-out (FIFO) data current execution mode for java has its own strength structure. While, the stack-based execution model and weakness. While software emulation is easy to im- (SEM) performs the operations on a first-in-last-out plement, it incurs a high overhead during execution of (FILO). the QEM is analogous to the usual SEM. The certain Java workloads. A Java processor eliminates the QEM has operations in its instructions set which im- software layer. However, a direct execution of bytecodes plicitly reference to an operand queue, just as SEM has on stack-based processors is invariably constrained by operations, which implicitly reference an operand stack. the limitations of the stack architecture for accessing Each instruction takes out the required number of operands. This inherent the dependence severely limits operands from the head of the operand queue, performs the instruction level parallelism. some computations, and stores the results of the compu- In order to improve the instruction level parallelism tations at the tail of the operand queue, which occupies in java byte code, we proposed a new parallel Java exe- continuous storage locations (described later). That is, cution model named queue-based Java execution model the execution order of instructions coincides with order (QJVM). The above new computing model is based on of the data in the operand queue. the Queue computing scheme and uses a first in first The QJAVA is a high instruction level paral- out (FIFO) queue data structure as the underlying con- lelism(ILP) execution environment based on QEM and trol mechanism for the manipulation of operands and Java Platform. It consists of basically of a language and results. virtual machine components. As a result, we will show that the QJVM imple- In our system, the syntax and semantics of Queue- mented in a pipelined arithmetic/logic unit (ALU) is Java Language is consistent with the conventional Java more efficient than the stack based JVM. That is, Language Specification released by Sun Microsystems, the QJVM has the potential to take advantage of a to protect Java Easy-Using and Object Oriented fea- pipelined ALU when the operand queue is not empty. tures. The difference is found in the Virtual Machine On the other hand, the Stack based JVM cannot exploit environment itself. pipelined ALU since the result of one operation must be The high performance ILP of QJAVA comes from its returned to the top of the stack before they can become Queue Java Virtual Machine(QJVM) which use QEM. The back end consists of the following phases: 1. Instruction selection: to map IRs into assembly code 2. Code optimization: to optimize the assembly code using control- and data flow analysis, etc. 3. Code emission: to generate machine code from as- sembly code. 2.3 AST to QAST Translation Figure 1. QJAVA and Java Execution Environment However the conventional Java Virtual Machine uses SEM. We will demonstrate later the merit of the QJAVA System. To ease understanding we give in Figure 1 a Figure 3. Post, Level Traversal Order and QAST with schematic representation of QJAVA and Java execution examples environment. 2.2 QJAVAC Implementation Overview The QAST is a new type of syntax tree that is op- timum for QJAVAC compiler. To compare the QAST The QJAVAC is a complier, which has a similar im- with the abstract syntax tree (AST), we will use a simple plementation like other multiple phases Java Compilers. example shown in Figure 3. In Figure 3(a), the instruc- The QJAVAC overview is shown in Figure.2. tion generation for SEM is obtained by traversing the In order to target the novel QJAVA architecture, a tree in post order travel. From the above traversal, it is “reParsing” stage is added into the front end of JAVAC. very clear to notice that ASTs provides enough informa- So the QJAVAC front end consists of the following tion for the SEM’s compiler by connection between two phases: nodes in AST. With the “connection” lines, the com- piler can easily jump to the children and back to parent to produce instructions in post order manner. However, this traversal will not work when dealing with QEM. Therefore, to get a correct instruction gen- eration sequences for the QJAVAC, the traversal of the above tree is changed as illustrated in Figure 3(b). We call this traversal a level order traversal. So, in order to find the deepest and shallowest nodes, the compiler must traverse the entire tree at first, remember the po- sition of the nodes, and then load the tree again to emit instructions. However, we have to note that, since there is not relation between the same-level of nodes, finding the same nodes in instructions generation stage is very difficult and its algorithm becomes very complex, huge, and “time hungry”. Figure 2. QJAVAC Compiler Implementation In order to cope with this problem and reduce the instruction generation time, we propose QAST. The 1. Scanning: a scanner maps input characters into to- QAST for a simple expression is shown in Figure 3(c). kens. The right hand part of the figure is the translated graph. 2. Parsing: a parser recognizes sequences of tokens In the graph, we have to note that the connect path according to some grammar and generates ASTs. (Line) only appears between two nodes. In addition, the 3. Re-parsing: a translator that translates ASTs into connect information does not only appear between par- the QASTs. ent and child nodes; it also appears between “brother” 4. Semantic analysis: this phase performs type check- and “brother” nodes. ing and translates QASTs into universal Interme- From Figure 3(c), we can also notice that the sum diate Representations (IRs). of nodes in the expression are kept, the connections are 5. Optimization: to optimize IRs. created between brother and brother (same-level) nodes. Using the proposed QAST, instruction sequence gen- erations can be easily derived as described in flow chart given in Figure 5 acting as a recursive fucnction. There are basically five steps that should be followed to get a correct and efficient instructions generation. The above steps are summarized as follow: 1. Enter a node; check whether it is a parent node. 2. If it is, flow to his child node 3. If it is not, emit the instruction(s) belonging to this node 4. Check it for whether it has right side-brother node. 5. If it has, flow to its right side-brother node. Then, back (loop) to step (1). The instructions generation algorithm with QAST is very simply and effective. 3. Evaluations Results and Discussions Figure 4. Translation from AST to QAST Flow Chart 3.1 Methodology We have developed the QJAVAC compiler with ANSI/ISO C++ language. The above compiler was suc- In addition the necessary connections among some par- cessfully ported to Windows (with Visual C++6.0), Red ents’ and childs nodes are still preserved and the con- Hat Linux 7.1J and SunOS 5.6 (with GNU C++ Com- nection which are not exploited are removed.