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WHITE PAPER Flash 101 and Flash Management WHITE PAPER Flash 101 and Flash Management A detailed overview of flash and flash management WESTERN DIGITAL CONFIDENTIAL Western Digital Technologies, Inc. or its affiliates' (collectively “Western Digital”) general policy does not recommend the use of its products in life support applications where in a failure or malfunction of the product may directly threaten life or injury. Per Western Digital Terms and Conditions of Sale, the user of Western Digital products in life support applications assumes all risk of such use and indemni- fies Western Digital against all damages. This document is for information use only and is subject to change without prior notice. Western Dig- ital assumes no responsibility for any errors that may appear in this document, nor for incidental or consequential damages resulting from the furnishing, performance or use of this material. Absent a written agreement signed by Western Digital or its authorized representative to the con- trary, Western Digital explicitly disclaims any express and implied warranties and indemnities of any kind that may, or could, be associated with this document and related material, and any user of this document or related material agrees to such disclaimer as a precondition to receipt and usage hereof. Each user of this document or any product referred to herein expressly waives all guaranties and war- ranties of any kind associated with this document any related materials or such product, whether expressed or implied, including without limitation, any implied warranty of merchantability or fitness for a particular purpose or non-infringement. Each user of this document or any product referred to herein also expressly agrees Western Digital shall not be liable for any incidental, punitive, indirect, special, or consequential damages, including without limitation physical injury or death, property damage, lost data, loss of profits or costs of procurement of substitute goods, technology, or ser- vices, arising out of or related to this document, any related materials or any product referred to herein, regardless of whether such damages are based on tort, warranty, contract, or any other legal theory, even if advised of the possibility of such damages. This document and its contents, including diagrams, schematics, methodology, work product, and intellectual property rights described in, associated with, or implied by this document, are the sole and exclusive property of Western Digital. No intellectual property license, express or implied, is granted by Western Digital associated with the document recipient's receipt, access and/or use of this document or the products referred to herein; Western Digital retains all rights hereto. This document and Western Digital communications to the user associated therewith, shall be treated as Western Digital Corporation’s proprietary and confidential information, protected by the recipient as such, and used by the recipient only for the purpose authorized in writing by Western Digital Corporation. This document shall be covered as Western Digital Corporation’s confidential information under all applicable nondisclosure agreements between the recipient and Western Digi- tal Corporation. Western Digital and the Western Digital logo are registered trademarks or trademarks of Western Digital Corporation or its affiliates in the U.S. and/or other countries. The microSD, microSDHC, microSDXC and SD marks and logos are trademarks of SD-3C, LLC. All other marks are the property of their respective owners. Product specifications subject to change without notice. Pictures shown may vary from actual products. Not all products are available in all regions of the world. © 2018 Western Digital Corporation or its affiliates. All rights reserved. WESTERN DIGITAL CONFIDENTIAL - 2 - Table of Contents TABLE OF CONTENTS 1. INTRODUCTION ................................................................................................................. 4 2. NAND FLASH TECHNOLOGY.............................................................................................. 4 3. NAND FLASH CELL........................................................................................................... 5 4. NAND FLASH ARCHITECTURE............................................................................................ 5 4.1 Erase Blocks and Pages .................................................................................................................. 6 4.2 SLC vs. MLC NAND Technology ..................................................................................................... 6 5. INHERENT NAND FLASH CHALLENGES.............................................................................. 7 5.1 Erase before Write .......................................................................................................................... 8 5.2 Read/Write Disturb ........................................................................................................................ 8 5.3 Data Retention Errors...................................................................................................................... 9 5.4 Bad Blocks...................................................................................................................................... 10 5.5 Limited Number of Writes ............................................................................................................ 10 6. FLASH MANAGEMENT TECHNIQUES.................................................................................... 11 6.1 Wear Leveling.................................................................................................................................11 6.2 Exception Management .................................................................................................................12 6.2.1 NAND Failure Management....................................................................................................12 6.2.2 Unstable Power Supply .........................................................................................................12 6.3 Error Detection and Correction ....................................................................................................13 6.3.1 LDPC vs. BCH ..........................................................................................................................14 7. SYSTEM OPTIMIZATION TECHNIQUES .................................................................................14 7.1 Write Amplification ........................................................................................................................14 7.2 Understand and Optimize Your System .......................................................................................15 8. PRODUCT NAME CHANGE.................................................................................................16 9. CONTACT INFORMATION...................................................................................................17 WESTERN DIGITAL CONFIDENTIAL - 3 - Introduction 1.0 INTRODUCTION The inherent nature of NAND flash technology requires sophisticated flash management techniques to make it a practical storage medium for computing systems. Challenges intrinsic to using NAND flash in a managed device (e.MMC, SD, micro SD etc.) include: Requirement to erase before program (writing) Wear out mechanism that limits service life Data errors caused by write and read disturb Data retention errors Management of initial and runtime bad blocks With proper flash management techniques, these characteristics of NAND flash can be managed to provide a highly reliable data storage device. Five significant factors influencing reliability, performance, and write endurance of the managed NAND devices are: Use of Single-Level Cell (SLC) vs. Multi-Level Cell (MLC) NAND flash technology Wear-leveling algorithms Ensuring data integrity through Bad Block management techniques Use of error detection and correction techniques Write amplification Proper implementation of sophisticated flash management techniques will deliver products with high reliability, long service life, high performance, and excellent data integrity characteristics. This white paper provides an overview of NAND flash technology, its intrinsic characteristics, and explains how proper flash management techniques address specific NAND issues to create reliable managed NAND device with a long service life. 2.0 NAND FLASH TECHNOLOGY NAND flash is a nonvolatile solid state memory with the capability to retain stored data when unpowered. NAND and NOR are the two fundamental flash architectures used in electronic systems today. Both NOR and NAND Flash memory were invented by Dr. Fujio Masuoka in 1984 [1]. The first commercial NAND flash chip was introduced in 1989. NAND flash offers faster erase and write time up to ten times compared to NOR flash [2]. It requires a smaller chip area per cell (compared to NOR), thus allowing greater storage densities and lower cost per bit. NAND flash achieves these advantages by sharing some of the common areas of the storage transistor through strings of serially connected transistors. NOR devices require additional control circuits to independently access each storage transistor for random, independent addressability. NAND flash access is similar to other block-oriented storage devices such as hard disks and optical media, and therefore is frequently used in mass-storage devices such as memory cards,
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