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Buck Converter External Components Selection

The Buck Converter is used in SMPS (switched mode power supply) circuits when the DC output voltage has to be lower than the DC input voltage. It is extensively used when www.onsemi.com high efficiency is required, especially in battery supplied applications where it improves battery life and reduces APPLICATION NOTE power dissipation. This document describes step by step how to select the external components that are used by the buck converter. Although generally applicable, this selection method is in particular of interest for the members of the NCP63xx and NCV63xx family. Current Iinductor DI BUCK CONVERTER BASICS L IOUT A synchronous buck converter is comprised of two power IVIN MOSFETs, an inductor and input/output capacitors D arranged as depicted in the Figure 1. The MOSFETs IC Icapacitor maintain energy level in the inductor, and the on/off control Time is synchronizing to regulate the output voltage. Voltage

VIN VSW

TON TOFF

I I I PMOS PVIN inductor OUT TSW CIN SW OUT DC-to-DC Time Control LOUT VSW Figure 2. Synchronous Buck Converter Waveforms NMOS

I capacitor The PMOS is commonly named High Side Switch (HSS) C OUT and the NMOS is Low Side Switch (LSS) or synchronous GND rectifier. Figure 2 illustrates the voltage and current waveforms of Figure 1. Synchronous Buck Converter the buck converter. This will help to understand the rest of this document The PMOS connected between VIN and SW allows TON TON D + + + T @ F charging the LC filter: when ON, it transfers energy from T ) T T ON SW input to output. The NMOS is off during this phase. When ON OFF SW * the PMOS turns off, the NMOS is activated and the energy + 1 D + D TOFF and TON (eq. 1) stored in the inductor is provided to the output. FSW FSW

COMPONENTS SELECTION VOUT Inductor Selection

Let’s start with the governing inductor current/voltage VOUT_PP(ESL) equation to obtain relation between L and DIL: V dIL OUT_PP V + L @ V L dt OUT_PP(ESR) During on-time, assuming ideal HSS, the voltage across the inductor is (V –V ) so we have IN OUT , VOUT_PP(C) dI DI + ǒ * Ǔ + @ L + @ L VLON VIN VOUT L L dtON TON V + V ) V ) V D D ǒV * V Ǔ OUT_PP OUT_PP(ESL) OUT_PP(ESR) OUT_PP(C) IL IN OUT + L @ å L + @ D @ D T IL F With SW SW • During off-time, assuming ideal LSS, the inductor voltage VOUT_PP(C) is the ripple voltage of the capacitor is VOUT, so we have • VOUT_PP(ESR) is the ripple voltage due to the ESR of D D the capacitor dIL IL IL V + L @ + L @ + L @ @ F LOFF * SW • VOUT_PP(ESL) is the ripple voltage generated by the dtOFF TOFF 1 D ESL of the capacitor * VOUT (1 D) å L + VOUT_PP(C) Equation: DI @ F L SW From the Figure 2, we can extract the inductor and Form the two previous equations we can extract: capacitor currents, and illustrate the charge of the capacitor: V + OUT D IL TSW VIN T T Finally the inductance corresponding to a given current ON OFF D ripple IL is: IOUT DI ǒ * Ǔ @ L VIN VOUT VOUT L + (eq. 2) D @ @ IL FSW VIN Note that the inductance of the inductor is selected such Time I that the peak-to-peak ripple current DIL is approximately C 20% to 50% of the maximum output current IOUT_MAX. Total This provides the best trade-off between transient response charge Q DIL/2 and output ripple. 0 ÉÉÉ Time

The selected inductor must have a saturation current −DIL/2 ÉÉÉ rating higher than the maximum peak current which is calculated by: Figure 3. Inductor and Capacitor Current Waveforms D IL I + I ) We can see that the capacitor current waveform is the L_SAT OUT_MAX 2 same as the inductor current waveform, but without the IOUT Moreover the inductor must also have a high enough component. current rating to avoid self-heating effect. A low DCR is The basic capacitor current/voltage equation is: therefore preferred to limit IR losses and optimize the total dVC efficiency. I + C @ å dt @ I + C @ dV C dt C C Output Capacitor Selection And the relation between charge and capacitor is: The output capacitor selection is determined by the output Q + C @ dV voltage ripple and the load transient response requirement. C Knowing that the charge is the area of the positive portion Ripple of the IC(t) waveform (in red in Figure 3). This area can be For a given peak-to-peak ripple current DIL in the inductor easily expressed as the area of a triangle: of the output filter, the output voltage ripple across the D D 1 IL TSW IL output capacitor VOUT_PP is the sum of three components as Q + @ ǒ Ǔ @ ǒ Ǔ + 2 2 2 8 @ F shown below: SW

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So When the load current changes from load to no load, this D will introduce temporary an increase of the output voltage IL V + (eq. 3) OUT_PP(C) 8 @ C @ F (this is generally named output overshoot VOV). SW The energy with load is: V Equation: DI OUT_PP(ESR) 1 2 1 2 L E + C @ V ) L @ I ,I + I ) The VOUT_PP(ESR) due to the ESR can be extract easily 2 OUT 2 LPEAK LPEAK OUT 2 thanks to the IxR formula: The ESR can be modeled as The energy without load is: a resistor in series with the capacitor 2 + 1 @ ǒ ) Ǔ + D @ E C VOUT VOV VOUT_PP(ESR) IL ESR (eq. 4) 2 The energy preceding the load change has to be equal to VOUT_PP(ESL) Equation: the energy after the load change: Again, let’s start with the governing inductor current/ 1 2 1 2 1 2 C @ V ) L @ I + C ǒV ) V Ǔ voltage equation: 2 OUT 2 LPEAK 2 OUT OV

dIL Finally ESL 1 1 V + L @ å V + L @ DI @ ǒ ) Ǔ ESL ESL dt ESL ESL L T T L @ I 2 ON OFF + LPEAK CLT (eq. 7) 2 2 FSW ǒ ) Ǔ * + @ D VOUT VOV VOUT LESL IL D @ (1 * D) Example: V ǒV * V ǓV OUT IN OUT OUT m By using D + and DIL + we have 3 MHz DCDC, VIN = 3.3 V, VOUT = 1.1 V, L = 0.470 H. VIN L @ FSW @ VIN 3 A load transient, 50 mV overshoot: VIN + @ 2 VOUT_PP(ESL) LESL (eq. 5) @ L L IIPEAK C + LT 2 In applications with all ceramic output capacitors, the ǒ ) Ǔ * 2 VOUT VOV VOUT main ripple component of the output ripple is VOUT_PP(C). 2 The minimum output capacitance can be calculated based on (3 ) 0.26) + 0.00000047 @ + 44 mF 2 a given output ripple requirement VOUT_PP(C) in continuous (1.1 ) 0.05) * 1.12 current mode (CCM): D Input Capacitor Selection IL C + (eq. 6) PP @ @ One of the input capacitor selection requirements is the 8 VOUT_PP(C) FSW input voltage ripple. For a given output current IOUT, the Example: input voltage ripple across the output capacitor VIN_PP is, like the output capacitor, the sum of three components as 3 MHz DCDC, V = 3.3 V, V = 1.1 V, L = 0.470 mH IN OUT shown below: ǒ * Ǔ VIN VOUT VOUT DI + L @ @ VOUT L FSW VIN (3.3 * 1.1) 1.1 + + 520 mA 0.00000047 @ 3000000 @ 3.3 VIN_PP(ESL) With 10 mV of desired output ripple, the minimum output V capacitor will be: IN_PP VIN_PP(ESR) D IL C + PP @ @ 8 VOUT_PP(C) FSW VIN_PP(C) 0.520 + + 2.2 mF 8 @ 0.01 @ 3000000

+ ) ) Load Transient VIN_PP VIN_PP(ESL) VIN_PP(ESR) VIN_PP(C) For the estimation of the capacitor during load transient, the starting point is that the total energy of the output stage With: has to be constant during the transition. • VIN_PP(C) is the ripple voltage of the capacitor The total energy of the output stage is: • VIN_PP(ESR) is the ripple voltage due to the ESR of the 1 2 1 2 capacitor E + E ) E + C @ V ) L @ I C L 2 C 2 L • VIN_PP(ESL) is the ripple voltage generated by the ESL of the capacitor

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VIN_PP(C) Equation: With input current approximated to spare current The current flowing into the input capacitor is: IOUT • V + L @ (eq. 10) The difference between input and inductor currents IN_PP(ESL) ESL dt during the ON-time To minimize the input voltage ripple and get better • The input current during the OFF-time decoupling at the input power supply rail, a ceramic capacitor is recommended due to low ESR and ESL. During the OFF-time, the capacitor is charged with current IIN, while during the ON-time it is discharged. In Example: steady state the charge and discharge of the capacitor is equal 3 MHz DCDC, VIN = 3.3 V, VOUT = 1.1 V, IOUT = 3.0 A, and generates the input voltage ripple. L = 0.470 mH. By using the governing capacitor current/voltage With 50 mV of desired input ripple, the minimum input equation during OFF-time we have: capacitor will be: V @ dVC IN_PP(C) IIN TOFF I + C @ + C @ å C + @ ǒ1.1 * 1.1 @ 1.1Ǔ IN IN INPP INPP * 2 3 dt T V IOUT (D D ) 3.3 3.3 3.3 OFF IN_PP(C) C + + + 4.4 mF INPP @ @ 1 * D VIN_PP(C) FSW 0.05 3000000 With IIN + D @ IOUT and TOFF + FSW The minimum input capacitance with respect to the input Summary ripple voltage VIN_PP(C) is: Table 1. SUMMARY * 2 IOUT(D D ) C + (eq. 8) Components Equation INPP @ VIN_PP(C) FSW Output Inductor ǒ * Ǔ @ VIN VOUT VOUT L + VIN_PP(ESR) Equation: D @ @ IL FSW VIN The VIN_PP(ESR) due to the ESR can be extract easily thanks to the IxR formula: The ESR can be modeled as Output Capacitor For Ripple D a resistor in series with the capacitor, and the IIN extracted IL C + PP @ @ from IOUT (see Figure 4). Generally the ripple current is low 8 VOUT_PP(C) FSW compare to output current, so the input current is assimilated to square current (0 to/from IOUT) For Transient Load @ 2 L IIPEAK Current C + I LT 2 inductor ǒ ) Ǔ * 2 VOUT VOV VOUT DIL Input Capacitor * 2 IOUT(D D ) I OUT C + INPP @ I IN VIN_PP(C) FSW

NCP63xx and NCV63xx Family The NCP63xx and NCV63xx family of products are Time synchronous buck converters with both high side and low Figure 4. Input and Output Current Waveforms side integrated switches. Neither external transistor nor diodes are required for proper operation. The feedback and compensation networks are also fully + D @ VIN_PP(ESR) IIN ESR integrated. The high switching frequency allows the use of So smaller size output filter components: This contributes to V + I @ ESR (eq. 9) reducing overall solution size. IN_PP(ESR) OUT During external component selection, please verify compatibility with the recommended components described VIN_PP(ESL) Equation: Again, let’s start with the governing inductor current/ in the datasheet. voltage equation:

dIIN V + L @ ESL ESL dt

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