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IDF2011 Opening Keynote Shares Connected Computing Vision

Intel Embraces Android in Mobile Push Rampant Change Drives Need for Standard Telecom Platform

Gold Sponsors Scalability

conga-BM67 - Extreme Graphics Performance 2nd Generation Intel® Core™ i7 processors up to 2.1 GHz Maximum computing power and graphics performance

conga-BS57 - Ultra Low Voltage Intel® Core™ i7-620LE processors up to 2.0 GHz Computing power and graphics performance at low power consumption

conga-BE57 - ECC Memory Support Intel® Core™ i7-610E processors up to 2.53 GHz Error Correction Code (ECC) memory for controlled reliability

conga-CA6 - COM Express Compact Lowest power consumption, extended temperature range Based on Intel® Atom™ processor E600 series and Intel® Platform Controller Hub EG20T congatec Inc. | 6262 Ferris Square San Diego | CA 92121 USA | Phone: 858-457-2600 | [email protected] Meet this attractive family at: www.congatec.us

© 2011 congatec AG. All rights reserved. conga and congatec are registered trademarks of congatec AG. Intel, Intel Core are trademarks of Intel Corporation in the U.S. and other countries. COM Express is a registered trademark of PICMG. X-ES 2nd Generation Intel® Core™ i7 Processor-Based Solutions: Delivering Innovation In 2010, Extreme Engineering Solutions, Inc. (X-ES) developed more Intel® Core™ i7 processor-based products based on VPX, CompactPCI, VME, CompactPCI Express, and XMC form factors than anyone in the industry. This year, X-ES has added solutions based on the 2nd generation Intel Core i7 processor. Providing products customers want, when they want them – that truly is innovation that performs.

X-ES offers an extensive product portfolio that includes commercial and ruggedized single board computers, high-performance processor modules, multipurpose I/O modules, storage, backplanes, enclosures, and fully integrated systems.

2nd generation Intel Core i7 processor-based solutions available in a variety of form factors. Call or visit our website today. IN THIS ISSUE

FALL 2011

32 The Move to Distributed Healthcare DEPARTMENTS Devices incorporate sensors and telehealth capabilities to increase access. By Cheryl Coupé, Contributing Editor FROM THE ED ITOR 4 IP Bubble Raises the Lawyer-to-Engineer Ratio 34 Death, Taxes - and USB! By John Blyler, Editorial Director Microcontroller vendors support USB’s continued growth in embedded applications. NEWS By Cheryl Coupé, Contributing Editor 6 Product News By Jim Kobylecky TECHNOLOGY APPLICATIONS FOCUS ON INTEL 12 IDF2011 Opening Keynote Shares Connected Computing Vision 37 The Need for a New Approach to Networking Intel’s CEO focused on the evolution and future of computing Developer Tools that will deliver three essentail capabilities - engagement, By Rick Denker, Packet Plus, Inc. consistency and security. By John Blyler, Editorial Director 40 More Analog Needed for Multicore SoCs FOCUS ON INTEL By Mike Demler, Contributing Editor 17 Intel embraces Android in Mobile Push In a major change of direction, Intel Corp. has thrown its weight 42 On-Chip Interconnection IP Gains Attention behind Android. By John Blyler, Editorial Director By Mark LaPedus, Senior Editor FOCUS ON INTEL LAST WORD 19 Intel tips 22nm SoC recipes, 14nm process Seeking to extend its technology lead, Intel Corp. disclosed its recipes to enable 22nm system-on-chip (SoC) devices and also provided a glimpse of its 14nm process. 56 Intel’s Hybrid CPU-FPGA By Mark LaPedus, Senior Editor By Tom R. Halfhill, The Linley Group MARKET WATCH 21 Intel Challenges ARM with IP and Interconnect PRODUCT SHOWCASE Strategy Intel reveals key pieces of its SOC realization strategy with 45 6WIND the announcement of a new on-chip interconnect fabric and a growing collection of IP. Should ARM be worried? 46 AXIOMTEK By John Blyler, Editorial Director 46 AXIOMTEK 47 COMMELL SPECIAL FEATURES 48 Emerson Network Power 48 Emerson Network Power 23 Rampant Change Drives Need for Standard 49 Emerson Network Power Telecom Platform Intel’s strategy helps equipment developers address both cost 49 Emerson Network Power and revenue vectors. 50 Emerson Network Power By Cheryl Coupé, Contributing Editor 51 ITOX 26 ATCA Continues to Heat Up 51 Lauterbach Power and thermal management offer on-going challenges. By Cheryl Coupé, Contributing Editor 52 LiPPERT 53 MSI Computer 54 VersaLogic Corp. 54 VersaLogic Corp. 55 Extreme Engineering Solutions Cover image: Intel’s researchers have created a prototype chip that could allow a computer to power up on a solar cell the size of a postage stamp.

2 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com ?^acfT[[ EmbeddedEmbedded withwith UnlimitedUnlimited ApplicationsApplications

Portwell’s flexible business model and optimized SFF boards & systems have helped numerous Medical, Networking, and Industrial OEMs reduce costs, save space, accelerate development schedules and extend system longevity. Contact us to learn how we can tailor our embedded solution offering to your exact needs!

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‡ Wide selection of COM Express and Qseven modules ‡ Extended temp Qseven modules ‡ The latest Intel® Core™ i5/i7 and single-/ dual-core Atom™ CPUs ‡ Custom carrier board design and manufacturing ‡ Quick time-to-market solutions Computer-on-Modules ‡ Extended temp and ECC memory support

ISO 9001:2008 ISO 13485:2003 FROM THE EDITOR

IP Bubble Raises the Lawyer-to- www.embeddedintel.com

Engineer Ratio V.P. and Associate Publisher Clair Bright By John Blyler, Editorial Director Editorial Editorial Director John Blyler [email protected] (503) 614-1082 he high-stakes game of IP acquisition has some observers won- Managing Editor - NA Cheryl Coupé, Jim Kobylecky dering if the lawyer-to-engineer ratio has reached a new high. T Managing Editor - China That would be bad news for an economy based on innovation. Jane Lin-Li It is being called a “Patent Bubble.” Large individual companies Contributing Editors Cheryl Ajluni, Mark LaPedus, and conglomerates are buying up major amounts of patents and Ed Sperling, Craig Szydlowski, Nicole Freeman, semiconductor intellectual property. The latest so-called “mind” Ann Steffora Mutschler, Cheryl Coupé grab has been Google’s recent acquisition of more than 1,000 pat- Creative/Production Production Manager ents from IBM. Google’s actions follow in the wake of a Google-Intel failed bid Spryte Heithecker to acquire Nortel Network’s patents. The winning bid was submitted by a Micro- Graphic Designers Nicky Jacobson soft- and Apple-led consortium. (See, “What is the Freshness Date on Nortel’s Keith Kelly - Senior IP Patents?) Production Assistant Jenn Burkhardt It used to be that strategic acquisition of patents – including semiconductor Senior Web Developer IP – enabled technology innovation in new areas. But today, many argue that pat- Mariam Moattari ent acquisition is merely a protective move against growing corporate litigation. Advertising / Reprint Sales Vice President, Sales Apparently, IP is considered the best defense against ever-increasing patent trolls. Embedded Electronics Media Group The problem seems to be Clair Bright [email protected] two-fold. First, many patents (415) 255-0390 ext. 15 are vaguely written. Second, Marketing/Circulation politicians seem to believe Jenna Johnson To Subscribe that patent generation is a key www.embeddedintel.com measure (or even source) of job-creating innovation. This type of reasoning may explain Extension Media, LLC why they become politicians Corporate Office instead of engineers. President and Publisher Cartoonist Scott Adams Vince Ridley [email protected] recently blogged about the (415) 255-0390 ext. 18 lawyer-to-engineer ratio, V. P. and Associate Publisher Embedded Electronics Media Group suggesting that this ratio Clair Bright was the best indicator of the [email protected] long-term economic health of (415) 255-0390 ext. 15 Vice President, Marketing and Product Development a country. I agree. Engineers Karen Murray create, while lawyers (at best) [email protected] Vice President, Business Development protect. At worst, the latter Melissa Sterling creates a hostile environment for creating new products. The lower the L-to-E [email protected] ratio, then the greater the probability of innovation. A higher L-to-E ratio means Human Resources / Administration Rachael Evans an increased risk of litigation. In these economic times, it’s easy to do the math – unless you’re a politician. Special Thanks to Our Sponsors

John Blyler can be reached at: [email protected]

Embedded Intel ®Solutions is sent free to engineers and embedded developers in the U.S. and Canada who design with Embedded Intel® Processors. Embedded Intel ®Solutions is published by Extension Media LLC, 1786 18th Street, San Francisco, CA 94107. Copyright © 2011 by Extension Media LLC. All rights reserved. Printed in the U.S.

4 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Condition Monitoring by LEMT

Do you need to know, on-line and immediately, what is happening with your remote system? „LEMT is for you.”

If your Embedded PC system must be secure, stable and running at optimum performance, constant monitoring, „Condition Monitoring“, is crucial. LEMT, being upward com- patible with eAPI, provides this Condition Monitoring for your COM Express, CoreExpress®, PC/104 and EPIC boards. For example, you can Continuously keep the optimum balance between Power and performance in battery-powered systems. Optimize maintenance of often problematic stand-alone devices. LEMT - Condition Monitoring gives you a con- stant overview of the device´s status and thus allows high uptimes. Keep repair costs and downtime low. LEMT helps here providing error codes and storing relevant data for analysis and repair.

Main Features Device identification Device status indication Redundant Fail Safe BIOS Storage of board specific data Measuring of current consumption „Secure“ and „User“ Flash

LEMT Architecture

LiPPERT Embedded Computers Inc. Toll Free (866) 587 8681 2220 Northmont Parkway Suite 250 [email protected] Duluth, GA 30096 www.lippertembedded.com Phone (770) 295 0031 · Fax (678) 417

Save time and money, keep your system under control and bring the best possible products to market. www.lippertembedded.com/lemt.html LiPPERT´s Condition Monitoring can help you. NEWS

Product News

NEWS By Jim Kobylecky, Managing Editor

Advanced Digital Logic Releases Intel® Core™ i7 from the latest 32nm mobile Intel® Core™ i7 , Core™ i5, Core™ i3 processor-based SBC in PC/104 processors with Intel® B65 Express chipset and LGA1155 socket. Advanced Digital Logic Inc. has released its ADLQM67PC This highly integrated CPU card features Intel® HD technology single board computer. The ADLQM67PC features the 2nd and multiple displays via DisplayPort (optional) and VGA for generation Intel® Core™ i7 processor that incorporate Intel’s advanced 3D graphics performance. The system memory is latest embedded two-chip platform. This 2nd generation Intel provided via two DIMM slots that accommodates up to 8 GB Core i7 processor integrates the Intel® HD Graphics 3000 engine DDR3 1066/1333. These features make it an ideal solution for a with Intel® Advanced Vector Extensions as well as the memory wide range of industrial and embedded applications including controller functions of a traditional GMCH. The Mobile Intel® gaming, DSA, DVR, network computing, and more. QM67 Express Chipset provides PCI-Express I/O bandwidth at twice the speed (5 Gbps) of previous Intel Core i7 or Intel® ADLINK Announces Entry Core™ 2 Duo processor platforms. The ADLQM67PC is ideal level COM Express® Type 2 for rugged applications where high processor performance is Computer-on-Module critical. It brings unparalleled performance to applications such ADLINK Technology’s Express- as radar and sonar processing, image signal processing, tactical LPC joins its Computer-on-Module command and control, surveillance and reconnaissance, (COM) family. The Express-LPC transportation and railway. in Compact form factor measures just 95 x 95 millimeters, and is fully Emerson Launches Fanless Embedded Computer compatible with the Type 2 pin-out with 2nd Generation Intel® Processor of the PICMG® COM Express specification. COM Express Emerson Network Power announced its first fanless modules are highly integrated off-the-shelf building blocks embedded computer to feature the 2nd generation Intel® Core™ that are ready to plug into custom-made, application-specific processor. One of the first of its kind in the industry, the KR8- carrier boards for embedded and mobile applications. 820 is ideal for variety of applications including digital signage, Typically targets calculation intensive applications such intelligent kiosks, medical carts and gaming machines. An a Robotics, Test and Measurement, entry level Medical innovative grooved metal enclosure transfers heat from inside, Diagnostics and Industrial Automation, the Express-LPC acting as a heat sink and removing the need for a fan. It features is the perfect replacement for existing Intel® Pentium® M the dual-core 2nd generation Intel® Core™ i5-2510E processor processor- based designs, offering better performance at a running at 2.5 GHz to provide a significantly improved power/ lower price and much lower power envelope. performance ratio over previous generation processors for both general and graphics processing. With 4GB DDR3 memory X-ES Packs 3.5 TB of Solid State Storage in Rugged and an 80GB solid state drive in a robust metal enclosure, the ½ ATR Network System KR8-820 has no moving parts to ensure long-term reliability. Extreme Engineering Solutions, Inc. (X-ES) announces the It is fully Intel® vPro™ technology certified, providing robust availability of the XAct3000 Rugged Solid State Storage System. security and remote management capability for trouble-free The natural convection-cooled sub-½ ATR system supports deployment. Measuring just 200 mm x 250 mm x 70 mm (7.87 between 1 TB and 3.5 TB of rugged solid state storage. The x 9.84 x 2.76 inches), the KR8-820 can be wall mounted or XAct3000 is a turnkey NAS; by simply configuring the JBODs mounted within a larger cabinet or kiosk for operation in an or RAID units and connecting it to an Ethernet network, environment of zero to 35 degrees Celsius. customers can start storing and retrieving files. It supports ATA secure erase and meets the erase requirements of the Axiomtek Reveals LGA1155 Intel® Core™ i7/ i5/ i3 DOD NISPOM 5220.22 and NSA/CSS 9-12 specifications. processor-based PICMG 1.0 Full-size CPU Card The rugged Network Attached Storage (NAS) system supports Axiomtek announces the availability of a new PICMG 1.0 NFS, SMB/CIFS, FTP, SFTP, and HTTP protocols. Data full-size slot CPU card, SBC81210. It offers broad scalability encryption is also available for the system.

6 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Fanless 1.66GHz Industrial SBC of EPIC Proportions

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high-speed USB 3.0 peripheral support contained in the latest high performance processors and chipsets in place of parallel PCI and IDE interfaces that are no longer present in most new chipsets. This announcement means that medical, commercial and industrial system OEMs using Portwell COM Express modules can either continue to follow COMMELL Launches SBC Series with Intel® Q67 Portwell’s Type 2 product roadmap or migrate to Type 6 at Express and Mobile Intel® QM67 Express Chipsets their leisure, as both pinout types are provided by Portwell Taiwan Commate Computer Inc. (COMMELL) has launched for the second-generation Intel Core i7/i5 processors with a series of Single Board Computers with Intel® Q67 Express 7-year lifecycles (through 2018). and Mobile Intel® QM67 Express Chipsets. The products include LV-67G with Q67 Mini-ITX motherboard, AS-C74 Wind River Unveils Graphics-Rich Linux Platform with Q67 ATX motherboard, MS-C73 with QM67 MicroATX Wind River offers immediate availability of Wind River motherboard and HS-773 with QM67 Half-size PCI CPU Card. Linux 4, Update Pack 2, the latest release of its commercial These SBC are all designed for the 2nd generation Intel® Core embedded Linux runtime and development platform. It is the ™ i7, Core™ i5, Core i3™ processors in the LGA1155 by the Intel first commercial embedded Linux to provide a fully integrated Q67 Express chipset and in the rPGA988B by the Mobile Intel graphics software stack, from the board to the user interface QM67 Express chipset. The platform supports Intel® Turbo framework level, for the latest Intel and Texas Instruments’ Boost Technology 2.0, to provide even more performance when processors. The pre-integrated graphics stack within Wind needed on the latest-generation Intel® microarchitecture code River Linux includes GTK, Qt, X.Org and the Wind River name Sandy Bridge. This innovative two-chip platform is ideal Tilcon Graphics Suite. It works out of the box using the latest for applications such as industrial control and automation, hardware and graphics drivers, including Intel® Embedded gaming, Medical Instruments, Surveillance Server, Military Media and Graphics Driver on Intel® Atom™ processor with systems, print imaging and digital signage etc. OpenGL and PowerVR driver on Texas Instruments’ (TI) AM35x, AM37x, AM389x TI Sitara™ ARM® microprocessors WinSystems IP65-rated Panel PCs Perform and OMAP35x processors with OpenGL ES. This stack Demanding Industrial Applications bundles the latest versions of popular graphics applications Four new industrial-grade Panel PCs were introduced by and is optimized for embedded development. In addition, WinSystems. Available with 12-, 15-, 17- or 19-inch diagonal Linux Standard Base (LSB) certification assures compatibility displays and touch screens, the PPC65 family of Panel PCs is with all LSB-compliant third-party applications. powered by a fully integrated 1.6 GHz Intel® Atom™ processor- based single board computer (SBC) which offers a multitude TenAsys® Networked RTOS for Multi-Core, Multi- of I/O connectivity options. The front bezels on these Panel Platform Embedded PCs are environmentally sealed to comply with NEMA 4/ TenAsys Corporation announced a scalable real-time OS IP65 specifications to prevent damaging moisture, dust, called INtime® Distributed RTOS based on the company’s and dirt from getting into it. They are targeted for medical, established product, INtime for Windows®, INtime Distributed utility, security, transportation, pipeline, industrial test/ RTOS enables programmers to write applications that run measurement and food processing applications that need tight without modification on different system configurations system integration and minimal space requirements. Each spanning from single-core or multi-core processor systems unit meets and exceeds industry standards for RF emissions, to multi-platform systems with multi-core processors. The susceptibility, and shock/vibration. The PPC65 products scalability is made possible with the introduction of global support operating systems such as Linux, Windows XPe, CE objects and an underlying network called GOBSnet. This 6.0, WES7, and Windows 7. WinSystems can customize the inter-process communications technology enables real- Panel PC for OEM applications with a black chassis, custom time embedded applications to leverage the performance art for the bezel, and preloaded operating system. potential of the new 2nd Generation Intel® processor family. For example, by using the Intel® Core™ i7 processor with Intel® Portwell Furthers Its Type IPP libraries one can perform real-time advanced signal 6 Com Express™ Module processing applications on dedicated cores, essentially doing Portfolio away with the need to have separate application-specific American Portwell Technology, processors in a system. Inc. announced its PCOM- B217VG-VI-ECC embedded computer module, which adds IEI the second-generation quad-core and dual-core Intel® IEI Introduces SBCs with Intel® C206 Chipset, USB 3.0, and Core™ i7, Core™ i5 processors to its Type 6 COM Express™ Intel® Active Management Technology (Intel® AMT) 7.0 product portfolio. The Type 6 connector pin assignment IEI Technology Corp. (IEI) has introduced a new SBC is the successor to Type 2, adding the DisplayPort™ and series featuring the Intel® C206 chipset. The IMBA-C2060

8 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com NEWS

and IMB-C2060 are available in ATX and Micro ATX form range, EC-3000 embedded system provides ultimate factor. When combined with the LGA1155 32nm Intel® performance, rich I/O connectivity, and wireless module, is processor (ATX/Micro ATX), the Intel® C206 series is ideal a power-optimized and rich-graphics platform designed for for applications that require ultimate efficiency such as applications in harsh environment, such as military applications, surveillance security monitoring, public infotainment, and remote workstation, vehicle system, surveillance and navigation high-resolution digital signage. The Intel® C206 chipset platform, and subsea offshore oil & gas applications. The fanless supports Intel® Intel AMT 7.0 which allows IT to diagnose housing of EC-3000 presents simply aluminum design and and repair problems remotely. The IEI iEZman application provides vibration tolerance temperature between -40 and +85 allows a remote user to have full control of keyboard and degrees Celsius for extreme environment. Plus with especially mouse by providing an out-of-band KVM function. In designed heat-producing components placement, EC-3000 gives addition, a remote user can view uninterrupted video output it exceptional long-term durability and tolerance to vibration. even with a BSoD (blue screen of death) or missing disk Saving costs of system failures, EC-3000 passes the highest level present. These features are made possible through hardware- of failure tolerance under every possible operating condition to based Intel® AMT 7.0. ensure the reliability under extreme operating environments.

Intel Discloses Architecture of Next Generation Axiomtek Presents Intel® Atom™ processor- Itanium® Processor “Poulson” based 2-slot Fanless Barebone System with Front Intel Corporation announced new architecture features of I/O Access its upcoming Itanium® processor, codenamed “Poulson.” The Axiomtek is offering a new 2-slot fanless industrial barebone new features: Intel® Instruction Replay Technology, Intel® Hyper- system, the IPC922-212-FL. The compact system with Intel® Threading Technology improvements and Itanium processor Atom™ processor D425/ D525 offers in the low power segment, New Instructions are aimed to take full advantage of the next boosting server performance with faster processing speeds. The generation, 12-wide issue architecture. “Poulson”, with eight cores single-core Intel Atom™ processor D425 has a 10-watt TDP and and 3.1 billion transistors, will be the most sophisticated Intel® the dual-core Intel Atom™ processor D525 has a 13-watt TDP. processor to date, and is on track for launch in 2012. It is followed RAM is provided via one SO-DIMM slot that accommodates up to by a future “Kittson” processor, currently under development. 4 GB of DDR3 800. To answer expansion capability requirement There are three key feature areas. The first is Intel Instruction for industrial needs, the IPC922-212-FL outfitted two expansion Reply Technology, which is a major RAS enhancement. The slots with four different combinations of PCIe and PCI slots. This second new feature is an improved Hyper-Threading Technology. CE-certified unit is an application-ready solution ideally suited It supports performance enhancement with Dual Domain for applications such as industrial automation, kiosk, POI, digital Multithreading support, which enables independent front and signage, gaming, DVR and much more. backend pipeline execution to improve multi-thread efficiency. Lastly, Poulson is adding new instructions in four key areas. These Portwell Bases Mini-ITX Embedded Board on 2nd new instructions lay the foundation for the Itanium architecture Gen Intel® Core™ Processor Family to grow with future needs. American Portwell Technology, Inc. introduced WADE-8012, a new Mini-ITX form factor embedded system board. The product Vecow Fanless Intel® Core™ i7 / i5 / i3 Processor- provides high performance and flexibility for functional expansion based Embedded System Supports -40ºC to +85ºC and is ideal for applications in gaming, kiosk, digital signage, Vecow Co., Ltd. marks a new annotation for its Extended medical/healthcare, defense and industrial automation and fanless embedded system with Intel ® Core™ i7, Core™ i5, Core™ control. The WADE-8012 supports the Intel® Q67 Express chipset i3 processor. Operating under -40°C to +85°C wide temperature and the latest 2nd generation Intel® Core™ processor platform. BLOG Software-Defined Everything Blog By Grant Martin This week I was invited to speak at an Intel-sponsored sympo- The idea for the talk was taken from the work I have been doing sium at the Technion, Haifa, Israel. The theme of the symposium on baseband processors and systems the last couple of years, and was “Challenges and Opportunites in System-Level Design and the term “Software-Defined Radio” which has become a little out Verification.” I spoke on the theme “Software-Defined Everything: of fashion in the last little while. I think this is due to taking the The impact on high-level design and validation.” words a little too literally. There were several interesting speakers, most from universi- For the full story, please visit “Taken for Granted:” http:// ties talking about their advanced research, including David www.chipdesignmag.com/martins/2011/09/19/software- Harel who I had the chance to see give a talk for the first time. defined-everything/

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 9 conga-QA6 Extended Temperature Range -40° ... +85°C

3D Intel® Graphics

CAN Bus in this document is carefully checked, no no in this document is carefully checked,

Formfactor Qseven Form Factor, 70x70 mm

CPU Intel® Atom™ processor E6xx series with 1,6 GHz, 1.3 GHz, 1.0 GHz and 600 MHz Intel® Atom™ E680T / E680, 1.6 GHz (45 nm process, 512kb L2 cache, TDP 3.9 W) Intel® Atom™ E660T / E660, 1.3 GHz (45 nm process, 512kb L2 cache, TDP 3.3W Intel® Atom™ E640T / E640, 1.0 GHz (45 nm process, 512kb L2 cache, TDP 3.3W) Intel® Atom™ E620T / E620, 600 MHz (45 nm process, 512kb L2 cache, TDP 2.7W)

DRAM Up to 2 GByte onboard DDR2 memory with 667/800 MT/s

Chipset Intel® Platform Controller Hub EG20

Ethernet Micrel® Gbit Ethernet Phy KSZ9021RN

I/O Interfaces 6x USB 2.0, 2x SATA, 1x SDIO, 3x PCIe, I²C Bus, 1x USB client, LPC bus, CAN Bus

Mass Storage Onboard SATA Solid State Drive up to 32 GByte (optional) Intel and Atom are trademarks of Corporation in the US other countries. Sound Intel® High Definition Audio (Intel® HD Audio)

Graphics Intel® Graphics Core with 2D and 3D hardware Accelerator and dual independet display support.

Video Decode Acceleration Full hardware acceleration for MPEG2, MPEG4, H.264, WMV9 and VC1

Motion Video Support Single channel 80MHz LVDS transmitter, support for flat panels with 1x18 and 1x24 bit data mapping up to a resolution of 1280x768@60Hz. Single channel 160MHz SDVO interface, supports resolutions up to 1920x1080@60Hz and 1280x1024@85Hz. Dual independent display support congatec Board Controller Multi Stage Watchdog, non-volatile User Data Storage, Manufacturing and Board information, Board Statistics, I²C bus (fast mode, 400 kHz, multi-master), Power Loss Control

Embedded BIOS Features OEM Logo, OEM CMOS Defaults, LCD Control, Display Auto Detection, Backlight Control, Flash Update, based on AMI Aptio UEFI

Power Management ACPI 3.0 compliant, Smart Battery Management guarantee of correctness is implied or expressed. © 2010 congatec AG. All rights reserved. All data is for information purposes only. Although all the information contained with All rights reserved. All data is for information purposes only. © 2010 congatec AG.

Operating Systems Windows® XP, Windows® XP embedded Standard, Windows® CE 6.0, Linux 2.6, QNX 6.x

Power Consumption Typ. application ~5 Watt @ 5V

Temperature Range Operating: 0 to +60°C (opt. -40 to +85°C) Storage: -20 to +80°C (opt. -40 to +85°C)

Humidity Operating: 10 to 90% r. H. non cond. Storage: 5 to 95% r. H. non cond.

Size 70 x 70 mm (2¾" x 2¾")

10 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Memory Bus RTC (533MHz or800MHz) Watchdog BC SPI Onboard DDR2 GPIOs Maximum 2GB Board Controller STM32F100R8T6b Intel® Atom™ processor E6xx/E6xxT Series

Hardware Monitoring and Fan Control Circuitry BIOS PCIe Port 0 (Flash)

Intel® Platform Controller Hub EG20/EG20T Gbe MAC 3x x1 PCIe Links (Ports 1,2,3) LPC Bus

Micrel® Gbit Ethernet Phy KSZ9031RN

SSD NandDrive OR SATA1 (optional) Uses SATA 1

Fan (Port 0, 1) 2x SATA Control 1x SATA0 CAN Bus SM Bus I/F HDA 1x SDVO I/F 1x Channel LCD I/F 6x USB Host 1x Device/Client 1x SDIO/MMC SPI Power Management and Control Signals I2C Gbit Ethernet

Engineering Tools / Accessories for Qseven conga-QEVAL 007001 Evaluation platform for Qseven conga-QKIT 077455 Starterkit for Qseven including conga-QEVAL, conga-LDVI/EPI, conga-FPA1, Dual DVI-D ADD2 Card, ATX power supply...

Qseven Mobility Kit 077460 Complete ready-to-use starter-kit for mobile applications conga-Mini Carrier Board 020710 Qseven mini carrier board for mobile applications. conga-Mini Carrier cable kit 400015 Cable Kit for Qseven mini carrier board. Consisting of: 4x USB adapter cable, 1x LVDS display cable, 1x Feature connector cable, 1x HDMI to DVI adapter cable.

Qseven MXM carrier board connector 400012 Socket for Qseven Carrier Boards, Foxconn PN:AS0B321-S78N-7F, standard type, SMT, lead free, 230 positions, 0.50mm pitch, 7.8mm height. 1pcs conga-LDVI/EPI 011115 LVDS to DVI converter board for digital flat panels with onboard EEPROM

Single DVI-D ADD2 Card 058500 ADD2 display adapter card with single DVI-D digital output. Suitable for all Intel based platforms that support Serial Digital Display Outputs (SDVO) on the standard x16 PCI Express Graphics (PEG) port.

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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 11 FOCUS ON INTEL IDF2011 Opening Keynote Shares Connected Computing Vision Intel’s CEO focused on the evolution and future of computing that will deliver three essential capabilities – engagement, consistency and security.

By John Blyler, Editorial Director

he opening keynote at this year’s Intel Developers Forum increasing availability of transistors (see Figure 1). Recent T(IDF) set the stage for three days of high-tech demon- improvements included 3D transistors at the 22-nm node. strations and technically focused presentations by Intel and In addition, all of these transistors will continue to power its partners. The keynote by Intel’s CEO, Paul Otellini, high- very efficient computing platforms. In the future, computing lighted the company’s view of computing over the last 30 must enable three essential capabilities: engagement, consis- years and into the future. “The innovation of the next decade tency, and security. will outstrip the innovation of the last three decades,” Otel- As the world becomes more connected, users will expect lini said. What follows is a summary of Otellini’s key points. more lifelike, engaging experiences with their computing The full transcript of his keynote is available from the of- devices (see “IP That Senses and Cares,” http://www.chipes- ficial IDF 2011 website. timate.com/blogs/IPInsider/?p=189). Otellini punctuated Otellini began by talking about the ongoing transfor- this statement by introducing the company’s Ultrabook, mations in transistor technology, focusing mainly on the which will be available in time for the holiday season. Future growing consumer market for embedded products. All Ultrabooks will run on the company’s new 22-nm processor, of these transformations have been based on the ever- codenamed “Ivy Bridge.”

Figure 1: Growth in available transistors will reach quintillions range by 2015.

12 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com

FOCUS ON INTEL

Figure 2: Intel CEO demonstrated several new compute continuum capabilities that will be available on Acer, Lenovo, and Toshiba systems later this holiday season called Intel® Pair and Share and Intel® Teleport Extender.

At this point, Intel’s CEO injected a few words about Has- type an IM, and even go to a web page. The device interacts well. This next-generation microprocessor was developed with other phones, PCs, tablets, and almost any other end- in Oregon as a successor to the Sandy Bridge architecture. user system. Haswell’s low-power design will enable all-day usage without This theme of different devices interacting with each taking a hit to performance. other was highlighted again in the demonstration by Craig To demonstrate Intel’s dedication to producing the most Raymond. After taking Otellini’s picture with his Android power-efficient devices known to man, Otellini introduced phone, Raymond used Intel’s Pair and Share (see Figure 2) Sriram, a company employee. Sriram demonstrated a very- technology to transmit the picture to an Acer PC. That PC low-voltage transistor application. The processor in the served as the central platform for sharing all types of data. demonstration consumed so little power that it was run on a What enabled these connections was the Intel Teleport Ex- small, postage-stamp-sized solar cell. tender, which paired the Android phone with the PC. As noted in the three essential computing capabilities As computing becomes more pervasive, so will security listed by Otellini, users have come to expect consistency breaches and malware instructions. Candace Worley, senior from all of their computing devices. In other words, they VP with McAfee, talked about the challenges facing tradi- expect familiar applications to work across every platform. tional, software-based security (see Figure 3). She cited the Art, another Intel spokesperson, talked about a new kind example of a malware known as root kits, which embed of enterprise collaboration between Intel and Cisco, which themselves into an operating-system (OS) kernel. At this resulted in a device known as Cicus. He demonstrated an level, the malware becomes almost invisible to today’s anti- Atom-based Cicus running with the Android operating sys- virus products. tem in a phone display application. Using the device, a user In response, Worley presented what she called “a fun- could place a phone call, engage in video chat, send e-mail, damentally new approach to security, which combined

14 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Embedding Excellence

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Figure 3: McAfee CEO stands besides the company’s Threat Map, which show recent software threat activity from around the globe with a less than 30 minute delay.

both hardware and software In the past, the two companies techniques that monitored have had similar partnerships system memory and proces- The processor in the demonstration for datacenter designs, Google sor activity to detect attacks.” TV, and the Chrome OS. McAfee’s Deep Safe Tech- consumed so little power In summary, Otel- nology Platform works with lini stated,” Computing is Intel’s VT capability on Core that it was run on a undergoing the most remark- I3, I5, and I7 processors. The able transformation since the demonstration of Deep Safe small, postage stamp sized solar cell. invention of the PC.” As men- stopping a security attach tioned, he predicted that the embedded in a downloaded innovations of the next decade YouTube video was very impres- would outstrip the innovations of sive. the past three combined. As amazing as that progress may Before concluding the keynote, Intel’s Otellini announced be, however, it is only the beginning of what’s to come. a development partnership with Google around Android. Andy Rubin, senior VP of mobile at Google, explained that John Blyler can be reached at: the partnership joins Google’s smartphone design teams [email protected] with Intel to optimize the silicon and software for Android.

16 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com FOCUS ON INTEL

Intel Embraces Android in Mobile Push In a major change of direction, Intel Corp. has thrown its weight behind Android.

By Mark LaPedus, Senior Editor t the Intel Development Forum in San Francisco, Intel software. Hosted by the Linux Foundation, MeeGo is a Aand Google Inc. disclosed that they will work together Linux-based, open source software platform supporting the to enable and optimize future versions of Android for In- Atom and ARM architectures. tel’s family of x86-based Atom processors. The joint effort Earlier this year, however, Nokia made a major shift and is designed to accelerate Atom-based smartphones running embraced a rival mobile software technology: Microsoft’s Google’s Android software platform. Windows Phone 7 software. Instead of MeeGo, Nokia will “Together we are accelerating Intel architecture and use Windows 7 for its main operating system for its new bringing new levels of innovation to a maturing Android smartphones. platform,” said Intel President and CEO Paul Otellini, at the The move has raised questions about the future of MeeGo Intel Development Forum. at Nokia. At Intel, MeeGo is still ‘’alive and well in our em- The move represents a new strategy for Intel. The chip bedded business,’’ said Otellini during a question and answer giant has been working with Nokia to develop Atom-based session at IDF. MeeGo is being targeted for the automotive smartphones built on the so-called MeeGo mobile Linux and embedded space, he said.

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 17 FOCUS ON INTEL

But Atom-based smartphones running on MeeGo were Besides the smartphone, Intel is moving full speed ahead supposed to be out in the fourth quarter of 2011. Now, it’s with its previously-announced “Ultrabook’’ effort. Running unclear if or when those phones will appear. As a result, Intel Microsoft’s new Windows 8 OS, Ultrabooks are portable sys- has lost ‘’six months’’ in its ongoing quest to bring Atom into tems targeting the tablet PC and related markets. the mainstream mobile market, Otellini said. At IDF, Intel’s CEO said the company will further ac- Now, Intel is embracing Android for Atom-based smart- celerate Ultrabook products using a processor based on the phones. Unlike MeeGo, which is floundering, Android is hot. company’s new 22nm process. The recently-announced pro- ‘’Android will give (Intel) a better chance to get into the mobile cess is built around a tri-gate transistor structure. phone market,’’ said Dick James, an analyst with Chipworks Inc. Intel’s first processor based on this technology is called Ivy ‘’Combining Android with Intel’s low power smartphone Bridge. The next version is codenamed Haswell, which is tailored roadmap opens up more opportunity for innovation and for Ultrabooks. Otellini described the new class of platform choice,” said Andy Rubin, senior vice president of Mobile at power management in development for the 2013 “Haswell” prod- Google. “This collaboration will drive the Android ecosys- ucts for Ultrabooks. Haswell is said to reduce idle platform power tem forward.” by more than 20 times over current designs, according to Intel. This work will enable mobile device OEMs and wireless operators to draw upon the performance and low power ca- pabilities of Intel architecture and tap into the scale of the Mark LaPedus has covered the semiconductor x86 developer ecosystem to further drive the adoption of the industry since 1986, including five years in Asia Android platform. when he was based in Taiwan. He has held senior The announcement builds upon Intel and Google’s recent editorial positions at Electronic News, EBN and joint initiatives to enable Intel architecture on Google prod- Silicon Strategies. In Asia, he was a contribut- ucts, which include Chrome OS and Google TV along with ing writer for Byte Magazine. Most recently, he the Android Software Development Kit (SDK) and Native worked as the semiconductor editor at EE Times. Development Kit (NDK).

Intel Mum About Capex, Ireland Fab By Mark Lapedus, SemiMD senior editor (www.semimd.com)

Intel Corp. executives remained quiet about re- to manufacture processors based on the company’s ports that the chip giant will cut its capital spending. new 22nm process. But the firm appears to have pushed out the ramp of In its latest roadmap, Intel still plans to ramp up the new 22nm tri-gate technology at the company’s its 22nm process in five fabs. In May, the chip giant Ireland fab, according to an analyst. rolled out a vertical tri-gate transistor at the 20nm At the Intel Developer Forum (IDF) in San Fran- generation node. cisco Tuesday (Sept. 13), Intel executives were mum Intel ‘‘did push out 22nm production in Ireland as about the chip giant’s capital spending plans for 2011. far as I can tell,’’ said G. Dan Hutcheson, chief execu- In a brief interview after a keynote speech, Intel CEO tive of VLSI Research Inc., a market research firm. Paul Otellini declined to comment and deflected ‘’Ireland has been skipped’’ for Intel’s 22nm produc- questions about capital spending cuts and the Ireland tion, he added. fab. Reports have recently circulated that Intel will cut To read full story, please visit SemiMD: http:// its aggressive capital spending plans in 2011 amid a semimd.com/blog/2011/09/13/intel-mum-about- sluggish PC climate. There have also been reports capex-ireland-fab-plans/ that Intel would delay the ramp of Fab 24 in Leixlip, Ireland. At one time, the fab in Ireland was targeted

18 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com FOCUS ON INTEL Intel Tips 22nm SoC Recipes, 14nm Process Seeking to extend its technology lead, Intel Corp. disclosed its recipes to enable 22nm system-on-a-chip (SoC) devices and also provided a glimpse of its 14nm process.

By Mark LaPedus, Senior Editor lready looking to ramp up its 22nm process, Intel is also plans to extend traditional 193nm optical lithography down Amoving full speed ahead to develop a 14nm technology. to 14nm, with the help of quintuple patterning and other The chip giant plans to extend its vertical tri-gate transis- techniques. tor structure to the 14nm node, according to a roadmap “We would like to use EUV, but it’s not ready,” Bohr said in presented by Mark Bohr, Intel senior fellow and director of an interview. “I’d like to have EUV” ready for the 10nm node. process architecture and integration. It is also unlikely that 450mm technology will be ready- The 14nm node will also incorporate strained silicon, a at least for the early stages of the 14nm node, analysts said. high-k/metal-gate scheme and other features, Bohr said dur- Intel, Samsung and TSMC are aggressively pushing for ing a presentation at the Intel® Developer Forum (IDF) in San 450mm fabs, but it’s unclear if the equipment makers can Francisco. deliver the tools in time for 14nm, analysts said. Other companies, including IBM, GlobalFoundries and During the presentation, Bohr also described Intel’s TSMC, are also pursuing 3-D transistors or finFETs for the recently-announced 22nm technology. In May, the chip gi- 14nm node. Intel plans to begin ramping up its 14nm process ant rolled out a vertical tri-gate transistor technology at the by the fourth quarter of 2013, Bohr said. In doing so, Intel 20nm generation node. will have a “four year lead in tri-gate technology,” he said. Intel’s 3-D transistor design represents a fundamen- Bohr did not provide further details about its 14nm tech- tal departure from the two-dimensional planar transistor nology, but he reiterated the company’s previous position structure. The first processor based on the technology is that extreme ultraviolet (EUV) lithography will not be ready code-named “Ivy Bridge.” Ivy Bridge is slated for high-vol- in time for the 14nm node. In previous reports, Intel said it ume production readiness by the end of this year. A large part of Bohr’s presenta- tion was devoted to the benefits of a vertical tri-gate transistor at the 20nm generation, as compared to the traditional planar structure at that node. Technologists at Global- Foundries recently insisted planar, rather than finFET, transistors are the best fit for foundry customers at the 20nm technology generation. In response, Bohr said Intel’s tri-gate structure enables a “10X reduction in leakage” over planar devices. Compared to tri-gate struc- tures, ‘’22nm planar transistors would provide only a modest im- provement in delay verses voltage,’’ he said. “Tri-gate transistors provide an unprecedented 37 percent delay improvement at low voltage,’’ as op- posed to 32nm planar structures. Bohr also discussed Intel’s SoC process recipes for the 22nm node.

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 19 FOCUS ON INTEL

In previous years, Intel developed a standard “one-size-fits- Intel’s first 22nm processor, called Ivy Bridge, is mainly all” CPU process technology for a particular node. geared for desktops and possibly higher-end notebooks. The Starting at the 32nm node, Intel developed a CPU (P1268) next 22nm processor is codenamed Haswell, which is tai- and SOC (P1269) process. The CPU and SoC processes have lored for Ultrabooks. Developed by Intel, Ultrabooks is a new identical feature sets, but the SoC version incorporates a set class of portables that are aimed at the tablet PC market. of recipes specifically for device designers. At IDF, Intel described the new class of platform power For example, Intel will provide a standard CPU process at management in development for the 2013 “Haswell” prod- 22nm, internally called P1270. Based on a tri-gate transis- ucts for Ultrabooks. Haswell is said to reduce idle platform tor structure, the CPU process incorporates high-speed logic power by more than 20 times over current designs, according circuits and interconnects. to Intel. The SoC version, dubbed P1271, makes use of a low leak- age technology, dense interconnects and passives. It will also include 1.2V low-power and 1.8V thick-gate options. Mark LaPedus has covered the semiconduc- Intel will provide some four SoC recipe options for de- tor industry since 1986, including five years in signers: high-performance, standard performance, low Asia when he was based in Taiwan. He has held power and ultra low power, according to Bohr. senior editorial positions at Electronic News, The technology is aimed for a range of applications, in- EBN and Silicon Strategies. In Asia, he was a cluding the booming mobile space. Intel is seeking to propel contributing writer for Byte Magazine. Most its x86-based processors in the mobile space-and displace recently, he worked as the semiconductor editor at EE Times. the ARM camp in the process.

20 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com MARKET WATCH

Intel Challenges ARM with IP and Interconnect Strategy Intel reveals key pieces of its SOC realization strategy with the announcement of a new on-chip interconnect fabric and a growing collection of IP. Should ARM be worried?

MARKET WATCH

By John Blyler

etails remain sketchy, but the Intel® Atom™ processor-based to connect to the outside world, for example, to provide embedded Dembedded system-on-chip (SoC) strategy may be nearing real- programmability via Altera’s FPGA core (see, “Intel Teams Up with ization, as indicated by recent comments from Intel’s Bill Leszinske, Altera” http://chipdesignmag.com/display.php?articleId=4427). The general manager of technical planning and business development at popular PCI bus is also an important interface between ARM proces- the Intel Atom processor SoC development group. Since the embed- sors of Xilinx FPGA fabric (see, “FPGAs Move to IP through Processor ded SoC strategy was first introduced in the spring of 2008, Intel Interface” http://www.chipestimate.com/blogs/IPInsider/?p=206). has been focused on lowering the power while increasing the per- Perhaps the most revealing part of Intel’s SoC strategy is the IP. formance of the Intel Atom processor. Now, that approach has been The company clearly understands the value of reuse in SoC design. significantly enhanced with the inclusion of on-chip interconnect But until now and unlike ARM, Intel has lacked both a mechanism fabric and a growing collection of semiconductor IP. to truly incorporate third-party semiconductor IP and a large ecosys- tem to supply that IP. That situation is significantly changed with the introduction of the IOSF interconnect chassis and the numerous li- censing agreements and business acquisitions of the last several years. Now, Intel has a large portfolio of IP covering graphic, cable mo- dem, video, wireless and Ethernet functionality. Graphic cores are available from both Intel and a licensing agreement with Imagina- tion. Cable modem IP was acquired from Texas Instrument’s Puma product line. Image processing blocks came from the purchase of Silicon Hive. Intel’s most recent wireless acquisition (remember Mobilian back in 2003?) was the purchase of Infineon’s WiFi and 4G WiMAX technology. Finally, the company’s Ethernet switching portfolio has been recently enhanced with the purchase of Fulcrum. Almost all of the pieces of Intel’s SoC strategy have been revealed. It remains to be seen how well these pieces will actually fit together. For example, will the IOSF interconnect chassis really allow the inte- Intel’s 22nm development fab in Oregon should play an important gration of third-party IP and not merely the cores owned or licensed role in the ongoing development of the Intel® Atom™ processor and SoC realization. by Intel? Will there be a compelling reason for the IP ecosystem to shift from ARM to Intel’s SoC, especially in the mobile market? What The interconnect fabric will serve as a “chassis” within which a would happen if Apple chips using ARM cores are manufactured by variety of Intel and third-party IP can be swapped in and out for Intel? (See “IP Adds New Twist to Intel-Apple-ARM Triangle” http:// different applications. The company calls this proprietary chassis www.chipestimate.com/blogs/IPInsider/?p=73.) the Intel® On-Chip System Fabric (IOSF). It is analogous to the The answers to these and other questions have yet to be revealed. ARM community’sAdvanced Microcontroller Bus Architecture (AMBA) interconnect platform. John Blyler can be reached at: Leszinske is quoted as saying that the IOSF is a scalable fabric that [email protected] supports multicore operation and maintains the PCI-bus order. This last item is critical since the Intel Atom processor uses the PCI bus

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REGISTER ONLINE www.advancedTCAsummit.com Rampant Change Drives Need for SPECIAL FEATURE Standard Telecom Platform Intel strategy helps equipment developers address both cost and revenue vectors.

By Cheryl Coupé, Contributing Editor Platform Telecom

elecom equipment has traditionally been built around Tapplication-specific hardware that was designed and NETWORK optimized for particular functions and then implemented to support that function for lifetime deployment. For years, Application Intel has been part of the computing solutions for higher-or- Processing Workload der application-processing functions within that equipment where it could play a server-like role. But according to John Healy, director of strategic marketing for the Intel® embed- Control ded and communication group, that role has changed. “What Processing we’ve found is that the way the equipment is being designed Workload 
One instruction set architecture –the fundamental premise for the design of coms infrastruc- 
One tool suite ture – has become more challenged because of the rampant 
Multiple opportunities growth and demands being placed on it today and increas- Packet Consolidated Workload Processing ingly forecasted to do in the future.” Workload The proliferation of smartphones is certainly a major factor in this change, as are machine-to-machine connec- tions. Along with the billions of new devices connecting to Signal Processing

the Internet come increasing levels of traffic consumption, Workload much of it driven by video and cloud-based applications. In addition, smartphone devices that are designed to conserve battery life and provide regular background updates require ® more set-ups and tear-downs per session. All those transac- The coms infrastructure 4:1 framework enables an Intel processor-based platform to simultaneously execute four tions put additional stress on existing infrastructure with workloads. significantly more signaling overhead than the network was designed to cope with. Intel’s 4:1 workload consolidation strategy addresses the This is forcing a dramatic evolution in equipment, and four classic workloads that run on any piece of coms equip- Healy describes challenges in a couple of areas. The business ment – applications, control, packet processing and signal challenge is in realizing return on investment on a piece of processing. These have historically had different process- equipment over a much-reduced horizon. In the past, provid- ing architectures to support each workload, which then ers could deploy equipment and amortize the cost and return require the overhead of different tool chains, design teams over five or 10 years or more. Now they simply can’t afford and competencies that have to be maintained within both to wait that long to get a return on their investment because the equipment manufacturer as well as the service provider they’re deploying new equipment at a faster rate. who deploys the equipment. While the application layer tra- At the same time, the technology challenge for develop- ditionally used general-purpose processors and the control ers is to build equipment that enables the level of flexibility plane has moved from a mix of architectures to general- and scalability to adapt to rapidly changing demands. These purpose processing, packet and signal processing were more days, as capacity is deployed it quickly becomes saturated in likely to use highly optimized ASICs or ASSPs. Today’s high- terms of bandwidth and throughput. Operators are looking performance processors allow equipment manufacturers for flexible equipment solutions that allow them to be more to converge different workload types onto a standard plat- application- and consumer-usage focused. Intel’s approach form, leveraging the data-center technologies that matured as Healy explains it is to take the computing assets that are in the IT world. Developers gain the advantages of a single the company’s strength and deploy them to solve these tech- tool chain and software environment, along with the flex- nical challenges. ibility to change functions through software, similar to the capabilities seen in the application layer. It also means that

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 23 Throughput (64 byte packets) ~50 Mpps (~33.6 Cbps) New Intel® Xeon processor Mpps (new processor microarchitecture) data plane development kit

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Telecom Platform 2008 2009 2010 Future

Intel will help meet growing bandwidth demand with throughput of 50 million packets per second (Mpps).

equipment manufacturers have a broad base of developers in Security is another area where Intel sees opportunities, the industry that they can draw from, who are experienced in especially with the proliferation of devices connecting to working with these general-purpose platforms. Healy says, the Internet and the growing amount of private informa- “It continues to be very expensive to acquire highly capable, tion being stored online. This not only increases the need experienced programmers for very tuned, specific architec- for security, it also distributes the need for security controls tures.” He believes equipment manufacturers and operators throughout the infrastructure. In turn, this significantly are eager to use more “generalist” programmers to imple- increases the requirement not just to manage larger quan- ment the same level of functionality. tities of traffic, but to do far more processing per packet Examples of where this strategy applies include power within that traffic and to do it without introducing a delay management on the platform, which allows for power in throughput. Enterprise and network security appliances adjustments depending on the load or time of day, and virtu- need intensive processing capabilities within specific power alization, which helps in both capital and operational costs footprints, as well as the ability to upgrade and change pro- by physically reducing the number of assets deployed. In the cessing functionality through software. “One of benefits wireless network, for example, operators are looking at how of workload consolidation is that the vast majority of that they can move the processing function away from base sta- processing for security occurs as part of the data-plane or tions in the field back to a central location miles away where packet-processing function, and that’s what we support,” they can aggregate the processing function and use technol- says Healy. ogies such as virtualization to reduce the ratio of processing Asked what is keeping developers up at night, Healy de- capability deployed relative to the number of base stations scribes a consistent theme around the challenge of keeping supported. This ratio improvement from also improves costs pace with the scale of change experienced by those who and allows the operator to allocate processing capacity to deploy the equipment. “Anyone who’s building a piece of the base stations depending on actual demand rather than networking equipment today needs to remain competitive in maximum capacity. Operating cost savings on this type of the sense that they want to provide platforms that will facili- converged radio access network (CRAN)could be as high as tate the level of scalability required by their customers into 30 to 60 percent. the future, plus maintain the performance and tracking to According to Healy, Intel’s recent acquisition of Fulcrum standards as they evolve, and be flexible in how it does that. Microsystems also complements the company’s existing That’s the technical vector. On the business vector, they computing storage and networking assets. “Their assets are need to build equipment that is competitively implementable in switching silicon but it adds to the overall platform capa- by the service providers or service provider customers such bility because their product is highly tuned for low-latency that they can realize incremental revenues.”Because most applications with high performance. As many of the web or web services today are over the top, the service provider who cloud-type applications go more and more media-rich and is building point-to-point connectivity is seeing little more more video-intensive, the low latency becomes a significant in terms of new revenues – they’re just providing capacity. requirement at high capacity.” As their average revenue-per-user declines year over year, they’re also not realizing a sufficient level of new business

24 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com SPECIAL FEATURE from the capacity that they’re deploying. Healy adds, “Equip- ratios through which they dimensioned the network were ment designers are increasingly challenged to address both 10:1, 100:1 depending on the service type. And they were problem segments at the same time: How do I help you to re- more than adequate to keep pace with the usage that they duce your costs, but how do I help you to make more money, experienced. Now it’s just thrown all of even those funda- as well?” mental models on their heads. The insatiable desire to be Intel’s response is to provide a standard platform that low- connected, the constant, always-on community that’s using ers the costs of acquiring engineers and development tools these services today – that level of change and pace is abso- and gives equipment manufacturers the ability to differenti- lutely phenomenal. ”Looking ahead, he expects to see more ate their offering through software. At the same time, this interesting dynamics as cloud computing and cloud services standard platform also gives them the opportunity to track continue to grow and it becomes seamless to consumers Platform Telecom standards and bring new implementations to market more where services are being delivered from, independent of the quickly. “That’s increasingly important as everyone looks device they’re connecting through or where they happen to for the next killer app to deploy,” says Healy, explaining that be at the time. “I think it’s going to be really interesting to some service providers have shared that it can take up to 18 see how all of that can be facilitated such that it becomes months from conception to trial on a new service type. “You transparent to the user.” can imagine marketing teams coming in with the next bright idea being told that they’d have to wait 18 months before they can see a customer actually use it,” says Healy. “The ges- Cheryl Berglund Coupé is editor of EECatalog. tation period is just too long. With this environment, what com. Her articles have appeared in EE Times, Elec- the [equipment manufacturers] have realized is that they can tronic Business, Microsoft Embedded Review, and intercept that desire, quickly realize the service implementa- Windows Developer’s Journal. She has developed tion and then deploy them in a live network literally within presentations for the Embedded Systems Con- weeks if not months.” ference and ICSPAT. Berglund Coupé has held a Healy describes recent changes as a once-in-a-genera- variety of production, technical marketing, and writing positions tion transformation of the infrastructure, in which service within technology companies and agencies in the Northwest. providers’ entire world has changed. “Even the contention BLOG Lower Consumer Power Trend Masks Manufacturing Component JB Circuit blog by John Blyler

Does a drop in residential power usage - thanks in part to devices. With new semiconductor foundries costing billions and lower power semiconductor devices - really mean that the world billions of dollars, these manufacturing costs are staggering. If not is becoming energy efficient or does it hide manufacturing energy for the sheer volume of devices sold, no consumer would be able to costs? afford a mobile device of any kind. A recent report from the Electric Power Research Institute - a But including the manufacturing cost of each device would still nonprofit group funded by the utility industry - concluded that the not be enough to determine the total power consumption. Design growth rate for residential power would decline over the next 10 costs would also be needed. Most of today’s designs involve teams years by about 0.5 percent a year. spread all over the world, meaning that communication costs Many factors contribute to this decline, including the use of must be included, e.g., office lighting, and desktop-server-network more efficient lighting, energy usage improvements in newer and power requirements. older homes, and cost conscious consumers in a sagging economy. Would the decline in residential power usage cited by the EPRI But one factor, which will come as no surprise to the semiconduc- report really be enough to offset the design and manufacturing tor industry, is the continuing evolution of lower power fixed and power costs for today’s “low-power” devices? As we continue to mobile electronic devices. move toward a global community of consumers, this is the ques- But does the power savings of new semiconductor devices tion that should be addressed to gain a true evaluation of energy really translate to a system-wide decrease in energy consumption? trends. To answer that question, one would need to know the total power (energy) costs that go into manufacturing all of these electronic JB’s Circuit - www.chipdesignmag.com/blyler

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 25 ATCA Continues to Heat Up Power and thermal management offer on-going challenges. SPECIAL FEATURE SPECIAL

By Cheryl Coupé, Contributing Editor ATCA

s one of our experts states, ATCA blades aren’t getting any scale-up of resource to full load when demand increases to Acooler. Power and thermal management continue to be key “normal.” challenges for developers and have been a major focus of the Justin Moll, Elma Bustronic: For power Communications Platforms Trade Association (CP-TA) efforts and thermal management, the most criti- towards interoperability in xTCA systems. EE Catalog asked a cal items are: A) The boards are properly panel of experts about strategies for addressing these challenges designed so that the air will properly flow and others, including traffic patterns and migration to 40Gbit over the board’s hotter components instead Ethernet and beyond. Jeff Marden and Gene Juknevicius, se- of bypassing the hot components due to low nior architects and technologists at GE Intelligent Platforms; airflow impedance in low wattage areas. B) Increase the Justin Moll, director of marketing for Elma Bustronic; and Rob intake and exhaust air plenum space. The ATCA market ini- Pettigrew, director of marketing, communications segment, Em- tially introduced smaller chassis to allow for more shelves bedded Computing for Emerson Network Power provide their in one rack. However, even if you could put four 5KW chas- insight here. sis into one rack, cooling the cabinet within specifications becomes very challenging and inefficient. Chassis sizes are EE Catalog: How are developers addressing power and now trending towards 14U or 15U heights. C) Balancing the thermal management in today’s high-performance ATCA airflow in the chassis. This is probably the most critical item. systems? Care must be taken to add baffling as required in a chassis Jeff Marden and Gene depending on the complement of boards. In the new higher Juknevicius, GE Intelligent performance and higher power ATCA systems, you need to Platforms: There are two make sure you do not have a low impedance area where the primary ways developers deal air can bypass the boards that need the airflow, particularly with the increased power and if a slot is empty or if a board is removed during mainte- thermal load in present and nance. future ATCA platforms. First, host the new technology – Rob Pettigrew, Emerson Network Power: recognize processor, memory and I/O technology that yield ATCA blades certainly aren’t getting any 250-350 watts per ATCA slot requirements. Develop host cooler. With the growth in power consump- chassis that implement the required platform management, tion – driven by new technologies, more power entry and backplane distribution of power, and that memory and faster fabrics – the issues of provide cooling strategies to drive increased air flow and con- blade power dissipation and chassis cooling capabilities are sistent pressure across both front blades and rear-transition critical to provide interoperability between blades and chas- modules. Several ATCA chassis suppliers have products to sis. The CP-TA thermal specifications were developed to offer here today, and the PCI Industrial Computer Manufac- address this challenge. They collectively define the chassis turers Group (PICMG) has a sub-committee effort underway airflow and blade airflow impedance required to meet tele- that is investigating the use of ATCA in more power-hungry com operating-environment requirements. Thus, rather than environments like data centers. simply stating that a blade consumes 300 watts, for example, Second, implement strategies for dynamic power manage- blade vendors should be stating that their blades require a ment and reduction – actively monitor application load and CP-TA B.4 cooling environment. Emerson is a founding power utilization with the goal of scaling system resources member of CP-TA, and is committed to using these specifi- up and down according to this load. Draw less power and cations to define the cooling requirements of all our blades generate less heat at times when the need for all system and the cooling capacities of our chassis products. Beyond resources is reduced, but allow for situations when instan- simply providing sufficient power and cooling, by enhancing taneous application load spikes and provide for the orderly

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the energy efficiency of ATCA board designs we are helping teroperability and a proven base system. Once the “Shall” to reduce overall power consumption and operational cost. items are up and stable, then implementing the “Should” and “May” guidelines can be added one at a time. EE Catalog: What are some of the challenges in meeting Pettigrew, Emerson Network Power: The three biggest interoperability standards across ATCA blades, shelves and challenges are airflow and cooling requirements, shelf man- backplanes? agement interoperability and 40G fabric interoperability. Marden and Juknevicius, GE Intelligent Platforms: The first two have been addressed by the CP-TA. The result-

SPECIAL FEATURE SPECIAL While design of ATCA products is defined in PICMG speci- ing specifications and test procedures have tremendously fications today, these specifications leave room for individual improved thermal and IPMI interoperability. The final chal- supplier implementation and thus introduce the possibility of lenge, 40G fabric interoperability, will be addressed with the different interpretations that can affect the interoperability pending publication of the ATCA 40G standard. Until that of multiple vendor’s blade and systems. Elements that might time, we can expect that 40G fabric interoperability will be a ATCA contribute to this interoperability include the following: challenge, making it even more important for users to partner with ATCA vendors that have a wealth of experience in 40G. t
Mechanical – Small differences in dimensional tolerances can cause blades, RTMs and other system elements to have EE Catalog: What opportunities are there for develop- installation and misalignment issues. ers to help customers address challenging traffic patterns on their networks? t
Power – As noted in the earlier question, the advent of Marden and Juknevicius, GE Intelligent Platforms: higher power technology in processors and memory can ATCA systems predominantly use Ethernet as a connectivity expose voltage and current distribution issues. technology between the blades and, in many cases, for exter- nal connectivity as well. Traffic patterns within the ATCA t
Thermal- Also noted above, that same new technology can system are mostly driven by application and data processing push a chassis’ cooling capabilities to its limits and beyond. requirements. In the past, connectivity between the blades was fairly t
Hardware platform management – One of the first signs of simplistic and predominantly handled at Layer-2 within the interoperability issues often seen in ATCA is the mismatch network protocol stack. With the transition to LTE, EPC and between an ATCA blade and the system’s shelf manager, IMS, which are based on flat IP-network topology, packet resulting in the blade not powering-up. These issues were switching requirements change dramatically. Now, packets more prevalent in the earlier days of ATCA as blade manage- need to be parsed deeper, to Layer-4 and beyond, classified, ment and shelf management were maturing, but problems and QoS applied, Service Level Agreements enforced, lawful still occur today. intercept supported, and so on. In addition, at 40Gbit data rates, a packet can arrive every 17ns, which leaves very little t
ATCA fabric compatibility – Electronic keying, protocol, time to undertake all this processing. channel count and link speed issues. Individual PICMG The solution to this challenge is a sophisticated Ethernet subsidiary specifications (PICMG3.1, 3.2, 3.3…) define switching hierarchy, which depends on having an Ethernet ATCA fabric and platform management implementation, but switch on every data-intensive ATCA blade. High-perfor- multiple blade supplier system deployments can still exhibit mance Ethernet switches can offload a significant portion interoperability issues. of the required packet processing and do it at line rate with very low latency. Note that standards organizations like COPE, PICMG The first Ethernet switch the packet arrives at will per- and the Computer Platform Trade Association (CP-TA) are form a deep header parsing and classification. Based on the working to avoid the above issues via user experience review, classification results, a packet will undergo traffic manage- applications analysis and formal interoperability testing. ment and policing processing and be treated with appropriate Moll, Elma Bustronic: Most of the interoperability priority. Ethernet switches will be set up with specific rules issues we have seen at the AdvancedTCA Interoperabil- on where to forward packets, implementing load balancing ity Workshops (AIW) have been the interpretation of the schemes. specifications. As there is some interpretation involved in Once a packet arrives at a specific ATCA blade, it will be the specification guidelines, if you design your system with first received by another Ethernet switch and will undergo very a narrow and specific interpretation of certain guides, a second level of processing, treated with more finite traffic you may run into interoperability issues. If your design is management and policing rules and QoS, and forwarded to more flexible, you’ll have less issues being interoperable with a specific processor on board, supporting a second level of those who may have interpreted the guidelines differently. load balancing. If Ethernet switches from the same vendor Also, interoperability issues arise in the “Shall/Should/May” are being used on both the ATCA hub and blade, then further nomenclature of guidelines. Focusing on first achieving the optimizations can be applied, such that packet classification “Shall” guidelines helps the designer more easily achieve in-

30 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com SPECIAL FEATURE results from the first switch are shared with switches down only on the ATCA hub, but also on each payload blade as was the line. suggested previously. Having such switched Ethernet hierarchy raises concerns Moll, Elma Bustronic: From a backplane standpoint, the of added latency and, to mitigate that, switches supporting move to 40G presents some challenges. First, to meet signal cut-through switching – and hence lowest latency – should integrity levels of these high speeds, we need a baseline to be utilized. go by. The current IEEE 802.3-2008 specifications address- Pettigrew, Emerson Network Power: The insatiable in- ing 10GBase-KX4 and 10GBase-KR (4 lanes x 3.125 Gbps) creasing demand for network bandwidth is certainly stressing and IEEE 802.3ba-2010 for 40GBase-KR4 (4 lanes x 10 Gbps) telecom networks. Rather than simply expanding networks are released. However, the PICMG 3.1 revision 2 efforts for to meet this demand, I believe there are opportunities for both specifications are still in process. So, there are some ATCA telecom equipment manufactures to provide innovative new parameters that need to be resolved/defined for ATCA solutions to optimize traffic flow and deliver content more backplanes. However, with thorough SI analysis using IEEE efficiently. guidelines the 40G speeds have been achieved across Elma Bustronic’s ATCA backplanes. For higher speeds, there are EE Catalog: What are some of the strategies developers also new concepts like the Z-planeATCA system that brings are using to address design/price challenges in the competi- the high-speed signals onto “links” that plug into the rear tive market for small (femto/micro/pico) cell designs? of the backplane. This solution has been tested to 65 Gbps Moll, Elma Bustronic: The trend towards the micro-cell using early prototypes and is targeted to hit a goal of 100G. type of designs is a continuation of the macro trends which Pettigrew, Emerson Network Power: The migration to have driven the TCA specifications – that the burden on pro- 40G ATCA from 10G is really a three-phase process. The vider networks is exploding. The iPhone helped put a 5000% first phase is to ensure that the ATCA chassis and backplane increase on the bandwidth requirement of AT&T in 12 quar- are ready for 40G. This means, of course, that the backplane ters! ATCA does its part to help provide a solution – offering must be designed and tested to transport high frequency an open-specification, scalable technology to be used across 10GBaseKR signals – “KR Ready.” It also means that the platforms, networks, COs, base stations, etc. chassis must have sufficient airflow and current to power and cool next-generation 40G payload blades. Such systems EE Catalog: How are developers planning for migration have been shipping for over two years. The second phase is to issues from 10 Gigabit Ethernet to 40Gbit – and beyond to introduce backward-compatible 40G ATCA switches. These 100Gbit? switches can be used today with 10G payload, but will allow Marden and Juknevicius, GE Intelligent Platforms: the introduction of 40G payload when available. Switches are The transition to 40Gbit can be less painful than it looks. announced, and are being shipped today. Finally, as 40G pay- Certainly, such a transition involves multiple elements, load becomes available, it can be introduced into these 40G such as high-speed connectors, backplanes, ATCA hub and ready systems. We can expect 40G payload blades with tech- ATCA blades. The good news is that 40Gbit technology is nologies from companies such as Cavium Networks, Intel, backwards-compatible with existing 10G and even 1G tech- Freescale and others to be introduced to the market over the nologies. coming year. Regarding 100G ATCA, it’s still very early. The Chassis with backplanes and connectors designed for relevant IEEE standard for 100G ATCA over copper channels 40G connectivity have been available for some time now. is still being defined. Once this is in place, we can expect Backward compatibility allows the use of those chassis with that standards work will begin to incorporate these tech- existing 10G and 1G blades, providing the opportunity for nologies in next generation ATCA fabric standards. I believe gradual performance upgrades. 40G hubs, supporting older this effort is still a few years away. 10G and 1G connectivity speeds, will also be available. As a second step in the upgrade process, 40G hubs can be installed. Even though the hub alone will not increase the Cheryl Berglund Coupé is editor of EECatalog. system bandwidth, it will make available new packet pro- com. Her articles have appeared in EE Times, Elec- cessing and traffic management features, which could be tronic Business, Microsoft Embedded Review, and beneficial even for already-existing applications. Windows Developer’s Journal. She has developed Finally, 40G-capable payload blades can be installed, presentations for the Embedded Systems Con- significantly increasing a system’s performance. When ference and ICSPAT. Berglund Coupé has held a migrating to 40G, signal integrity becomes an important variety of production, technical marketing, and writing positions concern. This concern can be mitigated by utilizing eye within technology companies and agencies in the Northwest. diagram measurement and other test tools present in the silicon. Furthermore, having the same silicon on both sides of the link always brings an extra level of comfort. This be- comes yet another benefit of having an Ethernet switch not

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 31 The Move to Distributed Healthcare Devices incorporate sensors and telehealth capabilities to increase access. SPECIAL FEATURE SPECIAL

By Cheryl Coupé, Contributing Editor

hile the need for large medical equipment such as From an embedded perspective, Gold explains, “We’re Telehealth WMRIs continues, Jack Gold, president and princi- moving to a world where it’s not just massive machines; it’s pal analyst of J. Gold Associates, LLC says, “If you look at also lots of small machines networked together. Embed- what’s taking place in the medical arena over the next few ded capability is revolutionizing the way we think about years, we’re moving to a much more distributed approach. healthcare.” While we can now gather more information And especially we’re moving to a much more sensor-based about patients, the peripheral impact is what to do with that approach.” Drivers for this change include increased capa- information, how to store it and keep it secure and how to bilities and improved costs of sensors, increasing processing compensate providers for its use outside of traditional care power (both independent and embedded in the sensor) and environments. These changes are having a dramatic impact the improved availability of wired and wireless networks. in the medical community, and the decisions that are made This trend is supported by a new report, “The World from governments on down will impact device manufactur- Market for Telehealth – A Quantitative Market Assessment ers for some time. Embedded developers will need to address – 2011 Edition,” by InMedica, the medical electronics mar- issues around reliability and security, power requirements ket research group within IMS Research, which forecasts and interoperability. While care providers are being driven that the world market for telehealth will exceed $1 billion by by consumer demands for cheaper, more accessible informa- 2016 and could jump to $6 billion tion (and the implications of that), in 2020. developers reap some of the “Many public healthcare benefits of consumerization, systems now have targets to Similar to evolutions in other such as the number of sensors reduce both the number of in consumer devices driving hospital visits and the length industries (such as smart grid), the costs down, and the trend to- of stay in hospital,” stated wards reusable software that Diane Wilkinson, research technology is moving faster than should improve both develop- manager at InMedica. “This ment time and costs. has led to a growing trend the infrastructure can handle. Ed Hill, Intel’s director of for healthcare to be managed marketing for embedded com- outside the traditional hospi- munications, sees healthcare tal environment, and as a result, reform in the U.S. as a significant there is a growing trend for patients to be monitored in their market force that will change the landscape from a device home environment using telehealth technologies once their standpoint. Intel has been involved from both a policy and treatment is complete.” legislative standpoint and is highly interested in how the re- Wilkinson adds, “By far the most established market for form process will address the costs of delivering healthcare in telehealth at present is the US, as evidenced by the Veteran’s a new distributed care model that not only provides services Health Administration’s extensive home telehealth service, in traditional hospitals and clinics but also in the home and which aims to have 92,000 patients enrolled on telehealth remote locations. These changes bring new opportunities for services by 2012. There has also been some large-scale trial device manufacturers, and Intel wants to be there with them. activity in Europe, most notably in the UK in 2010 and 2011, The company has historically had a foothold at the big ma- where PCTs have initiated some projects involving more chine level, which is where the bulk of market share in medical than 2,000 patients. What is apparent is the convergence of has been. Intel® processors have traditionally been used for many different industries in this space, including telehealth image reconstruction within imaging devices where its ad- companies, device manufacturers, healthcare agencies, ser- vanced vector extensions (AVX) improve performance due vice providers and telecommunication companies to name to wider vectors, which provide faster image reconstruction but a few.” time. While device manufacturers eventually reach a point of

32 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com SPECIAL FEATURE minimal return in terms of image reconstruction time, Intel developers need to be concerned about is quality of report- processors continue to support higher resolutions required in ing: what the device is doing and what it is reporting. applications such as 3D diagnostics. Similar to evolutions in other industries (such as smart While MIPS and ARM have been primarily found in grid), the technology is moving faster than the infrastruc- smaller devices, Intel is looking to make similar moves in ture can handle. Hill believes that a determining factor in healthcare as it has in other markets, working to drive its the evolution of these connected medical devices will be Intel® Atom™ processor down to smaller handheld and mo- how insurance companies react – as in, who pays? – and how bile devices. To support this, Intel is continuing to focus quickly providers are willing to pay to update their practices. on lower power and lower cost devices, with higher battery A few things will help drive change: too few doctors for an life for more portability along with high processing perfor- increasing numbers of patients, the large number of baby Telehealth mance. This direction meets worldwide needs for medical boomers with disposable income and consumer demand. teleconnection, for instance from a hospital in Beijing, China Hill also sees an increase in venture capital funds available to a remote community clinic where local doctors can work in healthcare-related technologies – indicating that a large with a hospital that has expertise to assist on a remote diag- market is perceived to be there. nosis using multiple screens, video feed and even real-time image sharing. Hill sees an opportunity for these solutions to be more portable and lower cost to provide remote pa- Cheryl Berglund Coupé is editor of EECatalog. tient-monitoring systems that include display and camera for com. Her articles have appeared in EE Times, Elec- remote telehealth discussions, to complement large, dedi- tronic Business, Microsoft Embedded Review, and cated equipment in urban centers. Windows Developer’s Journal. She has developed Security continues to be a hot topic, as well as interop- presentations for the Embedded Systems Con- erability between devices, which Hill believes is quickly ference and ICSPAT. Berglund Coupé has held a reaching a point where it will become a standard require- variety of production, technical marketing, and writing positions ment. Another aspect of healthcare reform that he believes within technology companies and agencies in the Northwest.

BLOG Am I Getting Old? The ESL Edge blog by Brian Bailey For several decades, the pace of technology development has yes, I still have a data security concern in that if my house were continued to accelerate. Technologies that used to take years to to be destroyed, I would lose all of my data and backups, but that see significant adoption now seem to happen overnight and the doesn’t make me want “The Cloud.” It makes me want to be able number of things that get integrated together keeps rising. But it to have a disk located somewhere else, that I can access through seems equally important that everything we buy becomes obsolete my backup software. If and when that is not enough space, I can as quickly as possible so that we will have to buy a new product add another disk. I expect that disk would probably be at a friend’s every couple of years - just to keep up. We used to pity our parents house - someone who I trust, but it could also have hardware se- when they could not understand these new-fangled devices, and it curity built into it as well so that all of the data is encrypted. Does is clear that our children tend to gravitate towards different things such a thing exist? I haven’t been able to find such a product, but if than we do at times. Maybe it is a sign that we are now becoming anyone knows about it, please let me know. And as for unlimited that generation that will have pity piled on us before much longer. processing power - what do I need that for? The amount of time Maybe, maybe not, but I know that I still enjoy and appreciate it would take to get data there and back is probably more than I much of it, even though sometimes I may be slower on the uptake would save, especially since the most computer centric things I do than I used to be. are photo processing etc. But there are a couple of things recently that I just don’t get. That brings me onto the second issue and that is security and I cannot see the sense in them and I cannot understand how privacy. I do not want to give my data to an unknown 3rd party they are ultimately going to help me. The first of these is The who just tells me to trust them. How do I know that their security Cloud. So they promise to offer me unlimited processing power can be trusted? and unlimited storage. Big deal! Disk is so cheap that I can buy Terabytes of storage for less than 10 cents per gigabyte and it can To read the full story, visit: http://www.chipdesignmag.com/ be connected at Gigabit per second communications speeds. Now bailey/2011/08/17/am-i-getting-old/

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 33 Death, Taxes – and USB! Microcontroller vendors support USB’s continued growth in embedded applications. SPECIAL FEATURE SPECIAL

By Cheryl Coupé, Contributing Editor USB

othing is certain but death, taxes – and now, apparently, the “What we see as a challenge for some of our customers us- Ncontinued success of USB. “USB effectively has no competi- ing USB is that they need to have a supplier who can support tion,” says Brian O’Rourke, research director for In-Stat’s digital them all the way to the end,” Saether explains. “If you want entertainment group. “There are other technologies that may to have USB in your end product, you need to certify the have a slight, marginal effect on USB. However, USB is the single product and make sure it works. If Atmel as the supplier has most dominant data interface ever. And no other technology is written 80% of the code and the customer has written 20% of going to threaten that dominance.” that, if the certification fails, then the customer turns to us The release for In-Stat’s recent research report, “USB and says, ‘certification failed.’ They need to make sure they 2011: SuperSpeed Comes to Market” provides a few details have a supplier that can support them. We see that we have a on USB’s growth: big value to our customers because we can do that.” Microcontroller vendors such as Atmel are working to t
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threaten that dominance pening now with USB – that product segment for USB, has been a challenge for many with digital still cameras, years – is the ability to run digital televisions (DTV), set top boxes and portable media higher transfer rates without having an external crystal players (PMP) among the most popular applications. on the PCB. For many years it was possible to use a micro- controller and run it with USB without having an external According to Kristian Saether, AVR product marketing crystal. Running full-speed USB, almost all the suppliers manager for Atmel, USB’s success is easy to understand due in the world now need an external crystal and that adds to to its easy plug-and-play functionality for both consumer component costs, especially if the customer is moving from and developer. But Saether cautions that there are still some older, legacy communication like UART, which doesn’t need challenges to embedded development with USB. While USB the crystal.” Atmel is releasing a new controller that won’t is straightforward using today’s controllers, the developer need a crystal and Saether anticipates that integrating a still has to write software to enable USB connection to the clock source inside the microcontroller will be the next step PC. Controller vendors such as Atmel now provide most in integration. At that point, there’s not much more that can of the software required for common device classes such be put into the microcontroller for USB; once the interface as mass storage and hardware interface devices (mouse, can be accomplished without outside components, he ex- keyboard), but embedded devices may require classes that pects that it will become even more widespread. are less common, such as personal healthcare device class Going forward, In-Stat expects a big year for SuperSpeed (PHDC) support for medical equipment. USB, with a forecast of nearly 80 million SuperSpeed USB-

34 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com SPECIAL FEATURE USB

enabled devices shipping in 2011. O’Rourke states, “The they can use. ”Even though Hi-Speed USB (at 480 MB/sec) current trend is towards SuperSpeed USB. Over the past 12 to has been around for years, many embedded products will 24 months, it has been growing beyond external hard drives continue to use full-speed USB (at 12 MB/sec) because of and select high-end PCs to more widespread acceptance. The availability of chips that can do the work and because it’s key to this is its integration into core-logic chipsets. AMD so much easier. With new integration of SuperSpeed into released its A70M and A75 chipsets; Intel will follow with core-logic chipsets, it may begin to show up in high-end em- its Ivy Bridge 22-nanometer processor line in 2012. This will bedded applications that require high data rates or real-time help SuperSpeed increase penetration of both mobile and video, such as medical imaging. desktop PCs, which will have a ripple effect, leading to in- creased penetration of PC peripherals, consumer electronics and mobile phones over the next few years.” Cheryl Berglund Coupé is editor of EECatalog. At this point, Saether doesn’t see much demand for Super- com. Her articles have appeared in EE Times, Elec- Speed USB in embedded applications, which typically don’t tronic Business, Microsoft Embedded Review, and need the jump from 12 mb/sec to 5 GB/sec – or the added Windows Developer’s Journal. She has developed complexity. “What I see happening is that if you don’t need presentations for the Embedded Systems Con- SuperSpeed, you don’t want to add it because it adds cost ference and ICSPAT. Berglund Coupé has held a and complexity in terms of hardware, in terms of testing variety of production, technical marketing, and writing positions and in terms of certification,” he says, adding, “Most embed- within technology companies and agencies in the Northwest. ded customers will use the simplest and lowest cost solution

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 35 9th International System-on-Chip (SoC) Conference, Exhibit & Workshops November 2 & 3, 2011 – Radisson Hotel Newport Beach www.SoCconference.com Special 2011 Pricing to Support the Tech Community! Don’t Miss Out! The Most Informative, State-of-the-Art, and Affordably Priced Chip Design Conference of the Year!

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Keynote Speakers

Yale University Microsemi Johns Hopkins University Dr. Eugenio Culurciello. Paul Pickle, Senior Vice President, Dr. Ralph Etienne-Cummings. Integrated Circuit Group. Selected Participating Companies, Universities & Organizations

For More Information or Questions, Please Contact the SoC Conference Organizing Committee at: [email protected] or (949) 851-1714 www.SavantCompany.com & www.SoCconference.com TECHNOLOGY APPLICATION

The Need for a New Approach to Networking Developer Tools Networking Tools

By Rick Denker, Packet Plus, Inc.

hy have sophisticated development tools seemingly ernet, the new speed versions and new features take a lot of Wpassed over the networking equipment development en- effort to stay on top of. gineer? The answer lies in the evolution of networking test, the Stated simply, the job of the networking development en- gaps that exist for the network development engineer and the gineer is difficult and getting more so. way companies are coping today. We explore the root-causes for the situation and outline the need for a new innovative approach. Network Testing Tools As networking equipment has become more complex, The Nature of the Problem test tools have evolved to keep up. Tools have progressed in The networking development engineer designs and builds three distinct phases: ad hoc, controlled loading and real- among the most complex systems that are engineered today. world traffic. The first phase was ad-hoc loading. This was They are characterized by the need to be interoperable with other characterized by having multiple users of the network such similar systems and are constantly buffeted by change. as PCs generate as much traffic as possible. This caught the Many now know the terminology of routers, switches and net- most egregious issues, but the equipment tested this way still working gear, but few realize the difficulty inside those systems. tended to lock up fairly regularly and was often well below They are made up of real-time hardware and software that must the line rate. be seamlessly integrated together. They use pipelined architec- The second phase was controlled loading and it revolu- tures to keep up with the speed of the networks that they are tionized the performance of networks. A product such as attached to, and have both an input path coming from the net- SmartBits® from Netcomm Systems (now a part of Spirent®) work and an output path that sends data out over the network. provided precise traffic in a repeatable way on every port of Any single networking product usually interfaces with mul- the device. For example, a SmartBits could produce a load at tiple networking standards. For example, a wireless access point wire rate that was made of minimum-sized packets with a will support communication with clients using Wi-Fi (IEEE minimum inter-packet gap. With the adoption of this class 802.11), and will also talk to the rest of the network using Ether- of test equipment, the reliability of networking equipment net (IEEE 802.3). The equipment must fit with the larger network shot up dramatically. infrastructure of the user. Also it is the exception for a particu- The third phase was the introduction of real-world traf- lar network to be constructed from a single vendor’s equipment. fic. The controlled loading did not catch every case that was Generally there are pieces of equipment from multiple vendors in happening to systems in the field; It was too regular and not a network, and therefore this drives the need for interoperability random like actual traffic. The ability to inject an arbitrary between vendors. This requires the development engineer to be stream of traffic into the test environment has become im- knowledgeable about other vendor’s equipment. portant. Test architectures have been modified to allow an On top of being complex and needing to be interoperable, independent software stack running on an internal proces- they are continually changing with new standards released sor to inject traffic. This phase is continuing to unfold as on an ongoing basis. This has been especially active in new more and more cases that are not caught by current testing areas such as wireless networking that has seen a number methods are discovered. of new standards (Wi-Fi, WiMAX, UWB, ZigBee, CDMA, GSM, etc.) Layered on top of these standards are security Gaps in Tools protocols with their encryption and key management. Along The current test tools are great for the quality assurance with new standards, there are the inevitable, faster speed (QA) engineer, but leave several gaps for the development versions. Even with a relatively stable standard such as Eth- engineer. The gaps are in the areas of timeliness, breadth, abstraction level and portability.

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 37 The biggest issue for the development engineer is that the customer site. A portable tool will also support the conve- test tools are just too late to be useful. They need tools when nience of working from home. the silicon comes back to the lab, or when the first prototype is fabricated. This is when there are the most unknowns in Current Solutions the design. An accurate tool that provides more data to this The predominant method that is used today for early- early environment is a critical productivity enhancement. stage development is an internally developed custom tool. However, most commercial tools are not available at this The most common way the tool is built is to take the equip-

TECHNOLOGY APPLICATION TECHNOLOGY crucial time for a new standard. ment that is under development and alter the firmware for The second gap is the lack of breadth of the tool suites testing purposes. Effectively the equipment is looped back available. When compared to software development, the to itself with a different personality. Such a solution is often tools lack breadth, sophistication and robustness. For ex- required because there is no other equipment that can com- ample, Wind River, a wholly owned subsidiary of Intel, has municate in the latest protocol. an extensive array of software tools including compilers, This solution – even though predominant – has several trace, unit-test, multiple hardware debuggers, scan chain drawbacks. First, it is expensive, taking an average from six access and Eclipse based workbenches. For the networking to nine months of a developer’s time. Often it is used as a equipment developer there is typically a protocol analyzer learning project for a junior member of the technical staff. that provides a symbolic decode of the packet log file, and Second, it is viewed as a short-term solution and thus may

Networking Tools Networking they may have a software simulator for some traffic situa- have a cumbersome user interface and be poorly maintained. tions. If you were to arm a software engineer with only a Also, since it is based on the hardware under development, trace tool today,it would be ridiculous. However, this is ef- there can be bootstrapping issues when there is not certainty fectively what we routinely do for the networking equipment as to which parts of the system are working correctly yet. development engineer. In talking with project managers, the two biggest con- Another gap that exists is that many tools work at the cerns about custom tools are the risk of missing something wrong abstraction level. For example, the network equip- because it is incestuous testing and the consumption of a ment engineer can use all the same tools that the software scarce resource to develop them. engineer uses, but there is always a need to translate the re- The future for this approach does not look bright. One, it sults to the level that they think and work in. Software tools will continue to become more and more expensive to build work at the instruction level. They can stop at an instruction the custom tool. Two, it will continue to be risky. And three, boundary, but the engineer has to translate that into what the lost productivity from using a hard-to-use tool will con- must be happening at the packet level. Another example is tinue to grow. a spectrum analyzer that can give tremendous detail at the analog level, but again requires translation to be useful for Root Causes of Issues the network engineer. The current state of tools for the networking development did There are some tools at the packet level, notably protocol not just occur overnight. There are several industry dynamics analyzers; there are just not enough of them. The use of tools that have combined to create the current state of developer tools. that work at the wrong level generally causes additional effort to integrate them into the design environment, and additional effort to translate each mea- surement into the desired level. Lastly a gap exists in the portability of tools. Many tools are large and sta- tionary by their size. The tools should be as portable as the product that is being developed. Then it can be easily moved to where the equipment needs to be tested. For example, with wireless equipment the common test environ- ments are open air, wired, test boxes and Faraday cages. Each environment is important to measure different aspects of the product. The measure- ment tools should move easily between these environments. Also a tool that is lab-bench bound may be useless for an issue that only seems to occur at the Figure 1 – Networking Test Architectures

38 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com TECHNOLOGY APPLICATION

The primary cause has been the speed of technology evo- A dramatically new approach to the problem is required. A lution. If the technology had been stagnant, the investment ten-percent better tool may only provide a few months in terms would have been made to improve the breadth and quality of of keeping up with the coming issues. It reminds me of the Ein- the tools. However, it has been an ever-changing target. stein quote, “We can’t solve problems by using the same kind of Such a treadmill effect exists in several tool industries. In thinking we used to create them.” Several innovative solutions the electronic design automation industry, the same set of are being developed for QA testing such as those from Veri- tools needs to be re-built for each new chip layout geometry. Wave for wireless LAN products. The same kind of innovation The complexity of this challenge with ever-smaller geom- needs to be applied to the tools for the development engineer. etries often consumes the development team. Because of The solution should have substantially the following this treadmill, new features are rarely added, and sometimes characteristics. Some of these characteristics have been Networking Tools even dropped in subsequent product generations. made obvious from the discussion in this article. Other Another factor is that test tools use the same basic ar- characteristics are implied because of the need to preserve chitecture as the equipment that they are testing with some the primary benefits of the tool. modifications. (See Figure 1 - Networking Test Architectures.) Characteristics for a new development tool solution: The modifications are made in software, hardware or the net- work physical layer (PHY). For the software, a more controlled t It should be available at first silicon, or first prototype. All of version with a limited number of options is implemented. For the duplication that causes delay needs to be eliminated. the hardware a higher performance or more programmable version is implemented. For the PHY, most commonly a stan- t It should be flexible and configurable. This allows the explo- dard interface chipset is used, but a custom interface solution ration of new versions of protocols, or potential new changes may be used in some cases. The more modifications, the to protocols without an entirely new development. more the tool development will cost, so each modification is implemented, or not, based on a cost-benefit analysis. Also, t It should handle sophisticated security protocols. Security the more modifications that are made, the earlier the develop- is becoming a requirement in so many markets and can be ment needs to start to meet the availability need. painful to work with at the development stage. For some Using the same architecture can also make the test tools applications this dominates the development time. suffer from chicken-or-egg dependencies. For example, a tool that uses a commercial PHY chipset for the physical t It should integrate easily with other tools that are used. The layer will be limited by the availability of the chipset. Some gains that were made in timeliness should not be given back of the disadvantages of this approach can be mitigated by because of the need to spend additional time integrating the an accelerated integration program once the chipset arrives. tool into the development environment. Ideally a tool would be available before the equipment under test, so that the developer could become comfortable with t It should support the easy generation of test cases. If a tool how it will perform before the critical time when first silicon requires significant effort to develop test cases, or learn a or first prototype is delivered. new language, it limits when it can be used. Cumbersome Effectively the test tool developers are on the same test case generation can cause product delays. treadmill as their customers, except their market size is sig- nificantly smaller. This causes many tool companies to take t It should allow the efforts between companies or even a wait-and-see attitude to new standards. Because of these standards to be combined. A solution that works well for just effects,companies often focus on the needs of quality assur- one company will not be an industry solution. The solution ance (QA) testing which is generally larger, but does not have should be able to use the size of the networking industry to the same critical need for early availability. its advantage. Another factor that has limited the advancement of sophis- ticated tools has been the lack of a way for the custom tool This set of requirements may set the bar too high for some ap- developers to share their efforts. Each vendor develops its cus- proaches. However, it reinforces the need to come at the problem tom tools independently. There have been a few cases in the past with a distinctly new approach to meet these requirements. where a consortium has funded tool development, but it hasn’t been early enough to replace the internal custom tools. Rick Denker was the co-founder and vice-president of mar- New Approach Needed keting for VeriWave, Inc., an innovative test system for Currently the networking industry tolerates the method wireless networks. He has a long history of launching new of custom tool development that has gotten the industry this product innovations for leading companies including We- far even though it is expensive. However, with the continued Sync, Synopsys, PMC-Sierra, Intel and Hewlett-Packard. growth of complexity the costs will continue to escalate both He has a computer science degree from MIT and an MBA for the custom development and for the lack of productivity from Dartmouth College. for the development engineers.

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 39 More Analog Needed For Multicore SoCs TECHNOLOGY APPLICATION TECHNOLOGY

By Mike Demler, Contributing Editor

inimizing on-chip power consumption continues to into two classes—switching circuits that use capacitors or Multicore SoCs Multicore Mbe one of the greatest challenges facing SoC design- inductors to boost and scale voltages, and linear regulators. ers. Everyone who owns a cell phone has undoubtedly seen Switching converters are generally preferred for their higher the effect on limited battery life firsthand, but the impact efficiency, but they require large amounts of capacitive or on the unseen compute servers in “the cloud” is even more inductive energy storage. New solutions for power manage- severe, making total electrical operating costs greater than ment will require more sophisticated analog circuit designs, the hardware expense, according to AMD Fellow Stephen possibly combined with additional process steps to build Kosonocky. higher capacity passive components that are compatible with In his presentation at the recent Hot Chips Conference, nanometer scale CMOS. Kosonocky shared the experiences of the AMD Llano ac- Intel, meanwhile, is investigating the use of inductive celerated processing unit (APU) design team and how they “buck converters” for on-chip voltage regulation, accord- addressed these challenges. By integrating a quad-core CPU ing to Donald Gardner, principal engineer at Intel Labs. architecture with a GPU in Llano, AMD was able to eliminate Inductors are commonly integrated into RF ICs for wireless the power that would have been consumed by chip-to-chip applications, but the current carrying capacity and inductive I/O, and increase the bandwidth between the CPU and mem- density of such structures is inadequate for power circuits. ory by 3X. To achieve this integration, the team implemented By adding magnetic materials to a standard CMOS process, a complex power-management scheme that required power engineers can increase the inductance of copper interconnect gating (PG) and dynamic voltage/frequency scaling (DVFS) that is typically used in power busses. On-chip integration throughout the chip, and the combination of hardware poli- of a switching voltage regulator enables the use of circuit cies with operating system (OS) software interaction. techniques to increase frequencies by more than 100 times While advances in circuit design and process scaling have over off-chip devices, which reduces the total inductance re- enabled higher levels of integration in multicore SoCs, Ko- quired by a factor of 1,000. This makes a single-chip solution sonocky showed that another limiting factor must now be feasible, and also offers the benefit of providing much finer considered—device packaging. The Llano APU requires six resolution for dynamic frequency-voltage scaling, because separate power supplies, including two high-current sup- the output of a buck converter is a function of its duty cycle. plies. Designers can’t just add more supplies, he said, because multi-layer packaging is typically limited to only four power planes of thick high-current metal. Aside from the cost impediment of adding more layers, package and chip designers simply run out of space. Each power layer requires its own decoupling capacitors to sup- press supply noise. These chip capacitors are mounted on the package during manufacturing, and they consume available space with surrounding keep-out areas. Also, whenever an- other VDD is added the impact is multiplied by the increased share of package resources that must be dedicated to the VSS return path. Figure 1 - Researchers at Intel Labs have added magnetic With packaging constraints now limiting power delivery materials to a 90nm CMOS process to build integrated switched-inductor voltage regulators. (source: “Integrated to the number of cores that can be supported in an SoC, de- Inductors with Magnetic Materials for On-Chip Power signers are looking to circumvent the problem by bringing Conversion”, 2011 Hot Chips Conference) external voltage regulators on-chip. Voltage regulators fall

40 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com TECHNOLOGY APPLICATION

The magnetic materials that Intel is evaluating include co- test chip to test their concepts, achieving about 80% efficiency at balt, zirconium and tantalum (CoZrTa) and nickel-iron (NiFe). 86 watts per square millimeter—close to the goal of 1 watt per Gardner said that regardless of the material, physics limits the square millimeter for a processor SoC. gain in inductance that can be achieved by coupling a single layer of magnetic material to a wire to only two times, which is insufficient. Building structures that completely wrap wires in two magnetic layers, as his team is doing, is more complex but yields inductance gain that is much higher—theoretically up to the increase in the added material’s permeability. Striped inductors (rather than spirals) are the “Holy Grail” Multicore SoCs of voltage converters, said Gardner, because the application of a magnetic field during the deposition process inevitably creates orthogonal “hard” and “easy” axes. The hard axis has the property of saturating too quickly, but laying an elongated stripe in the easy direction takes full advantage of the increase in inductance. Figure 2 - Researchers at UC Berkeley’s Wireless Research By wrapping a thick copper wire with two layers of CoZrTa, and Center have proposed incorporating switched-capacitor sealing the sides with magnetic vias to prevent flux leakage, Intel DC-DC converters in a 3D IC configuration, to supply power has seen inductance increases of more than 30 times compared over tha area of a processor SoC. (source: “Fully Integrated to air-core inductors. Intel’s research has progressed to the proto- Switched-Capacitor DC-DC Conversion”, 2011 Hot Chips Conference) type stage, with a 48-core test chip containing 8 on-chip voltage regulators that the company has distributed to researchers for Higher capacitance per area yields higher efficiency in SC con- further investigation of new power management techniques. verters, and losses in the bottom plate parasitic set the maximum It is unclear how much additional cost would be incurred by efficiency that can be achieved. The use of dense trench capaci- adding magnetic materials to a fabrication process, but capacitors tors, such as in DRAMs, has been shown to offer the potential of are an intrinsic component of CMOS transistors and are com- about 90% SC regulator efficiency. Alon proposed that SC voltage monly used for analog/mixed-signal circuits and on-chip power regulators could be integrated into about 10% of the area of a supply decoupling. Elad Alon, of the University of California’s DRAM die, and used to supply the power in a processor-mem- Berkeley Wireless Research Center, has explored this alternative. ory 3D IC package. Alternatively, because the power regulator In SC switched-capacitor (SC) DC-DC converters, Alon noted circuits can be built in older, less-expensive process technolo- that efficiency is limited by conductance density, or the amount gies, a dedicated converter chip could be stacked and connected of current (or power) delivered to a load for a given voltage. A DC- through TSVs (through-silicon vias) to distribute power over the DC converter could be built as a replacement in the same area entire area of a processor die. as a typical decoupling capacitor, which he estimated to occupy about 10% of a chip, so that no additional cost would be incurred if the regulators delivered at least 10 times the power density that Mike Demler has more than 30 years of experience their loads consumed. A typical processor was estimated to con- in high-tech industries spanning semiconductors, sume about 1 watt per square millimeter, but the payoff would be EDA software, and mobile/wireless technology. even higher in a lower power mobile device, which typically has Mike was previously a Technical Editor at EDN 10 times lower power density. The Berkeley Wireless Research magazine. team implemented a 32nm CMOS SOI silicon-on-insulator (SOI) BLOG ‘Tilting’ the Playing Field - Technology as Pinball Koby’s Kaos blog by Jim Kobylecky I started to write an op/ed for a recent issue of ChipDesigner When you contrast “Green” with “Profitable,” there isn’t any eNewsletter on “Green Technology.” But the more I worked on it, contest. the more depressed I became. You can write many upbeat things about going green in handhelds and data centers, but all you’re To read the full story, please visit: http://www.chipdesignmag. really describing are the seasonings used to make our burgeoning com/kobylecky/ banquet of sugars and fats taste a little healthier.

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 41 On-Chip Interconnection IP Gains Attention TECHNOLOGY APPLICATION TECHNOLOGY

By John Blyler, Editorial Director

On-Chip IP onnecting a multitude of internal and third-party IP re- bus structure known as the Intel On-Chip System Fabric Cquires ever-advancing on-chip bus technology from big (IOSF). players such as ARM, OCI-IP and Intel as well as startups Other proprietary on-chip bus structures includes MIPS’ such as Arteris and Sonics. SoC-it and IBM’s CoreConnect, to mention a few. These The growth of third-party semiconductor core and sub- buses have bridging capabilities to ARM’s AMBA bus or the system IP has been a prerequisite for the timely development Open Core Protocol (OCP) standard for IP cores (OCP-IP) of today’s extremely complex system-on-chip (SoC) devices. socket technology. (See, “Coherent Messages from ARM and But as much as IP helps, it also creates another problem: How OCP?“) can designers connect all these IP blocks together without Even FPGA vendors are becoming part of the on-chip sacrificing the SoC’s timing, power and performance con- communication IP equation. A significant change in the straints? recent AMBA specification was driven by the need to accom- These interconnect challenges are the reason why on-chip modate FPGAs within SoC devices. The update reflected the communication IP continues to be a hot topic. Within the results of several years of work between FPGA giant Xilinx last several months, the leading mobile processor company and ARM. Recent update of the AMBA spec to version 4.0 – ARM – has announced significant enhancements to its now includes AXI-Streaming and Lite elements. These two AMBA bus technology. In that same timeframe, the leading additions allow ARM processors to interface directly with processor IDM – Intel – drew attention to its relatively new FPGAs (see, “FPGAs Move to IP through Processor Inter- face”). Two major EDA companies focused entirely on the on- chip interconnect IP market are Arteris and Sonics. Each approaches the core-to-core communication problem in a different way. Arteris replaces traditional on-chip, fixed-bus archi- tectures with a packet-based, network on a chip (NOC) technology. Instead of point-to-point dedicated wire con- nections, the company’s NOC approach reuses existing wires. Data is sent as scheduled, layered packets across the same wires. Sonics also uses NoC technology, but emphasizes socket-based instead of packet-based design. This emphasis highlights its use of standard networking techniques to facil- itate on-chip communication. Single words replace packets. Further, Sonics does not use the globally asynchronous, lo- cally synchronous (GALS) approach favored by Arteris. Sonics recently celebrated its 15-year anniversary as an on-chip communication IP provider. Among the company’s milestones are the shipment of over one billion chips by Silicon CMOS integrated circuit with Carbon nanotube customers and securing, “the largest array of on-chip com- interconnect (Credit: Gael Close Stanford University) munications IP of any network-on-chip (NoC) provider.” Representatives from both Arteris and Sonics were recently interviewed by the Low-Power Engineering com- munity. Charles Janac, CEO of Arteris and Jack Browne,

42 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com TECHNOLOGY APPLICATION

senior VP of sales and marketing at Sonics, were asked by What lies ahead for on-chip interconnection technol- Ed Sperling to list the big issues that must be addressed in ogy? According to the International Technology Roadmap billion-gate designs. Janic said that achieving required pro- for Semiconductors (ITRS), interconnect innovation with cessing power was the first need. But the second requirement new technologies is vital to satisfy performance and power was integration of IP cores. “How do you bring these cities of requirements in long term support of ultra-high data rates silicon together, which is where the communication system (greater than 100 Gbps/pin). Promising future technologies for the SoC becomes critical?” include optical, RF/wireless and even carbon nano-tubes Brown agreed, noting that scaling to four or eight cores (CNTs). requires a huge amount of parallelism and on-chip memory. “The issue we see is how you get that right, and today the John Blyler can be reached at: IP On-Chip solution is a lot of subsystem design.” [email protected]

BLOG Engineering - The Lost Profession JB’s Circuit blog by John Blyler

I just finished reading “The Lost Symbol,” by Dan ing programs, he said, because American students aren’t Brown. It was about the misunderstood meaning and pursuing them.” purpose of the Masonic Order. A similar story could be “We have plenty of spots,” he said. “We just need to get written about the engineering profession. more of the population into those spots.” The ring is given in a ceremony developed with the The second relevant data point in this quandry assistance of Rudyard Kipling and known as “The Ritual facing the engineering profession came from a conversa- of the Calling of an Engineer.” tion that I had earlier this summer with Terry Bristol, Let me share with you two recent activities that President of the Institute for Science, Engineering and emphasis the problems facing engineering - at least in the Public Policy. Terry, a long time advocate for the engi- US. The first one comes from a Portland State University neering profession, called my attention to this article: panel event with Intel’s CEO Paul Otellini and Energy “Public Understanding of Engineering: Consequences Secretary Steven Chu. Here is a portion of that discus- and Solutions.” The gist of this story is that the decline sion, reported by Mike Rogoway of the Oregonian: of the number of engineering and technology graduates “Panelists broadly agreed Wednesday that engineering throughout the last decade must be addressed to avoid has gotten a bad rap in the U.S., lamenting with laughs serious problems in the future. This paper called for that that there aren’t many TV shows that glorify the job. specific changes in the way engineering is taught, as well And they said that teaching methods need to improve, as a serious campaign to improve public awareness. noting that large numbers of students transfer out of The recent PSU talks and the paper on public un- engineering programs.” derstanding caused me to reconsider the plight of the “PSU engineering dean Renjeng Su sounded a caution- engineering profession. Why have engineers lost their ary note on the forum’s goal Wednesday, warning that respect and appreciation in the public eye? The marvel of teaching 10,000 new engineering grads to truly innovate semiconductor technology created by engineers at ever costs more than simply certifying that they’ve taken decreasing cost to the consumer seems to have done our classes or passed a test.” profession more harm then good. “Randy L. Rasmussen/The OregonianPanelists spoke Perhaps a massive public relations effort is needed to an audience of Portland business and civic leaders at to remind the average American that without engineer- Wednesday’s forum in Portland State University’s Hoff- ing, science is of little worth. It is time for all of us to man Hall.” rediscover the lost “importance” of the least appreciated “I don’t think that can be done cheaply,” Su said. profession in the US. “There is an intense cost to be worked out.” “For his part, Otellini said cost is less of an issue JB’s Circuit, www.chipdesignmag.com/blyler than attracting and retaining engineering students. Foreign students are filling seats in domestic engineer-

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6WINDGate Multicore Packet Processing Software

Compatible Architectures: Cavium OCTEON/OCETON- II, Freescale QorIQ, Intel® x86, NetLogic XLR/XLS/XLP, Tilera TilePro64 6WINDGate™ is the Gold Standard in packet processing software for networking equipment, wireless infrastructure, security appliances and data centers. It provides up to 10x the packet processing performance of a standard networking stack, significantly improving the price-performance and power-performance ratios of networking equipment. 6WINDGate is compatible with standard Operating System APIs (e.g. Netfilter, Netlink etc). This ensures that clients can migrate either from a single-core to t
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6WIND Immeuble Central Gare 1 place Charles de Gaulle Montigny-le-Bretonneux, 78180 France +1 (650) 968-8768 Telephone [email protected] http://www.6wind.com

www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 45 Embedded Computer System for Transportation – tBOX311-820-FL

Axiomtek introduces its NEW transportation solution, tBOX311-820-FL, a fanless embedded computing system that incorporates the Intel® Atom™ processor Z510PT (1.1 GHz) or Z520PT (1.33 GHz) with an Intel® System $POUSPMMFS
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Low Power Consumption PICMG 1.3 Half-size Slot CPU Card – SHB213

Axiomtek announced its newest PICMG 1.3 half-size $16
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46 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Product ShowcaseProduct COMMELL launches LV-67H---2nd Generation Intel® Core™ i7/i5/i3 Processor- based Mini-ITX

Taiwan Commate Computer Inc.(COMMELL), the worldwide leader of Industrial Mini-ITX mainboard, introduced the Mini-ITX motherboard LV-67H that designed for the 2nd generation Intel® Core™ i7, Core™ i5 and Core™ i3 processors in the rPGA988B socket. The Mini-ITX mainboard based on Mobile Intel® QM67 Express chipset, providing a single-chip architecture and delivering with Intel® vPro™ Technology & Intel® Anti-Theft Technology, along with a 32nm 2nd generation Intel Core i7/i5/i3 processors with Intel® HD Graphic 3000 that contains a refresh of the sixth generation graphics core enabling substantial gains in performance and lower power consumption, this innovative two-chip solution provides Intel® Hyper- Threading technology which giving you smart multitasking performance to move between applications quickly. This platform delivers higher performance, energy efficiency, most secure and manageable, It is ideal for a various range of applications, such as industrial control and automation, gaming, Medical Instruments, Surveillance Server, Military systems, print imaging and digital signage etc. Expansion takes the form of one PCIE x16 slot, two Mini- PCIE slots, and 9V~24V full range DC input. LV-67H equipped with dual-channel DDR3 memory up to a maximum of 16GB in dual SO-DIMM slots. Dual channel Taiwan Commate Computer Inc. 24-bit LVDS, VGA, DVI . LV-67H provides a wide range of 886-2-26963909 Phone storage, I/O, expansion connectivity, and full range power 886-2-26963911 Fax source input, including PS/2 ports, 5 x RS232C and 1 x [email protected] RS232/422/485 ports, Networking is provided by 2 x Intel® [email protected] 82574L Gigabit Ethernet Controllers, 10 x USB2.0 ports, www.commell.com.tw High Definition Audio port, 4 SATA2.0 and 2 SATA3.0,

Embedded Intel® Solutions Designing with delivers in-depth product, technology Intel® Embedded and design information to engineers and embedded developers who design with Processors? Intel® Embedded processors

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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 47 3U & 6U VITA 46 VPX & VITA 65 OpenVPX Processor Boards

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CPCI7203 Air- and Conduction-Cooled 3U Processor Board

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48 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Product ShowcaseProduct

Embedded Computers

The Emerson Network Power Embedded Computers are based around x86 Intel® architecture embedded motherboards with processor and memory, plus a disk. These are integrated into BO
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iVME7210 Dual-Core VMEbus SBC

The iVME7210, with Intel® Core™ i7 processor variants and the Mobile Intel® QM57 Express chipset, is designed for a range of industrial, medical and military/aerospace applications including robotics, image processing, radar/sonar and C4. The dual-core processor has integrated memory and graphics controller. On-board memory includes up to 8GB DDR3 soldered memory and 256KB non-volatile Ferroelectric Random Access Memory (F-RAM). F-RAM does not require batteries or periodic refreshes and offers much greater read/ XSJUF
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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 49 RapiDex™ Board Customization Service

In addition to standard motherboard and Computer-on- Module (COM) products, Emerson now enables cost-effective embedded solutions by tailoring the motherboard design to match your requirements.

Product Showcase Introducing the RapiDex™ board customization service from Emerson Network Power. Emerson’s unique design and manufacturing technology delivers quick turns with minimal setup fees. First boards are delivered within eight (8) weeks of the order. Any following production order has a volume commitment of only 100 pieces, with unit costs comparable to standard products. Emerson’s rapid customization capability can remove the need to use a less optimized standard product, leading to improved DPTU
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50 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Product ShowcaseProduct ITOX Targets Video Surveillance & Control Applications With New 2nd Generation Intel® Core™ Processor-based microATX Platform

The new ITOX SB331-IPM microATX embedded board with Intel® Q67 Express chipset supports the 2nd generation Intel® Core™ i7-2600, Core™ i5-2400, and Core™ i3-2120 processors with 32-nanometer process technology providing higher performance at lower power than the previous generation. This scalable desktop platform incorporates features making it ideal for video and networking intensive applications, including three Gigabit LAN ports, two PCIe x16 expansion slots (1 x16 signal 1 x4 signal) for video capture cards, 2 PCIe x1 auxiliary expansion slots, and 36 digital IO ports for device control. The Intel® HD Graphics 2000 engine integrated into the 2nd generation Intel® Core™ processor supports six graphics execution units with dynamic turbo boost to accelerate video processing, and Intel® Clear Video Technology providing advanced imaging capability for HD video applications. The ITOX SB331-IPM features full Intel® vPro™ Technology support and is ideal for embedded applications such as ITOX SB331-IPM microATX Board Features EJHJUBM
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TRACE32® PowerTools for Intel® Atom™ and Intel® Core™ i3/i5/i7 Processors

Lauterbach TRACE32® with Intel® processor support brings its mature high-end debugging solution to the Intel® Atom™ processor and Intel® Core™ i3, Core™ i5 and Core™ i7 processors. The TRACE32®
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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 51 Toucan-QM57

COM Express Module For Harsh Environments Features Condition Monitoring With the Toucan-QM57, LiPPERT Embedded Computers offers B
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52 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Product ShowcaseProduct

MSI Networking Solutions

MS-9A58 Networking System Solution The new MSI MS-9A58 is powered by the latest dual-core Intel® Atom™ processor D525, supporting up to 4GB of DDR3 memory. With a compact mini-ITX form factor the 9A58 is designed with rich I/O functionality, increased performance and graphics power for today’s demanding network and security applications such as small business VPN, VoIP, SAN and NAS. Network versatility is achieved with 4 Intel® 82574L Gigabit Ethernet Controller LAN ports, including one pair of single latch supporting auto-bypass function. For the storage application, it supports 2 SATA ports. To satisfy increasing demands of connecting more peripheral devices, MS-9A58 is equipped with abundant I/O design, includes one RS-232 and one RS-232/422/485 serial QPSUT
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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 53 Intel® Core™ 2 Duo processor on standard EBX footprint

VersaLogic’s Mamba SBC provides extreme performance and high reliability for the most demanding embedded applications. It combines a 2.26 GHz Intel® Core™2 Duo processor, high-end graphics and video, and extensive on- board I/O on an industry standard EBX platform. Product Showcase Standard features include dual gigabit Ethernet, up to 8 GB %%3
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54 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com Product ShowcaseProduct

XPedite7302: An Intel® Core™ i7 Processor-Based XMC Module with SecureCOTS™

X-ES’s XPedite7302 is a high-performance XMC module featuring the Intel® Core™ i7 processor, Mobile Intel® QM57 Express Chipset and SecureCOTS™. With its SecureCOTS capabilities, the XPedite7302 can provide data encryption and decryption and enables developers to address a program’s protection requirements. Each of the five external PCI Express interfaces and the Gigabit Ethernet port links can be controlled directly by the FPGA. The serial interface passes through the interface to allow the FPGA to control what data is passed externally to the CPU system. The XPedite7302 uses NOR flash exclusively rather than any NAND based flash to further its long term data retention. Both the SPI NOR flash used for booting firmware and the parallel bus NOR flash are routed through the FPGA to allow for any XPedite7302 features: type of user encryption on the data before it is presented t
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environmental requirements. Wind River VxWorks and Linux Extreme Engineering Solutions, Inc. Board Support Packages (BSPs) are available. 3225 Deming Way, Suite 120 Middleton, WI 53562 608-833-1155 Telephone 608-827-6171 Fax [email protected] www.xes-inc.com

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www.embeddedintel.com | Embedded Intel® Solutions — Fall 2011 | 55 LAST WORD

Intel’s Hybrid CPU-FPGA

By Tom R. Halfhill, The Linley Group

he rising costs of designing and manufacturing ASICs have interfaces include eight 3.125Gbps serdes lanes and 364 I/O pins Tmotivated several established semiconductor companies and capable of various signaling standards. startups to find substitutes. Of course, FPGAs are the old standbys, One limitation is that all communications between the FPGA and they continue to gain popularity as the cost of reprogrammable and the Intel Atom processor must funnel through the 1x1 PCIe logic gradually declines. Beyond low-volume applications, how- channel linking the two die. This bottleneck makes offloading ever, FPGAs remain an expensive solution, and their relatively high some tasks from the CPU to the FPGA impractical. For many em- power consumption is a major obstacle. bedded applications, however, this channel is sufficient. Another drawback of FPGAs is that their CPU options are very The integrated graphics core of the Intel Atom processor E600C limited. Implementing a synthesizable CPU core in the program- is the Intel® Graphics Media Accelerator (Intel® GMA) 600, a version mable-logic fabric is not difficult, but performance is comparatively of the SGX-535 GPU core licensed from Imagination Technologies. poor, even in the fastest and most expensive FPGAs. In past years, It supports Microsoft’s DirectX 9 graphics and runs at 400MHz. Altera and Xilinx, the leading FPGA vendors, have offered a few That frequency is twice as fast as other SGX-535 implementations, FPGAs with hard CPU cores baked into the chip. The variety of and it can execute 1.6 gigaflops. Given that the slower SGX-535 in these hybrid devices is quite narrow, however, and other disadvan- Apple’s iPhone 3GS can draw 7.7 million triangles per second, the tages have stunted their adoption. performance of the Intel GMA 600 is about 15 million triangles Nevertheless, the demand for an ASIC substitute remains strong, per second. An integrated video encoder/decoder supports various so companies keep striving to meet the challenge. The latest attempts formats, including H.264 at 1080p, 30fps. An audio accelerator pro- are from Intel, STMicroelectronics, vides up to eight 32-bit channels at and Xilinx—and Altera is prom- 192kHz. ® ising future announcements. All The Intel Atom™ processor E600C series Although the highly inte- these companies are crafting new grated E600C processors cost ways to combine hard CPU cores is the obvious choice if x86 compatibility more than Tunnel Creek proces- with programmable logic. sors, they are a bargain compared Intel’s solution is the Intel® is paramount or if the application would with the prices of FPGAs in low Atom™ processor E600C Series volumes. Power consumption (codename Stellarton), which benefit from integrated graphics. is relatively low, too: about 7W pairs an Intel Atom processor thermal design power (TDP). SoC with an Altera FPGA in a The Intel Atom processor multichip package. These products even have integrated graphics. E600C series is the obvious choice if x86 compatibility is paramount But the key feature is programmable logic, which allows developers or if the application would benefit from integrated graphics. At its to add application-specific functions that normally would require top speed of 1.3GHz, the Intel Atom processor E665C is the fastest spinning a custom ASIC. hybrid processor of this type announced to date. All things consid- At 1.3GHz, the Intel® Atom™ processor E665C is the fastest ered, it is a feasible alternative to a conventional ASIC project. For member of the series. In one package is a single-core dual-threaded embedded designers, the Intel Atom E600C processor series opens Intel Atom processor SoC (codename Tunnel Creek) and an Altera up the possibility of using a processor customized for a specific ap- Arria-II FPGA. The two die are bonded side-by-side and linked plication instead of settling for a standard off-the-shelf processor. over a 1x1 PCI Express Gen1 interface. Notably, the Intel Atom processor E600C series is the only hybrid processor of this type Tom R. Halfhill is a senior analyst at The Lin- supporting the Intel® architecture (x86). ley Group and senior editor of Microprocessor The FPGA die is from Altera’s midrange family. It has 63,250 Report. He has been a journalist since 1977 and reprogrammable logic elements, the equivalent of about 759,000 has been providing in-depth technology coverage ASIC gates—roomy enough for customization. It also has 5.3Mbits since 1982. Prior to serving as a senior analyst of block RAM and 312 18x18-bit multipliers (often called DSP for In-Stat, he was a technology analyst at ARC blocks by FPGA vendors). Because the multipliers are hard wired, Cores, a senior editor at BYTE Magazine, and editor at several they free all the programmable logic for custom development. I/O other publications.

56 | Embedded Intel® Solutions — Fall 2011 | www.embeddedintel.com

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