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Reconfigurable Embedded Control Systems: Problems and Solutions
RECONFIGURABLE EMBEDDED CONTROL SYSTEMS: PROBLEMS AND SOLUTIONS By Dr.rer.nat.Habil. Mohamed Khalgui ⃝c Copyright by Dr.rer.nat.Habil. Mohamed Khalgui, 2012 v Martin Luther University, Germany Research Manuscript for Habilitation Diploma in Computer Science 1. Reviewer: Prof.Dr. Hans-Michael Hanisch, Martin Luther University, Germany, 2. Reviewer: Prof.Dr. Georg Frey, Saarland University, Germany, 3. Reviewer: Prof.Dr. Wolf Zimmermann, Martin Luther University, Germany, Day of the defense: Monday January 23rd 2012, Table of Contents Table of Contents vi English Abstract x German Abstract xi English Keywords xii German Keywords xiii Acknowledgements xiv Dedicate xv 1 General Introduction 1 2 Embedded Architectures: Overview on Hardware and Operating Systems 3 2.1 Embedded Hardware Components . 3 2.1.1 Microcontrollers . 3 2.1.2 Digital Signal Processors (DSP): . 4 2.1.3 System on Chip (SoC): . 5 2.1.4 Programmable Logic Controllers (PLC): . 6 2.2 Real-Time Embedded Operating Systems (RTOS) . 8 2.2.1 QNX . 9 2.2.2 RTLinux . 9 2.2.3 VxWorks . 9 2.2.4 Windows CE . 10 2.3 Known Embedded Software Solutions . 11 2.3.1 Simple Control Loop . 12 2.3.2 Interrupt Controlled System . 12 2.3.3 Cooperative Multitasking . 12 2.3.4 Preemptive Multitasking or Multi-Threading . 12 2.3.5 Microkernels . 13 2.3.6 Monolithic Kernels . 13 2.3.7 Additional Software Components: . 13 2.4 Conclusion . 14 3 Embedded Systems: Overview on Software Components 15 3.1 Basic Concepts of Components . 15 3.2 Architecture Description Languages . 17 3.2.1 Acme Language . -
Lecture 1: Course Introduction G Course Organization G Historical Overview G Computer Organization G Why the MC68000? G Why Assembly Language?
Lecture 1: Course introduction g Course organization g Historical overview g Computer organization g Why the MC68000? g Why assembly language? Microprocessor-based System Design 1 Ricardo Gutierrez-Osuna Wright State University Course organization g Grading Instructor n Exams Ricardo Gutierrez-Osuna g 1 midterm and 1 final Office: 401 Russ n Homework Tel:775-5120 g 4 problem sets (not graded) [email protected] n Quizzes http://www.cs.wright.edu/~rgutier g Biweekly Office hours: TBA n Laboratories g 5 Labs Teaching Assistant g Grading scheme Mohammed Tabrez Office: 339 Russ [email protected] Weight (%) Office hours: TBA Quizes 20 Laboratory 40 Midterm 20 Final Exam 20 Microprocessor-based System Design 2 Ricardo Gutierrez-Osuna Wright State University Course outline g Module I: Programming (8 lectures) g MC68000 architecture (2) g Assembly language (5) n Instruction and addressing modes (2) n Program control (1) n Subroutines (2) g C language (1) g Module II: Peripherals (9) g Exception processing (1) g Devices (6) n PI/T timer (2) n PI/T parallel port (2) n DUART serial port (1) g Memory and I/O interface (1) g Address decoding (2) Microprocessor-based System Design 3 Ricardo Gutierrez-Osuna Wright State University Brief history of computers GENERATION FEATURES MILESTONES YEAR NOTES Asia Minor, Abacus 3000BC Only replaced by paper and pencil Mech., Blaise Pascal, Pascaline 1642 Decimal addition (8 decimal figs) Early machines Electro- Charles Babbage Differential Engine 1823 Steam powered (3000BC-1945) mech. Herman Hollerith, -
A Modular Soft Processor Core in VHDL
A Modular Soft Processor Core in VHDL Jack Whitham 2002-2003 This is a Third Year project submitted for the degree of MEng in the Department of Computer Science at the University of York. The project will attempt to demonstrate that a modular soft processor core can be designed and implemented on an FPGA, and that the core can be optimised to run a particular embedded application using a minimal amount of FPGA space. The word count of this project (as counted by the Unix wc command after detex was run on the LaTeX source) is 33647 words. This includes all text in the main report and Appendices A, B and C. Excluding source code, the project is 70 pages in length. i Contents I. Introduction 1 1. Background and Literature 1 1.1. Soft Processor Cores . 1 1.2. A Field Programmable Gate Array . 1 1.3. VHSIC Hardware Definition Language (VHDL) . 2 1.4. The Motorola 68020 . 2 II. High-level Project Decisions 3 2. Should the design be based on an existing one? 3 3. Which processor should the soft core be based upon? 3 4. Which processor should be chosen? 3 5. Restating the aims of the project in terms of the chosen processor 4 III. Modular Processor Design Decisions 4 6. Processor Design 4 6.1. Alternatives to a complete processor implementation . 4 6.2. A real processor . 5 6.3. Instruction Decoder and Control Logic . 5 6.4. Arithmetic and Logic Unit (ALU) . 7 6.5. Register File . 7 6.6. Links between Components . -
Introduction of Microprocessor
Introduction of Microprocessor A Microprocessor is an important part of a computer architecture without which you will not be able to perform anything on your computer. It is a programmable device that takes in input, performs some arithmetic and logical operations over it and produces desired output. In simple words, a Microprocessor is a digital device on a chip which can fetch instruction from memory, decode and execute them and give results. Basics of Microprocessor – A Microprocessor takes a bunch of instructions in machine language and executes them, telling the processor what it has to do. Microprocessor performs three basic things while executing the instruction: 1. It performs some basic operations like addition, subtraction, multiplication, division and some logical operations using its Arithmetic and Logical Unit (ALU). New Microprocessors also perform operations on floating point numbers also. 2. Data in a Microprocessor can move from one location to another. 3. It has a Program Counter (PC) register that stores the address of the next instruction based on the value of PC, Microprocessor jumps from one location to another and takes decision. A typical Microprocessor structure looks like this. Clock Speed of different Microprocessor: 16-bit Microprocessor – 8086: 4.7MHz, 8MHz, 10MHz 8088: more than 5MHz 80186/80188: 6MHz 80286: 8MHz 32-bit Microprocessor – INTEL 80386: 16MHz to 33MHz INTEL 80486: 16MHz to 100MHz PENTIUM: 66MHz 64-bit Microprocessor – INTEL CORE-2: 1.2GHz to 3GHz INTEL i7: 66GHz to 3.33GHz INTEL i5: 2.4GHz to 3.6GHz INTEL i3: 2.93GHz to 3.33GHz We do not have any 128-bit Microprocessor in work at present one among the reasons for this is that we are a long way from exhausting the 64 bit address space itself, we use it a constant rate of roughly 2 bits every 3 years. -
Architecture of 8051 & Their Pin Details
SESHASAYEE INSTITUTE OF TECHNOLOGY ARIYAMANGALAM , TRICHY – 620 010 ARCHITECTURE OF 8051 & THEIR PIN DETAILS UNIT I WELCOME ARCHITECTURE OF 8051 & THEIR PIN DETAILS U1.1 : Introduction to microprocessor & microcontroller : Architecture of 8085 -Functions of each block. Comparison of Microprocessor & Microcontroller - Features of microcontroller -Advantages of microcontroller -Applications Of microcontroller -Manufactures of microcontroller. U1.2 : Architecture of 8051 : Block diagram of Microcontroller – Functions of each block. Pin details of 8051 -Oscillator and Clock -Clock Cycle -State - Machine Cycle -Instruction cycle –Reset - Power on Reset - Special function registers :Program Counter -PSW register -Stack - I/O Ports . U1.3 : Memory Organisation & I/O port configuration: ROM RAM - Memory Organization of 8051,Interfacing external memory to 8051 Microcontroller vs. Microprocessors 1. CPU for Computers 1. A smaller computer 2. No RAM, ROM, I/O on CPU chip 2. On-chip RAM, ROM, I/O itself ports... 3. Example：Intel’s x86, Motorola’s 3. Example：Motorola’s 6811, 680x0 Intel’s 8051, Zilog’s Z8 and PIC Microcontroller vs. Microprocessors Microprocessor Microcontroller 1. CPU is stand-alone, RAM, ROM, I/O, timer are separate 1. CPU, RAM, ROM, I/O and timer are all on a single 2. designer can decide on the chip amount of ROM, RAM and I/O ports. 2. fix amount of on-chip ROM, RAM, I/O ports 3. expansive 3. for applications in which 4. versatility cost, power and space are 5. general-purpose critical 4. single-purpose uP vs. uC – cont. Applications – uCs are suitable to control of I/O devices in designs requiring a minimum component – uPs are suitable to processing information in computer systems. -
A Manual for the Assemblerߤ Rob Pike Lucent Technologies, Bell Labs
A Manual for the Assembler Rob Pike Lucent Technologies, Bell Labs Machines There is an assembler for each of the MIPS, SPARC, Intel 386, ARM, PowerPC, Motorola 68010, and Motorola 68020. The 68020 assembler, 2a, is the oldest and in many ways the prototype. The assemblers are really just variations of a single program: they share many properties such as left-to-right assignment order for instruction operands and the synthesis of macro instructions such as MOVE to hide the peculiarities of the load and store structure of the machines. To keep things concrete, the first part of this manual is specifically about the 68020. At the end is a description of the differences among the other assemblers. Registers All pre-defined symbols in the assembler are upper-case. Data registers are R0 through R7; address registers are A0 through A7; floating-point registers are F0 through F7. A pointer in A6 is used by the C compiler to point to data, enabling short addresses to be used more often. The value of A6 is constant and must be set during C program initialization to the address of the externally-defined symbol a6base. The following hardware registers are defined in the assembler; their meaning should be obvious given a 68020 manual: CAAR, CACR, CCR, DFC, ISP, MSP, SFC, SR, USP, and VBR. The assembler also defines several pseudo-registers that manipulate the stack: FP, SP, and TOS. FP is the frame pointer, so 0(FP) is the first argument, 4(FP) is the second, and so on. SP is the local stack pointer, where automatic variables are held (SP is a pseudo-register only on the 68020); 0(SP) is the first automatic, and so on as with FP. -
Linux User Group HOWTO Linux User Group HOWTO Table of Contents Linux User Group HOWTO
Linux User Group HOWTO Linux User Group HOWTO Table of Contents Linux User Group HOWTO..............................................................................................................................1 Rick Moen...............................................................................................................................................1 1. Introduction..........................................................................................................................................1 2. What is a GNU/Linux user group?......................................................................................................1 3. What LUGs exist?................................................................................................................................1 4. What does a LUG do?..........................................................................................................................1 5. LUG activities......................................................................................................................................1 6. Practical suggestions............................................................................................................................1 7. Legal and political issues.....................................................................................................................2 8. About this document............................................................................................................................2 1. Introduction..........................................................................................................................................2 -
Medidor Online De Temperatura Y Humedad De Bajo Consumo
Medidor online de temperatura y humedad de bajo consumo Estudiante: Jesús Santiago Fernández Prieto “Ingeniería Técnica de Informática de Sistemas” Consultor: Jordi Bécares Ferrés 11 de Junio de 2013 When I read commentary about suggestions for where C should go, I often think back and give thanks that it wasn't developed under the advice of a worldwide crowd. (D. Ritchie) A mi familia, novia y amigos. 2 Resumen Para este proyecto se ha diseñado un dispositivo con capacidad de conexión a Internet a través de un punto de acceso WIFI para el envío de datos y alertar en caso de posibles temperaturas y humedades críticas, definidas con un valor mínimo y un máximo. El diseño de este dispositivo se ha hecho teniendo en cuenta el reducir el consumo de energía para maximizar autonomía. El dispositivo está basado en una mota LPC1769 que posee un procesador Cortex-M3 de ARM el cual ejecuta nuestro programa desarrollado. Este programa hace uso del sistema operativo FreeRTOS (Free Real Time Operating System) que facilitará y nos asegurará estabilidad. La mota llevará conectada un chip WiFly que se usará para poder conectarnos por WiFi al punto de acceso. Cuenta además con un sensor SHT15 que permite, a la mota, tomar las mediciones de temperatura y humedad relativa. Estos serán posteriormente enviados al servidor. En caso de que en alguno de esos valores esté fuera del rango de seguridad se avisará al usuario a través de dos leds conectados también a la mota. Se le puede configurar una dirección de correo electrónico donde se enviarán alertas para enviar un correo al usuario advirtiéndole de un posible problema. -
Extracting and Mapping Industry 4.0 Technologies Using Wikipedia
Computers in Industry 100 (2018) 244–257 Contents lists available at ScienceDirect Computers in Industry journal homepage: www.elsevier.com/locate/compind Extracting and mapping industry 4.0 technologies using wikipedia T ⁎ Filippo Chiarelloa, , Leonello Trivellib, Andrea Bonaccorsia, Gualtiero Fantonic a Department of Energy, Systems, Territory and Construction Engineering, University of Pisa, Largo Lucio Lazzarino, 2, 56126 Pisa, Italy b Department of Economics and Management, University of Pisa, Via Cosimo Ridolfi, 10, 56124 Pisa, Italy c Department of Mechanical, Nuclear and Production Engineering, University of Pisa, Largo Lucio Lazzarino, 2, 56126 Pisa, Italy ARTICLE INFO ABSTRACT Keywords: The explosion of the interest in the industry 4.0 generated a hype on both academia and business: the former is Industry 4.0 attracted for the opportunities given by the emergence of such a new field, the latter is pulled by incentives and Digital industry national investment plans. The Industry 4.0 technological field is not new but it is highly heterogeneous (actually Industrial IoT it is the aggregation point of more than 30 different fields of the technology). For this reason, many stakeholders Big data feel uncomfortable since they do not master the whole set of technologies, they manifested a lack of knowledge Digital currency and problems of communication with other domains. Programming languages Computing Actually such problem is twofold, on one side a common vocabulary that helps domain experts to have a Embedded systems mutual understanding is missing Riel et al. [1], on the other side, an overall standardization effort would be IoT beneficial to integrate existing terminologies in a reference architecture for the Industry 4.0 paradigm Smit et al. -
Instruction Manual TMS 202 68020 & 68EC020 Microprocessor Support
Instruction Manual TMS 202 68020 & 68EC020 Microprocessor Support 070-9820-00 There are no current European directives that apply to this product. This product provides cable and test lead connections to a test object of electronic measuring and test equipment. Warning The servicing instructions are for use by qualified personnel only. To avoid personal injury, do not perform any servicing unless you are qualified to do so. Refer to all safety summaries prior to performing service. Copyright E Tektronix, Inc. All rights reserved. Licensed software products are owned by Tektronix or its suppliers and are protected by United States copyright laws and international treaty provisions. Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of the Rights in Technical Data and Computer Software clause at DFARS 252.227-7013, or subparagraphs (c)(1) and (2) of the Commercial Computer Software – Restricted Rights clause at FAR 52.227-19, as applicable. Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes that in all previously published material. Specifications and price change privileges reserved. Printed in the U.S.A. Tektronix, Inc., P.O. Box 1000, Wilsonville, OR 97070–1000 TEKTRONIX and TEK are registered trademarks of Tektronix, Inc. SOFTWARE WARRANTY Tektronix warrants that the media on which this software product is furnished and the encoding of the programs on the media will be free from defects in materials and workmanship for a period of three (3) months from the date of shipment. If a medium or encoding proves defective during the warranty period, Tektronix will provide a replacement in exchange for the defective medium. -
A Self-Optimizing Embedded Microprocessor Using a Loop Table
A Self-Optimizing Embedded Microprocessor using a Loop Table for Low Power Frank Vahid* and Ann Gordon-Ross Department of Computer Science and Engineering University of California, Riverside http://www.cs.ucr.edu/~vahid {vahid/ann}@cs.ucr.edu *Also with the Center for Embedded Computer Systems at UC Irvine. ABSTRACT additional transistor capacity is to reduce power in a mass- We describe an approach for a microprocessor to tune itself to its produced embedded microprocessor by, adding tunable fixed application to reduce power in an embedded system. We components to the architecture, and extra circuitry that tunes those define a basic architecture and methodology supporting a components to the particular fixed application. Essentially, the microprocessor self-optimizing mode. We also introduce a loop microprocessor is self-optimizing. A designer using such a part table as a tunable component, although self-optimization can be gets reduced power through some customization while still getting done for other tunable components too. We highlight the benefits of a mass-produced IC. experimental results illustrating good power reductions with no In this paper, we describe a basic architecture and methodology performance penalty. for a self-optimizing microprocessor that tunes itself to an application to reduce power. Such a microprocessor represents an Keywords instance of post-fabrication tuning [16], namely tuning done after System-on-a-chip, self-optimizing architecture, embedded an IC has been fabricated. We introduce self-profiling circuitry systems, parameterized architectures, cores, low-power, tuning, and a designer-controlled self-optimization mode, in which platforms. configurable architectural components would be tuned based on an application’s profile. -
The ZEN of BDM
The ZEN of BDM Craig A. Haller Macraigor Systems Inc. This document may be freely disseminated, electronically or in print, provided its total content is maintained, including the original copyright notice. Introduction You may wonder, why The ZEN of BDM? Easy, BDM (Background Debug Mode) is different from other types of debugging in both implementation and in approach. Once you have a full understanding of how this type of debugging works, the spirit behind it if you will, you can make the most of it. Before we go any further, a note on terminology. “BDM” is Motorola’s term for a method of debugging. It also refers to a hardware port on their microcontroller chips, the “BDM port”. Other chips and other manufacturers use a JTAG port (IBM), a OnCE port (Motorola), an MPSD port (Texas Instruments), etc. (more on these later). The type of debugging we will be discussing is sometimes known as “BDM debugging” even though it may use a JTAG port! For clarity, I will refer to it as “on-chip debugging” or OCD. This will include all the various methods of using resources on the chip that are put there to enable complete software debug and aid in hardware debug. This includes processors from IBM, TI, Analog Devices, Motorola, and others. This paper is an overview of OCD debugging, what it is, and how to use it most effectively. A certain familiarity with debugging is assumed, but novice through expert in microprocessor/microcontroller design and debug will gain much from its reading. Throughout this paper I will try to be as specific as possible when it relates to how different chips implement this type of debugging.