United States Patent [191 [11] 4,344,075 Rudy [45] Aug. 10, 1982

[54] TIMING CIRCUIT FOR THE DIGITAL [56] References Cited GENERATION OF COMPOSITE LUMINANCE AND VIDEO U'S' PATENT DOCUMENTS SIGNAL FOR NQNJNTERLACED 3,422,223 1/1969 Scipione ...... ' ...... 358/152 _ 3,944,993 3/ 1976 Dalke et a1. 340/703 RASTER 3,944,997 3/ 1976 Swallow ...... 340/703 4,136,359 1/1979 Wozniak .... ,. 358/17 4,150,364 4/1979 Baltzer ...... 340/703 [75] Inventor: John E. Rudy, Lancaster, Pa. 4,247,865 1/1981 Mastronardi ...... 358/ 17 Primary Examiner-Marshall M. Curtis [73] Assignee: RCA Corporation, New York, NY. Attorney, Agent, or Firm—-Samuel Cohen; Joseph S. Tripoli; George J. Seligsohn [21] Appl. No.: 181,984 [57] ABSTRACT _ Ragged vertical edges normally displayed by a NTSC [22] Flledi Aug- 28’ 1980 color-carrier on a non-interlaced display are effectively eliminated through persistence of vision by altering the [51] Int. Cl.3 ...... ‘ ...... G09G 1/28 duration of a selected single scan-line of the non-display [52] US. Cl...... 340/703; 340/814; portion of each of successive ?elds by an odd number of 358/ 152 half-cycles of the NTSC color-carrier frequency. [58] Field of Search ...... 340/703, 814, 798; 358/ 152, 17 11 Claims, 4 Drawing Figures

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0M MASTER 2 "fcc “New _*i2__ @__.._Sv— Figja 4,344,075 1 2 this chosen scan-line frequency. As it turns out, this odd TIMING CIRCUIT FOR THE DIGITAL harmonic is 455 and the closest scan-line frequency, GENERATION OF COMPOSITE LUMINANCE itself is substantially 15,734 scan lines per second. In AND CHROMINANCE VIDEO SIGNAL FOR addition, in accordance with NTSC standards, scan NON-INTERLACED TELEVISION RASTER 5 lines are oriented substantially in the horizontal direc SCAN-LINE PATTERN tion. In principle, however, the orientation direction of the scan lines is immaterial. This invention relates to a system for digitally gener There are certain bene?ts to be gained by employing ating a composite luminance and chrominance video a non~interlaced television raster scan-line pattern for signal for display on a display device that exhibits a the display of a digitally-generated video signal in a non-interlaced television raster scan-line pattern and, video terminal. First, it simpli?es somewhat the design more particularly, to timing circuitry therefor. of the video terminal. Second, and more important, the The term “television raster scan-line pattern,” as used use of an interlaced television raster scan-line pattern, to herein, is generic to the type of visual display of a two display a stationary image of a message comprised of dimensional picture that is produced by a single modu character patterns, exhibits a perceptible amount of lated ?ying spot, during each of repetitive frames, tra ?icker. This ?icker is eliminated by employing a non versing each of a plurality of substantially parallel scan interlaced television raster scan-line pattern. However, lines. The single ?ying spot may take various forms. By the use of a non-interlaced television raster scan-line way of examples, it may take the form of one or more pattern with a color monitor or designed scanning electron beams impinging on the phosphor 20 to operate in accordance with NTSC standards creates screen of a monochrome or a shadow-mask color CRT a problem. First, a non-interlaced television raster scan or, alternatively, it may comprise one or more beams of line pattern requires that each ?eld be comprised of a light. Furthermore, the order in which the scan lines of whole number of scan lines. Employing 263 scan lines a frame are scanned by the single ?ying spot is of no per ?eld, rather than 262.5, is no good because it is signi?cance. A raster scan-line pattern frame may be 25 comprised of a single non-interlaced ?eld, two inter dif?cult to hold vertical sync in the television set or laced ?elds (as in NTSC television), three interlaced monitor with even this slightly lower ?eld frequency. ?elds, etc. Therefore, it is necessary to reduce the number of scan Video terminals for digitally generating a video sig lines per ?eld from 262.5 to 262, which is an even whole nal for use in displaying a message comprised of a plu number. In this case, the color carrier varies in phase rality of character patterns on a display device that between successive scan lines by 180°.This results in exhibits a television raster scan-line pattern are known ragged vertical edges in the color display of message in the art. An example of such a video terminal is dis character patterns. One solution to this problem, dis closed in U.S. Pat. No. 3,345,458. In such a video termi closed in U.S. Pat. No. 4,136,359, is to delay the begin nal, each character pattern (which may be an alphanu 35 ning of each scan line by an odd number of half-cycles meric symbol, a graphic symbol, etc.) is displayed in dot of the color-carrier frequency. Although this prior art matrix form within a two-dimensional character space. solution overcomes the problem of vertical ragged A ?rst dimension of each character space comprises a edges, it has been found that, as a side effect, it intro ?rst assigned number of dots oriented along a scan line duces a new problem of adding spurious color into and a second dimension of a character space comprises 40 those characters that are intended to be displayed as a second assigned number of consecutive scan lines. The white. The present invention is directed to a novel solu digitally-generated video signal may be solely a lumi tion to the problem of ragged vertical edges which does nance video signal for display of the character patterns not introduce as a side effect the above or other prob of the message in black-and-white or, alternatively, it lems. may be a signal de?ning both lumi 45 Brie?y, in accordance with the principles of the pres nance and chrominance information for displaying the ent invention, timing control means are provided which character patterns of the message in color. In the latter are operative only during a selected single scan line of a case, the foreground and/or the background of each non-display portion of each successive ?eld of a given character pattern is conventionally displayable in a non-interlaced television raster scan-line pattern. Such selected one of eight different colors. These eight differ 50 timing control means alters the occurrence of the dis ent colors (i.e., black, red, blue, green, magenta, cyan, play portion of the next successive ?eld by an amount yellow and white) may be digitally represented by a substantially equal to a given odd number of half-cycles three-bit digital code. of the color-carrier frequency. This results in the rag Although not limited thereto, it is often desirable that ged edges of the second of any two successive ?elds the display device for the digitally-generated video being 180° out-of-phase with the corresponding ragged signal be a standard monochrome or edges of the ?rst of the two successive ?elds. Since the monitor or television set, as the case may be. In the ?eld frequency is suf?ciently high (approximately 60 United States, such standard television monitors and Hz in NTSC systems), integration of the 180° out-of television sets are designed in accordance with NTSC phase ragged edges of successive ?elds, due to persist standards. These standards comprise a frame of 525 60 ance of vision of the viewer, effectively overcomes the lines consisting of two interlaced ?elds of 262.5 lines problem of ragged edges. each. In the case of monochrome, the NTSC scan-line In the drawings: frequency is 15,750 scan-lines per second. However, in FIG. 1 is a functional block diagram of a typical the case of color, which employs a precise NTSC refer system for digitally generating a composite video signal ence color carrier frequency of 3.579545 megahertz 65 de?ning luminance and chrominance information that is (MHz), the scan-line frequency is chosen at the closest to be displayed in color on a color display device that at value to 15,570 scan lines per second for which the a ?eld frequency exhibits successive ?elds of a given color carrier frequency is an odd harmonic of one-half non-interlaced television raster scan-line pattern; 4,344,075 3 4 FIG. 1a illustrates a modi?cation of the system series of successively-occurring dots corresponding to shown in FIG. 1; the character width of the character then being read out FIG. 2 is a block diagram of an illustrative embodi from digital memory 100 during the then-occurring ment of the timing circuitry of the system shown in scan line. Such a series of dots for each successive mes FIG. 1, which timing circuitry incorporates the present sage character of a row comprises the luminance output invention; from video bit stream derivation means 104. FIG. 2a illustrates a modi?cation of the embodiment Video bit stream derivation means 104 also includes a shown in FIG. 2. color modulator which modulates the color carrier fcc The system shown in FIG. 1 derives a composite to produce an appropriate chrominance signal as deter video signal for displaying in color a message composed mined by the color portion of the digitally-coded infor of character patterns in dot matrix form on a display mation for the character then being read out from digi device that exhibits a television raster scan-line pattern. tal memory 100. This color portion of the digitally The message information is originally stored in digital coded information for the character may also be used to ly-coded form in digital memory 100. Timing circuitry adjust the luminance level, which also determines the for a non-interlaced television raster scan-line pattern resultant color. In any case, the modulated carrier fre 102 derives seven timing signals. These seven timing quency comprises the chrominance output of video bit signals comprise a color-carrier frequency signal fcc, a stream derivation means 104. For illustrative purposes, horizontal sync signal H, a vertical sync signal V, a it is assumed that the color modulator of video bit character address signal, a row scan-line count, a char stream derivation means 104 together with the H and V acter dot frequency signal fp, and a character repetition 20 sync signals from timing circuitry 102 are combined in frequency signal fcH. The H, V, fcH, fD, fcc, the char mixer 106 into a composite video signal for color dis acter address signal and the scan~line count timing sig play. This composite video signal may be applied di nals all occur in substantially time-synchronous rela rectly to the video input of a monitor or, alternatively, tionship with respect to each other. The duration of a it may be up-converted to a television channel carrier period of fcH is substantially equal to the scanning time 25 frequency by an RF modulator and then applied to the in the scan-line direction (e.g., the horizontal direction) terminals of a conventional color television set through one character width. Each character width (assuming that the chrominance signal is, in fact, an comprises a ?rst assigned number of dots and a count of NTSC signal). In the latter case, the color carrier fre fb indicates the ordinal position within any character quency fcc is often known as the color subcarrier, in width‘ of a dot then being scanned through. In a direc 30 order to distinguish it from the RF carrier. As used tion orthogonal to the scan-line direction (e.g., the ver herein, the term “color-carrier frequency” is synono tical direction), a row of characters is comprised of a mous with the term “color subcarrier frequency”. second assigned number of scan lines. A row scan-line In some cases the H and V sync signals are not mixed count indicates the original position within a row of the with the video signal. Instead, the H sync signal is ap scan line then being scanned. 35 plied directly to the horizontal de?ection circuitry of "Digital memory 100, at the character repetition rate the display device and the V sync signal is applied di fcH, reads out a multi-bit word of digitally-coded infor rectly to the vertical de?ection of the circuitry of the mation selected by the character address signal which display device. FIG. 1a shows a modi?cation of FIG. 1 de?nes the character to be displayed. One portion of in which this is the case. The chrominance and lumi this digitally coded information may be, for example, a 40 nance output from video bit stream derivation means 6 or 7 bit ASCII code which identi?es the particular are combined in mixer 106a to provide a composite character then being read out from an alphabet of 64 video, but the H and V sync signals from timing cir (26) or 128 (27) different characters, as the case may be. cuitry 102 are not applied to mixer 106m The term Another portion of the digitally coded information may “composite video”, as used herein, is generic to the be a three-bit code that speci?es the particular fore 45 arrangements shown in both FIGS. 1 and 1a. ground color of the character beam then being read out An embodiment of timing circuitry 102 which incor from a group of eight different colors, as discussed porates an embodiment of the present invention is above. If desired, the digitally-coded information also shown in FIG. 2. Referring to FIG. 2, the circuitry 102 may include another three-bit code specifying a particu includes master oscillator 200 for deriving clock signals lar background color of the character then being read 50 having a frequency substantially equal to Zn times the out. Further, the digitally-coded information may in color-carrier frequency fcc, where n is positive integer. clude additional bits for selecting other attributes of the The clock signals from master oscillator 200 are applied character then being read out, as known in the art. as respective inputs to color-carrier divider 202, pro In any case, the digitally-coded information output grammable scan-line counter 204 and horizontal (H) from digital memory 100 is applied at the character 55 sync generator 206. An output from programmable repetition rate fcH as an input to video bit stream deriva scan-line counter 204 is also applied as an input to H tion means 104. The character dot frequency fD scan sync generator 206. The output from H sync generator line count and the color-carrier fcc are also applied as 206, which externally constitutes the H sync output inputs to video bit stream derivation means 104. from timing circuitry 102, is also applied internally as ‘Video bit stream derivation means 104 includes digi respective inputs to ?eld counter 208, keyed dot oscilla tal translation means responsive to the characterportion tor 210, luminance timing means 212 and program con (ASCII code) of the digitally coded information, the trol means 214. A ?rst output V from ?eld counter 208, scan-line count and the character dot frequency for which externally constitutes the vertical (V) sync out deriving the luninance output thereof. As known in the put from timing circuitry 102, is also applied internally art, such digital translation means may comprise a char 65 as the second input to luminance timing means 212. A acter generator read-only-memory (ROM) together second output S from ?eld counter 208 is internally with a shift register clocked by f]; operating as a paral applied as a second input to program control means 214. lel-to-serial converter for deriving in dot matrix form a The output from program control means 214 is applied 4,344,075 5 6 as a program control input to programmable scan-line H sync generator 206 includes a coincidence gate counter 204. The output from keyed dot oscillator 210 responsive to the presence of both a clock signal and an which externally constitutes the fD output from timing output from programmable scan-line counter 204. This circuitry 102 is also applied internally as a third input to results in the H sync output from generator 206 com luminance timing means 212. prising a third timing signal which occurs in time syn Color-carrier divider 202 divides the clock signal chronous relationship with the clock signals. input thereto by 2n to provide a color-carrier frequency In the embodiment shown in FIG. 2, keyed dot oscil signal fcc as a ?rst timing signal occurring in time syn lator 210 generates dot timing signals at a frequency fD. chronous relationship with the clock signals. Frequency fl) is relatively low compared to the color A ?eld consists of F successive scan lines. Field carrier frequency fcc. However, it is high relative to counter 208, in response to F successive H sync signals the character repetition frequency fcH (which, in turn, applied as an input thereto, derives, as a second timing is high relative to the scan-line frequency). Because dot signal, its V sync signal output. Thus, the V sync signal frequency fl) is not derived from the clock signals pro recurs at the ?eld frequency. duced by master oscillator 200, but is independently In accordance with the principles of the present in generated by keyed dot oscillator 210, it is necessary to vention, F is a predetermined even whole number. Fur provide external timing synchronization between dot ther, a message is displayed only during a display por tion of each ?eld, which display portion comprises an oscillator 210 and a timing signal derived from the clock ordinal subset of certain consecutive scan lines of the set signals. This is accomplished by momentarily keying of F scan lines of the ?eld. A subset comprising the dot oscillator 210 off in response to each H sync signal. remainder of the scan lines of each ?eld constitutes a Luminance timing means 212, in response to the dot non-display portion of that ?eld. During the non-dis frequency signal fly, the vertical sync signal V and the play portion of a ?eld, which includes the vertical fly— horizontal sync signal H, all applied as inputs thereto, back time and may also include upper and lower mar derives the character address signal and the far; and the gins for the displayed message, the luminance signal 25 scan-line count outputs from timing circuitry 102. Spe will contain no character dot information, as is known ci?cally, fcH is derived by frequency dividing the dot in the art. In response to a selected single scan line of the clock frequency fD by the assigned number of dots in a non-display portion of each ?eld being counted by ?eld character width and is restricted to occur only during counter 208, ?eld counter 208 derives its second output the times when character information is to be displayed. S. 30 The character address signal is derived from a counter Program control means 214, which may be a ?ip-?op, initialized by V sync and is clocked by a separate signal is set at the beginning of the selected single scan line of which mirrors fail but is phase-displaced, leading the‘ each ?eld in response to the leading edge of output S fa}; output of luminance timing means 212 by one or‘ from ?eld counter 208 being applied thereto. At the end more dot periods. The scan-line count may be derived of the selected single scan-line of each ?eld, program 35 by a cyclical counter within luminance timing means control means 214 is reset by the application thereto of 212 having a count capacity equal to the number of scan an H sync signal. Program control means 214, in its lines in a displayed character row. This cyclic counter reset state, maintains programmable scan-line counter counts the number of H sync signals applied as an input 204 in a ?rst programmed condition thereof and in its thereto. Luminance timing means 212 for use in a video set state maintains programmable scan-line counter 204 40 terminal are known in the art. in a second programmed condition thereof. Thus, pro In the following discussion of the operation of the grammable scan-line 204 is maintained in its second embodiment shown in FIG. 2, it is assumed that NTSC programmed condition only in response to ?eld counter standards apply and it is further assumed that the value 208 registering that particular count which corresponds of n is 1. This latter assumption makes it possible to to the selected single scan line and is maintained in its 45 operate master oscillator 200 at its lowest permissable ?rst programmed condition in response to the ?eld frequency of twice the color-carrier frequency signal counter registering a count other than that particular fcc. Based on the foregoing assumptions, master oscilla count. tor 200 produces clock signals at a nominal frequency of In its ?rst programmed condition, programmable 7.15909 MHz, which is twice the NTSC color-carrier scan-line counter 204 produces an output signal in re 50 frequencies standard of 3.579545 MHz. In this case, sponse to counting n times a ?rst given odd number of programmable scan-line counter 204 may comprise a clock signals applied as an input thereto. Therefore, in non-programmable divide-by-seven counter cascaded, its ?rst programmed condition, programmable scan-line with a programmable counter which is a divide-by-si». counter derives a scan-line frequency such that the ty-?ve counter in its ?rst programmed condition and is color-carrier frequency fcc is a certain (i.e., ?rst given a divide-by-sixty-four counter in its second pro number) odd harmonic of one-half the scan-line fre grammed condition. Thus, its ?rst programmed condi quency. tion, programmable scan-line counter 204 divides the Programmable scan-line counter 204, in its second clock signal input frequency thereto of 7.14909 MHz by programmed condition, derives an output therefrom in 455 to provide the proper NTSC scan-line frequency of response to counting a second given number of clock 60 substantially 15,734 Hz. However, in its second pro signals applied as an input thereto, which second given grammed condition, programmable scan-line counter number differs from the aforesaid ?rst given odd num divides the clock signal input frequency thereto of ber by n times a third given odd number. Therefore, the 7.15909 MHz by 448, rather than 455. The effect thereof duration of a scan-line period with programmable scan is to decrease the period of a scan-line by seven periods of line counter 204 in its second programmed condition 65 the clock signal (i.e., 7 half-cycles of the color-carrier differs from that in its ?rst programmed condition by an frequency signal fcc) with respect to the period of a odd number of half-cycles of the color-carrier fre scan-line in the ?rst programmed condition of program quency signal fcc. mable scan-line counter 204. 4,344,075 7 8 If the predetermined even whole number F of scan the remainder of the scan lines of each ?eld constitutes lines comprising a ?eld is assumed to be 262 (the prede a non-display portion of that ?eld, and wherein said termined even whole number closest to the NTSC stan composite video signal includes a speci?ed color-carrier dard of 262.5 scan lines ?eld) and the selected single frequency that is substantially equal in value to one-half scan-line is assumed to be line 229 (situated within the a certain odd harmonic of that scan-line frequency non-display portion of a ?eld), line 229 will be com which exists during the entire display portion of that posed of only 448 cycles of the 7.15909 MHz clock ?eld, the improvement wherein said generating means signals (or 448 half-cycles of the NTSC color-carrier comprises: . frequency of 3.579545 MHz), while the remaining 261 timing control means operative only during a selected lines of a ?eld will be comprised of 455 cycles of the O single scan line of the non-display portion of each 7.15909 MHz clock signals (or 455 half-cycles of the ?eld for altering the beginning of the display por NTSC color-carrier frequency). The effect is to alter tion of the next successive ?eld by an amount sub (i.e., reduce) the relatively long ?eld period (nominally stantially equal to a given odd number of half about 60 Hz) by substantially exactly 7 half-cycles of cycles of said speci?ed color-carrier frequency. the relatively high color-carrier frequency signal 2. The system de?ned in claim 1, wherein said prede (3.579545 MHz). This insures that the respective color termined whole number is 262 and said speci?ed color carrier frequency components of corresponding ones of carrier frequency is the NTSC standard of nominally the non-interlaced scan lines of successive ?eld will be 180° out-of-phase with each other (thereby integrating 3.579545 megahertz. 3. The system de?ned in claim 1, wherein said system out through persistence of vision of a viewer any rag 20 ged vertical edges or color decoder error present in the comprises timing circuitry including clock means for viewed display.) producing clock signals at a master frequency substan The present invention can be incorporated in a sys tially equal to 2n times said color-carrier frequency, tem which is designed to operate with a standard televi wherein n is a preselected positive integer, and fre sion set as the display device. A standard television set quency divider means coupled to said clock means for has a limited video bandwidth. In order to display a deriving ?rst, second and third timing signals in time relatively high density of characters, the dot frequency synchronous relationship with said clock signals, said f1) should be relatively high, but still well within the ?rst timing signal occurring periodically at the end of video bandwidth of a television set. Furthermore, the each period of said color-carrier frequency, said second dot frequency should not produce a noticeable beat timing signal occurring periodically at the end of each frequency with the color-carrier frequency. When n has period of said ?eld frequency and said third timing a value of 1, so that the clock signals have a frequency occurring at the end of each scan line of a ?eld, and of only twice the color-carrier frequency, there is no wherein said frequency divider means includes said sub-harmonic of the clock frequency that meets all of timing control means. these constraints. Therefore, in the arrangement shown 35 4. The system de?ned in claim 3, wherein the value of in FIG. 2, it is necessary to employ an independent dot n is one. oscillator for generating the dot frequency fp. How 5. The system de?ned in claim 3, wherein said timing ever, it is also essential that the dot frequency occur in control means includes a ?eld counter for producing time synchronous relationship with the H sync signals, said second timing signal in response to said ?eld which H sync signals are derived from the clock signals. 40 counter having counted a series of successive input For this reason, in FIG. 2, dot oscillator 210 is a keyed signals thereto equal in number to said predetermined dot oscillator which is momentarily keyed off by the H even whole number, a programmable scan-line counter sync signal at the end of each scan line. for producing a third timing signal in response to said FIG. 2a illustrates a modification of the embodiment scan-line counter (l) in a ?rst programmed condition shown in FIG. 2, in which it is assumed that n is a plural 45 thereof having counted a series of successive input sig integer (and, preferably, a relatively large plural inte nals thereto equal in number to n times said certain odd ger). In this case, it is possible to derive a dot frequency harmonic and (2) in a second programmed condition fb that is a speci?ed sub-multiple k of the clock signal thereof having counted a series of successive input sig frequency 2nfcc, and still meet all the constraints dis nals thereto equal to a number which differs from n cussed above. Thus, as shown in FIG. 2a, the dot fre times said certain odd harmonic by said given odd num quency fp (which is applied as an input to luminance ber of half-cycles of said color-carrier frequency, ?rst timing means 212) is derived from the clock signals coupling means for applying said clock signals as input from master oscillator 200 by means of dot frequency divider 300. As indicated in FIG. 2a, dot frequency signals to said scan-line counter, second coupling means divider 300 divides the clock signal frequency by k (so for applying said third timing signals as input signals to that k times the dot frequency fD is equal to the clock said ?eld counter, and program control means coupled signal frequency 2nfcc. between said ?eld counter and said scan-line counter for What is claimed is: maintaining said scan-line counter in said second pro 1. In a system incorporating generating means for grammed condition only in response to said ?eld digitally generating a composite video signal de?ning counter registering that particular count which corre luminance and chrominance information that is to be sponds to said selected single scan line of a ?eld and for displayed in color on a color display device that at a maintaining said scan-line counter in its ?rst pro ?eld frequency exhibits successive ?elds of a given grammed condition in response to said ?eld counter non-interlaced television raster scan-line pattern, registering a count other than said particular count. wherein each ?eld is composed of a predetermined even 65 6. The system de?ned in claim 5 wherein said prede whole number of scan lines of which an ordinal subset termined whole number is 262, said speci?ed color-car of certain consecutive scan lines of each ?eld comprises rier frequency is the NTSC standard of nominally a display portion of that ?eld and a subset comprising 3.579545 megahertz, and said odd harmonic is 455n. 4,344,075 10 7. The system de?ned in claim 6, wherein the value of counter having counted a series of successive input n is one and said given odd number of half-cycles of said signals thereto equal in number to said predetermined color-carrier frequency is seven. even whole number, a programmable scan-line counter 8. The system de?ned in claim 7, wherein said scan for producing a third timing signal in response to said line counter is comprised of a non-programmable scan-line counter (l) in a ?rst programmed condition counter cascaded with a programmable counter, said thereof having counted a series of successive input sig non-programmable counter being a divide-by-seven nals thereto equal in number to n times said certain odd counter and said programmable counter being a divide harmonic and (2) in a second programmed condition by-sixty-?ve in said ?rst programmed condition thereof thereof having counted a series of successive input sig and a divide-bysixty-four is said second programmed nals thereto equal to a number which differs from n condition thereof. times said certain odd harmonic by said given odd num 9. The system de?ned in claim 3, wherein said com ber of half-cycles of said speci?ed color-carrier fre posite video signal de?nes character information that is quency, ?rst coupling means for applying said clock to be displayed in dot matrix form within each of two signals as input signals to said scan-line counter, second dimensional character spaces, each character space coupling means for applying said third timing signals as having a ?rst-dimension size along a scan-line equal to a input signals to said ?eld counter, and program control ?rst assigned number of successive dot periods and a means coupled between said ?eld counter and said scan second-dimension size substantially orthogonal to a line counter for maintaining said scan-line counter in scan-line equal to a second assigned number of succes said second programmed condition only in response to sive scan-lines, wherein said timing circuitry includes said ?eld counter registering that particular count means for deriving dot-timing signals having a given which corresponds to said selected single scan-line of a dot period, ?rst-dimension character counting means ?eld and for maintaining said scan-line counter in its responsive to said dot-timing signals applied thereto for ?rst programmed condition in response to said ?eld deriving a ?rst-dimension character timing signal hav counter registering a count other than said particular ing a period substantially equal to said ?rst assigned count. number of successive dot periods and second-dimension 11. The system de?ned in claim 9, wherein said means character counting means responsive to said third tim for deriving dot-timing signals includes a keyed dot ing signals applied thereto for deriving a second-dimen oscillator generating dot-timing signals having a period sion character timing signal having a period substan greater than half of that of said color-carrier frequency tially equal to said second assigned number of succes and many times smaller than that of a scan-line, and sive third timing signals. _ means for applying said third timing signals as a keying 10. The system de?ned in claim 9, wherein said tim input to said dot oscillator to momentarily key off said ing control means includes a ?eld counter for producing dot oscillator at the end of each scan-line. said second timing signal in response to said ?eld ill Ill II‘ III 1|‘ 35

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