the Club Of Microprocessor Programmers, Users, and Technical Experts Georgia Marszalek, Editor· David Graves, Editor
Sponsored by National Semiconductor Corp., Santa Clara, Ca. 95051 Vol. 2, No.8, August, 1976
16 BIT COMPUTER KIT A HIGH LEVEL EVALUATION by John Snell LANGUAGE FOR IMP-16 Reprinted with permission: People's Computer Company, P.O. Box 310, Menlo Park, CA 94025. July 17 Vol 5 No.1. SM/PL (Smart or Simple Programming Language), a high level language for the IMP-16 Microprocessor, will be made available to COMPUTE members as part of the User Library. As such, it is not supported by National Semiconductor. SM/PL requires 16K of read/write memory, and can be used with the IMp·16 Disc Operating System. It accepts source statements generated by using ED IT16 and will product a listing of the assembly code generated or an object program. The compiler includes a number of features such as access to the IMp·16 machine facilities, linkage to assembly language routines and various compiler control statements for source listing, interlisting of assembly and object code, and symbol table dumps. A list of some of the language features is shown below.
SM/PL LANGUAGE FEATURES Data Types: BYTE - 8 bits WORD - 16 bits, used for addresses or data Arithmetic and Logical Operators: + Addition NOT Logical complementation Subtraction AND Logical product I recently put together a Pacer 3H microcomputer development * Multiplication OR Logical sum ~ystem kit, made by Project Support Engineering. It has by far / Division XOR Logical exclusive or the easiest to use operational and debug functions of any MOD Modulo computer kit that I have used. It has a NOVUS type (no Relational Operators: tactile feedback) calculator keyboard built into the front panel. Less than = Less than or equal to When you want to deposit a number such as 7532, you hit the < < Greater than = Greater than or equal to 7,5,3,2 keys on the keyboard instead of binary switches > > Equal to Not equal to 1,1,1,1,0,1,0,1,1,0,1,0. The Pacer uses the hexadecimal < > Assignment Statements; number system for keyboard input and display. If you do not Simple assignment Imbedded assignment know hexadecimal, the keyboard will convert from decimal to e.g., A = B e.g., A + (B:=+1 )-C hexadecimal as well as perform hexadecimal arithmetic. Addresses are displayed to the left and data contents to the Compound Statement: right in alphanumeric LED's. Using the keyboard you may A set of sequentially executed statements, treated as a unit, examine and/or modify not only memory locations but also: e.g., DO;A = 1, B.= C + 0*3; END;
• 4 accumulators X 16 bits, IF-THEN-FALSE Statement: • a 16 bit program counter, Selects alternative paths of execution depending on a condi • a 16 bit status register, tional test. Programmer defined flags, condition code settings, • a 10 word X 16 bit stack, comparisons, logical operator40, and arithmetic operations may be involved in the test. As with other control statements, ~ a 16 bit value register used for scanning memory to find the address at which a value is located, IF·THEN·ELSE statements may be nested. • a 16 bit mask (for use if you are not certain about some of DO CASE Statement: the bits or digits in the value), Selects a single statement to be executed from a list of state • and 10 break point registers, 16 bits each. ments, according to the value of a computed index. (Continued on page 10) (Continued on page 11) Input 3 SP C/O (microswitch) input or direct. "'hy you need Input 4 SP C/O (microswitch) input or direct. Input 5 Active low. r;;MICROBOARDS" Input 6 Active low. Inputs 2 through 5 are all interrupt inputs. --. Complete microprocessor system at minimal cost Note: Any of inputs 1 through 4 can be either a single active • Pre-assembled and tested hardware low input or a single pole changeover by simply changing a • 12V CMOS buffers on ALL Inputs AND Outputs providing wire link on the board. excellent noise immunity • Driver boards available to connect directly to motors, OUTPUTS: AII12V CMOS levels. solenoids, lamps, etc., both AC and DC Data Bus: 8-bit active high outputs. CMOS buffered directly • Software and hardware relationships designed for maximum from system data bus. utility Serial Out: Single active high output from SC/MP SOUT pin. • New European standard board size Decoder: 16 alternate directly addressable latched outputs. Why waste your capital developing your own microprocessor By the simple changing of a wire link on the board, system when you can use the versatile 'MICROBOARD' these 16 outputs become strobe outputs for the 8-bit system. Already proven in hundreds of hours trouble-free latches on the optional driver boards. service, this system could get your new product into the Compatible driver boards provide up to 120 parallel market place way ahead of your competitors who are still outputs with master reset facility. struggling to learn the art of designing, building and debugging their own microprocessor systems. Memory: 256 bytes (8-bits) Random Access Memory. 4 PROM sockets for MM5204Q programmable UV Micropower Ltd. will give you all the assistance you need to erasable 512 X ~-bit memories. Providing a total help you get 'MICROBOARDS' working in your application. program capacity of 2048 bytes. If you do not wish to write your own program we will discuss your requirements and supply sets of ready programmed Interrupt: Four levels of interrupt are directly accessible as PROMs to plug in for immediate use. inputs without the need for additional decoding or hardware interrogation circuitry. Specification (MPU Board): Additional Features: Power-up or manual reset-single cycle Data Bus: 8-bit Tri-State data inputs. Active low. facility. Inputs expandable. Serial In: Single active low input to SC/MP SIN pin. Power Supply Requirements: +5V 150mA Multiplexed: Input 1 SP C/O (microswitch) input or direct. -7V 60mA (See note.) +12V 20mA Input 2 SP C/O (microswitch) input or direct. -12V 100mA
MICROBOARDS-with SC/MP MICROPROCESSOR The versatile, intelligent control system
Let 'MICRO BOARDS' with SC/MP work for you.
256 Bytes RAM SC/MP 2048 Bytes Microprocessor PROM Buffers &
Alterable links change functions
Single & serial inputs Vectored interrupt
2 COMPUTE Newsletter' Vol. 2, No.8 Physical Characteristics: Epoxy glass Printed Circuit Board, H .11. I". A "MP DATA 51 .IIC 151. A "SR EOR size Eurocard 'large' 233.4mm X 52 .. 2D 094. A ST R2.POS 5~ ..1& CIU A I.D R'.POS 160mm. 54 ..ar 9D43 A SKG RI.DlD Two single sided 40-way gold plated 55 .. a 19E1 A "MP DATAS 56 .831 5 ... A 1.1 RI•• edge connector pads on 2.54mm 57 .831 DI46 A ST R•• POS (0.1") pitch. 51 .. 33 5 ..2 A 1.1 RI.2 UND RECORD 59 .. 34 9545 A "SR 'PUTC Boards supplied with all components 68 .835 5." A 1.1 RI •• " fully assembled and tested, including 61 .836 9543 A "SR 'PUTC 6 ••831 HU A 1.1 R•• 4 SC/MP, but less PROMs. 63 ..3. 9541 A "SR 'PUTC 64 .839 ca31: A 1.0 R•• CHK Obtainable from: 65 ..:sA EIU A ADD R•• START 66 .83. 953F A "SR 'PUT.C N SIGN COMPONENTS LTD. 61 .. 3C 5112 A 1.1 RI. I P.O. Box 119, Reading, Berks. RG3 1 NO. Great Britain 61 .83D IH .. A "SR NULl. " .. 3E CU" A I.D RI.START Tel: Reading 594911/2/3/4 Telex: 849391 , ...3F 953B A "SR 'PUTIC 11 •• 4. 5 .. 2 A 1.1 RI.I 71 ••41 15•• A "SR NUI.I. MICROPOWER LIMITED, 73 .141 ca35 A I.D RI.CHK 14.1439531 A "SR 'PUT2C P.O. Box 39, Reading, Berks. RG3 60F.Great Britain 15 "U 1583 A "SIl EOIl Tel: Reading 21437 76 1145 5132 A 1.1 RI.5. n .... IH6 A "5R NUI.I. , ...41 .... A HAloT 19 .84. calE A EOR! I.D R•• CR •••149 9531 A "SR ,punc ....4A 5 ... A 1.1 RI •• .1 ..4. 1511 A "SR 1fU1.1. 113 'UC .... A R7S NEW LIBRARY PROGRAM 14 .UD 5 ... A NUL1.! 1.1 R••• I5 ..U 951. A "SR 'PUTC 16 "U 19 .... A AISZ Ill. -I FOR PACE, SL0025A PALM 11 .IS. It.. c A "MP NU1.1. •••ISI .... A IlTS 19 .IS. C926 A CSUM! 1.0 Il2.POS The SL0025A PALM is a PACE program that can be used " ..53 S3F4 A 1.1 1l3.-11 tI ..54 ca24 A I.D RI.POS for dumping memory location onto paper tape in absolute 91 ..55 EI.. A ADD Il•• (RI) format. The paper tape can be loaded by ABSPT. This program 93 1.56 1A11 A AISZ RI.I 94 ..57 1111 A AISZ R3.1 will also dump itself. Source (PT): $5.00 95 II. It.. c A "MP CSUM·3 96 .. 59 9511 A "SR 'PUTIC ,., ..SA EIID A ADD R•• CHK PALM EXECUTION EXAMPLE 9 ••I5B DIIC A ST R•• CHK " .ISC .... A RTS TYPE IN THE RANGE OOOO:03FF I ...ISD 5384 A GET! 1.1 R3.4 ENTRY 0000 (Turn Punch On) III ..SE 95ID A "SR ICIECO III ..5,. AtlS A AND RI. MASK I 113 ..68 9015 A SKI R•• K39 1'4 .161 1"1 A "MP •• 1 UD PASS I 115 '.6. 1189 A AISZ 1l •• 9 I • TI T1.E PAloMo ' ..501.UTE 10M PUN CM ' 116 ..n A911 A AND 1l •• MASK I • TSECT 111 •• 6 ••". A SKI. Ill •••• .... II. U65 Stl. A ItXOIl 3 RI-. RI.RI .... 119 .166 ,.,.,. A AISZ 4 ... 1 Ill-I 1130 -I 5 ..12 Ill-I III •• 61 "F6 A "liP GET. I 6 ..83 113-3 III ...... A IlTS 1 .... 911C A PALM! .I5R IMESG II •••" 5459 A IIMGE. .ASCII 'TYPI IN THE lIMal ' ....1 .169 T .VORD RANa& .... IUS A 9 ...1 ISSA A .lSIl GET ••6. "49 A II ••83 0575 A ST RI.POS .." 4EI. A II ".4 9511 A "SR 'GEeO .I6D SU' A I. 1115 1551 A .lSR GET .16& 45 •• A 13 ••16 D56C A ST RI.DlD ••6,. 5141 A 14 ..., 9515 A .lSIl IIIEsa ..,. 4U1 A IS ...... n T .VOIlD STAll .871 451. A 16 .... ISS3 A .ISR GET 113.871 .... A .VORD 11 •••A Dsn A 5T RI.START 114 •• ,3 .... A DlDI .VOIlD • I ..... 5 ... A 1.1 R••• 115 ..,...... A MASK I .VORD •.,. " ...C DI68 A ST R•• CHK 116 .115 ..n A MASK .. .VOIlD .n 21 ...0 5131 A 1.1 1l1.5. 111 •• ,6 .. 39 A K39. .VORD 839 II ...E 1S3E A .ISR NU1.1. II ••871 .DlA A CIl. .VORD .DlA II ...,. 5 ..1 A 1.1 R•• I I" .87..... A CHKI .VORD 13 .... 9569 A "SR 'PUTC II•• 879 .... A POSI .VORD • RI~ III .I1A 1&4. A PUTC. .VOIID 87&44• ....5.. " n"561 A ~lR IP C I II .878 1I:ca A PUTICI .VORD .1&ca 26 .113 H.I A Iol 1l •• 1 113 ..,C 1E59 A GECO. • VOIID l1a9 11 .114 9565 A .ISR 'PUTC 1.4 .87D 1EA1 A 1115al .VORD ITEA1 U .. 115118 A 1.1 RI.S liS ..,E .... A START. .VOIlD 19 .... 1136 A .ISIl NUl.lo 116 .11,. 454& A STAll I • ASCII •·.TRY. ' 38 .. 11 113. A .ISR EOR •••• 5451 A - - 31 .... H.I A DATA51 1.1 R•• I .... 191. A 31 •• " 9568 A .ISR 'PUTC 111 ...... A .VORD 33 •• IA sa•• A 1.1 RI•••• IU .... .DlD •PAloII 34 .IIB 955E A "SR 'PUTC 35 ... C 511. A 1.1 R..... CHIC .11. T CR ..11 T CSUM .ISI T 36 .. ID 9SSC A 01 SIt 'PUTC DATA .811 T DATA5 II .. T DID .. 13 T 31 ... 1 1S33 A .ISR CSUM EOR T aEeO ••,C T lET .ISD T RI.I .... MASK I .115 T 38 .. I,. 5111 A 1.1 K39 .876 T MASK ,. T .. T 39 .11. I52C A 01511 N\J&.L MESG .87D T NILI. ..4D T PAloM ...... 111 ca57 A 1.0 RI.POS POS .119 T PUTaC .. ,. T PUTC .. ,A T 41 ••11 9555 A "SR 'PUTIC II. A III .... A III ••• 1 A ...113 5114 A 1.1 111.4 .. .. A RANGE T STAll T R3 ".3 " .11 .. 43 ..14 III. A 01511 NUl.l. START ..,E T .. U ..15 531C A 1.1 1130 II
U lilt 8UI : DATA. tB U:fU) If 0 DIIOIl loIN ES 41 .11. 9552 A "SIl 'PUTIC PD PASS 4 41 .." 1A11 A AISZ RI.I SOURCE CHECKSUM-,. ...A 49 ..IA ,.,., A AISZ 113.-1 OIJECT CHECKSUM-.14. COMPUTE Newsletter' Vol. 2. No.8 3 37 38 3' Conversational DEFINITIONS 41-. .2 0000 ~0iI2lD • tr IM:PEDT .3 Assembler -.OS .6 _7 by Ed Schoell .8 .ENDIr National Semiconductor, Australia ••5. 51 52 eee. 121"1210 .IF IMPCSM 53 1219BI DEVI CE 0BI This program can be used with the IMP-16 editor. PACE 5. 13BA PUNCHL el38A 55 "FBe START 0rB0 editor. IMP-16 CASM or PACE CASM. 56 1387 INERR 01387 57 101 C KB~ODE 121101 C 58 312102 SPUTC 002 TABTAPE overlays the card reader commands of ED IT 16 5. .ENDIF 60 with the TT command. This command punches a paper tape 61 and replaces tabs (control 1) with one tab character. This 62 3121121121 0000 .IF PAC EDT 63 feature saves tape and assembly time by eliminating the tab 6_ 65 character. It acts as a replacement for the PT command used 66 67 with EDIT 16. Source: $5.00 68 69 .ENOIF 70 71 72 121121121121 12112100 .IF PCASM rJ'SC CONUE'qSATIONAL ASSPIBLER 1/2/75 73 Sample output wilen TABTAB is used with 7_ tht c:onvers.a1io~1 auembler 75 KB 76 .TITLE 77 LI 0.5TEST } 78 AISZ 0. I Tape Program 79 .ENDIF JMP STAqT 80 .END START 81 82 83 LS .PAGE .TITLE 84 START: LI 0.5TEST } 85 11212B KBMOOE + OF AI S"?: o ~ 1 List Edit Buffer 86 1132B 5454 A .ASCI I 'TT' J;.j~ START 87 102C 1387 A .T.j,'ORD TABTAPE .END START 88 1387 INERR 8. 1387 892B A TABTAPE: LD 2".ATOUT TL 90 1388 A8Bl A ST 2 .. DEVI CE TURN PUNCH ON 91 138. 4CI2I121 A LI 0.0 92 138A AI27 A ST 0' .. FLAG TT 93 138B A123 A ST e: .. SPCT TlmN PflNCH ON 94 138e 2120 A JMP PlJNCHL • T I TLETFST '5 138D F123 A TOUT: SKNE " .. SPACE STA~T:LI3IS Punch Tape without Tab Characters 96 13BE 210A A JMP ST$PACE AI $7,(3 .. 1 97 13BF 7022 A OS?: FLAG ;ARE SPACES ACCtJMtILAT JMPS1ART 98 1390 2106 A JMP PUTCH • ENDSTAPT 99 1391 AilE A ST 0 .. CHAR ; SAHE CHARACTER lo1HILE 100 ;SENDING SOACES TL 101 1392 811£ A LO 0 .. SOACE TTJRN nl'~CH O~J 102 1393 2C02 A SPCONT: JS~ f SPUTC ; SEND ACCUMULATED 103 ; SPACF:S 10_ 1394 70lA A OS? SPCT J~P SPCONT eB Clear Buffer 105 1395 21 FD A 106 1396 8" 9 A LO 0 .. CHAR ; SEND CHAR AFTEP SPAC RT Read Tape Punched with IT Command 107 1397 2C02 A PUTCH: JSR @SPUTC 108 1398 12120121 A RTS LS 109 1399 AliA A STSPACE: ST 121". SAV0 ;SA1!E CHAR IN ACeJ .TITLE 110 139A F911 A SKNE ? .. TA81 TF:5T } e .STAr.l:T: LI l1J .. 5 . . III I 39B 2109 A JMo TAB .3 AI S,". 13 .. 1 Lilt Tape With 112 13ge F9HI A 5KNE 2 .. TAB2 Tab Characters JMP STA~.T 113 1390 211217 A JMP TAB .END START II- 139E F90F A SKNE 2 .. TAB3 115 J 39F 2U'J5A JMP TAB 116 13A0 4Cl2ll A LI •• I 117 13Al Al10 A ST ~ .. FLAG ; SET SPACE FLAG 118 13A2 790C A ISZ SPCT 119 13A3 811121 A LO 0". SAH0 ;RESTORE Ace 120 13AL.I 0'2121121 A RTS PACE, IMP-16 ASSEMBLER SL0026A 121 13A5 4Cl2l9 A TAB: LJ 121".1219 122 13A6 2C02 A JSR filSPUTC ; SEND A 'TAB' CHAR 123 IJA7 L.lC12I0 A LI 0.0 END PASS 1 12_ !JAB Ali2I6 A ST 0".SPCT ; RESET SPACE COUNTER I .TITLE TABTAP .. • VERS A 18 DEC 75' 125 13A9 AI98 A ST 0 .. FLAG ; RESET SPACE FLAG 2 126 13AA 811219 A LO 121". SAVel ; RESTORE ACel 3 127 !JAB 920121 A RTS ;'" .* .... "':.t< ** ...... ** ** ********** ** ** *** ...... ** ••••••••••••••• 128 13AC FFF9 A TABI ; .\JORD -7 12. 13AD FFFl A TAB2; .IJORD -15 130 13AE FFEI A TAB3; .','ORO - 31 THIS PROGRAr1 REDUCES THE LENGHT OF THE SOl1RCE 131 IJAF 00~0 A SPCTj .Y10RO 0 TAPES F'"ROM THE IMP & PACE EDITORS BY USING A 132 13BO 1219121121 A CHAR: .1'10RO 0 SINGLE TAB CHARACTER TO R~?LACE A STPING 133 1381 012120 A SPACE:: • "ORo "2 • 10• OF SPACES. THIS PROGRAM DVERIJRITES THE CA~D 13_ 1382 01219" A tLAG: .IJORo 0 II READER ROllTINES IN THE EDITORS AND MAY BE 135 13B3 1380 A ATOUT: ."'ORO TOUT 12 LOADED BY PFlFSSING 'LOAD P~OG" AGAIN AFTER TH 136 13B4 SAV0: .\JORD 0 13 EDITOR IS LOADED. 137 0"""0FB~ A .ENO START l- IS 16 ; ••• ** •••••••••• "' ••••••••••• "' ••••••••••• ** ••••••••••• 17 18 I. IMP 16L/P ED1T.l6 •• IMPEDT •• 20 21 IMP 16L/P CASM 22 ATOI)T CHA~ 1380 A DEVI CE '2I~Bl A 23 PACE 16P EDJ T 13B3 A I J82 A II1?CS"f 121'21'211 A IMPEOT 0000 A 24 FLAG INERR 1387 A K8f100E 11211 C A PACEDT 00~0 A 25 PACE 16P CASM •• PGA$M •• PCAS"'! 1309121 A PlfNCHL 13BA. A PIJTCH 1397 A 26 13BI A SPCONT 1393 A 27 SAu0 1384 A SPACF SPUTC 9.1002 A START 0FB0 A 28 .ASECT S?CT 13AF A TAB 13AS A TABI 13AC A 2. STSPAC 1399 A TAB3 13AE A TABTAP 1387 A 30 TAB2 13AD A 138D 31 PROGRAM SELECTION DEFINITIONS TOUT A 32 33 IMPEDT TYPE FOR IMPi6 EDITOR NO ERn OR LINES 3_ IMPC SM TYPE FOR IMP16 CONV EDT/AS!"! END PASS 2 SOIJRCE CHECKS1JM=60FF 35 PAC EDT TYPE FOR PACE EDITOR 36 PCASM TYPE 1 raR PACE CONU EDT/ASH OBJECT CHECKSUM=6CI6 4 COMPUTE Newsletter· Vol. 2, No.8 • Real-time programming techniques Which course • I/O control techniques, including interrupt handling. • The use of more powerful development tools for should you attend? applications software_ Three types of courses are offered by National: Fundamentals, In-House Courses Applications, and Programming. Each course addresses Any of the courses that are offered at our training centers can different training objectives, so you should carefully select the be conducted at your facility, or we can create a special course or courses which meet your particular objectives. Our course to meet your specific needs. If you have several people courses are described briefly below, and are described in detail who must be trained, it will probably be more economical for in the Course Specifications section of this catalog. us to bring the training center to you. Microprocessor Fundamentals When you contract with us to conduct a course at your This course is designed for the engineer, senior technician, or facility, we provide manager who has no previous experience with program alterable • Lab stations equivalent to those used in our permanent systems. This is the course to attend for training centers. • An introduction to microprocessor-based systems design • The same highly qualified instructors who conduct our • An introduction to microprocessor programming, including resident courses. hands-on experience with development systems and • A training session tailored to meet your specific objectives. familiarization with support software packages (assemblers, You provide editors, loaders, debugs). • Lecture and lab rooms with appropriate furniture and • Guidelines for selecting a microprocessor. training aids_ SC/MP Applications • Some eager students_ If you want to learn how to design systems using the SC/MP Costs for in-house courses vary according to the duration of microprocessor, or if you want to thoroughly evaluate SC/MP the course, the number of students, and the amount of lab for your applications, you should attend this course. In this equipment which we must provide, so each course must be course you will learn quoted individually. Contact your local National Sales • Hardware design techniques using SC/MP. Representative, and he can have a quote prepared for you. • SC/MP programming, including the use of development systems and support hardware. • How to build SC/MP applications systems, since you will Western Training Center design, build, program, and debug applications systems. Location PACE/IMP-16 Applications National's Western Training Center is located in Santa Clara, In this course you will learn how to design systems using the California, forty miles south of San Francisco and five miles PACE and IMP-16 microprocessors. Since PACE and IMP-16 north of San Jose_ The address is are used in systems that require powerful computational Western Training Center, MS 470 capability, class problems are designed to show you how to National Semiconductor Corporation use the sophisticated features of these microprocessors. Attend 2900 Semiconductor Drive this course if you want to Santa Clara, California 95051 • Learn to design systems using PACE or IMP-1B. Telephone: (408) 737-5889 • Evaluate PACE and I Mp·16 for your applications. Eastern Training Center Advanced Programming This course is designed for the engineer who has mastered the Location hardware portions of microprocessor-based systems, and has a National's Eastern Training Center is located in Coral Gables, good foundation in software. It is also for the programmer Florida, near Miami- The address is who has been exposed only to batch-mode programming, or Eastern Training Center who needs more experience in the direct control of I/O National Semiconductor Corporation devices_ This course is effectively an extension of the PACE/ 1320 South Dixie Hwy., Suite 870 IMP-16 APPLICATIONS course and the SC/MP APPLICATIONS Coral Gables, Florida 33146 course. Attend this course for Telephone: (305) 661-7969 or 661-7971
SCHEDULE OF MICROPROCESSOR CLASSES
Eastern Training Western Training Center Center Microprocessor Fundamentals September 27 -October 1 September 13-17 November 8 -12 October 25 - 29 SC/MP Applications October 4-8 September 20-24 November 15-19 November 8 -12 PACE Applications October 18-22 September 27 -October 1 November 1 -5 Advanced Programming August 23-27 October 3-8
COMPUTE Newsletter· Vol. 2, No.8 5 New Product Information Memory Addressing AEG Telefunken, Department of Avionics and Special In PACE Microprocessor Function, announces the introduction of a new and inexpensive 8-bit microprocessor system on Euro-Cards (100 Part of the PACE microprocessor's powerful instruction set is by 160 mm) in a 19-inch rack. a flexible method of addressing the memory. This method At the present time, the system has the following features: makes it possible to reference three sequences of 256 words located anywhere in the 65,536-word memory, as well as 1 • Microprocessor card based on National Semiconductor's another 256 words in fixed positions. SC/MP, containing:· Bus driver logic The fixed words from what is called a "base" page, and the Reset logic others form three "floating" pages. The mode of addressing Preaddressing selection (64 Addr. Max.) is specified by the 2-bit XR field (bits 8 and 9) of the 16-bit 1/4k RAM instruction, as shown in the figure. lk ROM When the XR field is 00, it specifies base-page addressing. The - TTY-Interface base page may consist of either the first 256 words in the DMA multiprocessing is possible memory, or the first 128 plus last 128 words. The base-page 2 • ROM memory card - 8k ROM + 1/4k RAM (max. select (BPS) signal input decides which option will be used. development 32k PROM) To address the first 256 words of memory (locations 0-255), 3 • RAM memory card - 4k RAM (max. development: 16k BPS is set to 0, and the 16-bit memory address is formed by RAM) setting bits 8 through 15 to zero and by using bits 0 through 4 • TTL I/O card - 16 bit each 7 to specify one of 256 locations. - Frame to take up to 10 component groups + power supply If BPS is 1, the 16-bit memory address is formed by setting bits 8 through 15 equal to bit 7 and by using 0 through 6 to Preliminary Price List locate the first 128 words of the memory (when bit 7 is 0) and 8-bit Microprocessor Group $ 352 FOB Germany the last 128 words (when bit 7 is 1). This technique is useful (ROM not included) for splitting the base page between read-write and read-only 4k RAM Group $ 368 FOB Germany memories or between memory and peripheral devices, so convenient base-page addressing can access data or peripherals_ ROM Group (ROM not included) $ 216 FOB Germany When the XR field is 01, it specifies that addressing be relative I/O Group $ 196 FOB GermarlY to the program counter (PC). In this mode, the memory Frame + Power Supply $1060 FOB Germany address is formed by adding the contents of the program Availability, September 1976 counter to the value of bits 0 through 7, treated as a two's complement number with sign. That is, the bits 0 to 7 are Contact: interpreted as a 16-bit value with bits 8 through 15 set equal Mr. Beis to bit 7. This allows numbers from -128 through +127 to be AEG Telefunken represented. Bits 0 to 7 are called displacement bits, since Abt. V225 they can represent a range of words around a center position. Industiestrasse 29 2000 Wedel When the XR field is 10 or 11, addressing is relative to an Hollstein, Germany index register, and any memory location within the external 65,536-word address space may be referenced. As before, the displacement field is interpreted as a signed value ranging from SC/MP Kit Replacement -128 through +127. The memory address is then formed by Parts and Repair Policy adding the displacement bits to the contents of either accumulator AC 2 (when XR = 10) or accumulator AC3 (when 1. No distributor returns of assembled kits will be accepted. XR = 11). This type of addressing is desirable for those An open skinpac constitutes an assembled kit. applications that require addresses to be computed at executior 2. Replacement parts are avai lable from the microprocessor time, since addresses can not be modified when a ROM is service center in the following configuration. All other serving for program storage (as is usually the case with parts are avai lable through local distributors. microprocessors as opposed to minicomputers). A. PC Board PIN 5514879 @ $25 B. Programmed ROM PIN 4100937 @ $25 3. Assembled units may be returned for repair at a $25 per unit charge. 15 10 o All parts requests and units to be repaired should be sent to: 16 BITS Microprocessor Service Center EFFECTIVE 2921 Copper Road XR FIELD ADDRESSING MODE ADDRESS Santa Clara, CA 95051 I Attention: Service Manager 00 Base page EA = disp 01 Program-counter relative EA = disp + (PC) 4. A check for the total amount made out to National 10 AC2 relative (indexed) EA = disp + (AC2) Semiconductor must accompany each parts request or unit 11 AC3 relative (indexed) EA = disp + (AC3) to be repaired. 6 COMPUTE Newsletter· Vol. 2, No.8 PRELIMINARY DATA: JULY 1976 en Keith Winter and Milt Schwartz National Semiconductor Corp. Q !: -a SC/MP Mates with Cassette Recorder !: m introduction This application note presents an inexpensive, reliable, table 1 for a list of recorders used in verifying this i and flexible method of storage of digital data and application.) A 30-minute cassette allows approximately computer programs on cassette tapes as an alternative 40K 8-bit bytes of storage per side of cassette tape. ~ to using paper tape, PROMs, or other more-complex This means that 17 2K-byte programs (including inter -- and more-expensive media. As an example of one program gaps) may be stored per side of tape. Reliability ..::r benefit of using this method, information may be easily of transmission at a 330-baud rate (40 bytes/second) stored and transported, thereby making it easy to lend should be sufficient for most hobbyists and for some C1 or trade programs. engineering development systems. To test the reliability, a 10K-byte program was loaded 10 times in succession. m To demonstrate this application, the SC/MP Low Cost For this test, four cassette recorders were used; one en Development System (LCDS) was used. All interface cir recording and two playbacks per recorder were made. en cuits, decoding, and RAMs or PROMS were bread For each recording, the program was played back on a CD boarded on a wirewrapped prototyping card. (See figure different cassette than was used for recording. (See 8 for photographs of breadboard and table 2 for parts table 1.) The results were error-free in all cases. list.) This wirewrapped card is compatible with the 72- S pin connectors that are contained in the SC/MP LCDS. Figure 1, SC/MP-to-Cassette System Block Diagram, Off-the-shelf integrated circuits were used to implement shows the major units for this application and their :Xl the circuits on the breadboard. interrelations. Figures 2 through 4 are detailed schematic CD diagrams of the breadboard portion of the system. A $50 cassette recorder provides satisfactory perform n The interconnection for this application is shown in ance. However, the consistent performance of a recorder figure 1. o in the $80 to $100 range may be more desirable. (See aCD CASSETTE RECORDER ...
MONITOR MICROPHONE OUTPUT INPUT AUDIO AUDIO IN OUT
INTERFACE CIRCUITRY (FIGURE 2) I SENSE B DIGITAL INPUT MEMSEL* ------, SCIMP ;-----r------SYSTEM I INCLUDES I HEX KEYBOARD I ADDRESS EDT ON AN~/OR TTY. INTERFACE ADDRESS EDT OFF CIRCUITRY. EOTISEARCH I DECODER LATCHES AND DISPLAY. I MEMORY SEARCH ON LEO INDICATORS MINIMUM r AND DEBUG r PERIPHERALS SEARCH OFF ROUTINES DATA r r RAM ADDRESS (B200·B2FF) r ROM ADDRESS o----!.::00.B IFF) I r (FIGURE 3) I L ______f- --- r------NWDS
r------.... - ---, I I I r I I I ROM CE 1 RAM r I I I I RIW I I SEND/RECEIVE ROUTINES AND 8 r r I L ______PROGRAM STORAGE (FIGURE 4) _ ___ .1
Figure 1. SC/MP-to-Cassette System Block Diagram
© 1976 National Semiconductor Corp. DA-B20M86/Printed in U.S.A. r------I
AUDID IN FRDM CASSETTE MDNITDR OUTPUT ~~.-~~--~~~~ @ 150pF
B20k
'5
470k
1.2M ------~
L ______AUDIO TO OIGITAL ~ CONVERSION CIRCUT
OIGITAL INPUT @ I D:~~~R A~21(~~~------~------~~~ OF FIGURE 3 r------AUDIO DUT TO CASSETTE MICROPHONE I 1.ak INPUT I I ill I "- .01 #-IF 1.ak 100u " " " " " " " " 22k " " " VOL TAGE AND PULSE " " WIDTH TRANSLATOR '5 " ,------Figure 2. Interface Circuit '5
lk RDMADOR SELECT 10OO-I1FF ADDA 12 ADDROB 15 1 OF 8 FRDM SYSTEM { ADDR 09 14 12FF 1131 ADDRESS AD DR 13 CDMPARATOR FRDM BUS ADDR 10 13 SYSTEM OM B22J ADDRESS BUS ADDR 14 DECDDE X'BOOO ADDR 15 -= 15 OATA 12
lk
ITO DISABLE SCIMP SYSTEM MEMDRY. ONLY NECESSARY IF SCIMP DEVELOPMENT SYSTEM IS USED.I
1 EDT ON 15 DECDDER FROM ADDR 00 FOR SERIAL SYSTEM 14 2 EDT DFF ADDRESS IADDR 01 DATA AND STATUS 13 BUS ADDR 02 INDICATDRS 3 SEARCH DN
4 SEARCH DFF DM7432 DM 1223
NWDS----~L~ CLOCK DR DATA PULSE PRESENTED TO INTERFACE CIRCUIT ISEE FIGURE 2)
+5 DM7400 EDT DM7400 ,.-----, LED ,.-----...., SEARCH INDICATDR LED EOT DFF I liDS! SEARCH OFFI INDICATOR I I I I EOT DN SEARCH ON I I I ~ _____ J ~ _____ ..J Figure 3. Memory Address and Peripheral Decoding Table 1. Cassette Recorders Used Table 2. Parts List
MAKE MODEL APPROX. COST PART QUANTITY RQ309AS $ 40 PANASONIC (Appl. BB. Card) RQ423S $ 70 4.375" X 4.862" P.C. Card 1 TC-40 MM5204 1 SONY $100 TC-55 $155 MM2101 2 DM8131 1 To specify the ideal cassette for this application is DM8223 2 difficult. The waveforms of figure 7C (output of cassette) DM7403 1 may be used as a guide for determining reasonable DM7400 1 characteristics. DM7432 1 DM7402 1 DM9602 1 operation LM3900 1 LM7413 1 A Tape I/O SC/MP Program residing in PROM (see appendix A for listing) provides the necessary timing Res istors (1 0%) and control for sending and receiving information 470K 8 between the SC/MP CPU and the cassette. 1 MEG 1 1.2 MEG 1 Typical Operation for Sending 1.8 MEG 1 820K 1 1. Operator loads his program to be transmitted into 45K 2 RAM. This operation may be performed using a key· 10K 1 board or a tape reader. 22K 1 2. The recorder is turned on and the operator (using the 1.8K 2 keyboard entry) transfers control to the Data Write 100n 1 Routines, which output his program to the cassette 10n 1 through an interface circuit. Status indicators inform 1K 4 the operator when the transmission is complete. 390n 2
Typical Operation for Receiving Capacitors 150 pF (MICA) 2 1. Using the keyboard, the operator transfers control 10 pF (Tantolum) 1 to the Receive Routine, which stores data transmitted 0.1 J..LF (ceramic) 11 from the cassette (through an interface circuit) into 0.01 J..LF (ceramic) 2 RAM. 100 J..LF (tera T) 1 2. The cassette is turned on and the operator observes Diodes status indicators to determine when the transmission 1N914 4 is completed and whether or not all data have been received correctly.
functional description Recording Transmission from SC/MP to the cassette is accom at the midpoint of the time frame, and, thus, a logic plished using a scheme that is self-synchronizing on a '0' is indicated by the absense of the second negative· bit-time basis. 1 The waveform is shown in figure 5. going pulse at the midpoint of the time frame. A 4-millisecond time frame is established by the 'send' To record, the Data Write Routines generate a long routine. The time duration between clocks is data leader of zeros plus an identification word (see figure 6). time. A logic 0 is represented by the absence of a pulse The decoder presents these data to the Interface Circuit. at the midpoint of the time frame; a logic '1', by the The Voltage and Pulse·width Translator portion of the presence of a pulse. Interface Circuit changes the TTL signals from the The clocks and bit pulses are generated by the Address Address Decoder into a form acceptable to the micro Decoder shown in figure 3. To generate either a clock phone input of the cassette (see figure 7 A and 7B). or a bit pulse (for a logic '1 '), a unique address is pre The leader allows the tape-drive motor and AGC loop sented to the System Address Bus during the execution to stabilize and, also, is an interprogram gap that facili of a Store Instruction by SC/MP. The clock or pulse tates multiple-program recording on a single side of the is then transmitted to the cassette via the Interface cassette tape. User data are transmitted by SC/MP fol· Circuit. A negative-going pulse is produced to begin the lowing the identification word. The data format is time frame. If the bit to be transmitted is a logic '1', shown in figure 6. the decoder is addressed at the midpoint of the time frame and a second negative-going pulse is produced again within one time frame at the decoder output. 1Scheme used was published in 'Computer Hobbyist' Volume 1, To transmit a logic '0', the decoder is not addressed #5. AUTHOR - HAL CHAMBERLAIN +s----4- VBB VLL ~GND VBB VGG ~-12 ROM ENABLE GND"': 22 PS B7 DB 7 21 +5....!..:. CS B6 DB 6 S 20 r ADDR 0 BS DBS 6 PRDG S~~ 19 SYSTEM ADDR 1 Al B4 DB4 7 18 DATA SYSTEM ADDR 2 B3 DB 3 BUS S A2 17 ADDRESS ADDR 3 B2 9 A3 16 BUS ADDR4 Bl DB 1 10 A4 IS ADDR S BO DBO 11 AS 14 ADDR 6 A6 AS ADDR S 13 } SYSTEM +s--E Vss A7 ADDR 7 ADDRESS BUS
RAM ENA BlE
1 22 1 ADDR 3 A3 VCC +5 r ADDR 3 A3 VCC 22 +S 2 21 2 AD DR 2 A2 A4 ADDR4 ADDR 2 A2 A4 21 ADDR4 3 3 SYSTEM ADDR 1 Al MM RIW ~~ ADDR 1 Al RIW~~ 4 2101 SYSTEM 4 MM ADDRESS ADDR 0 AD C"EI ADDRESS BUS ADDR 0 AD 2101 CEI-~ lB BUS 5 ~18 5 ADDR 5 A5 DO ADDR 5 AS DO 6 6 ADDR 6 A6 CE2~+S ADDR 6 A6 CE ~+S 7 2 16 7 A7 ADDR 7 A7 "ADDR 7 DD 4 m-,IS DD4 tit:l GND DB 3 } SYSTEM '- GND DB GND~ 014 14 DATA GND---i 014 14 9 011 Dll 6 } SYSTEM SYSTEM { DB 0 003 m--i BUS { DB 4 003 tit:l DATA DATA 001 01 DB 2 SYSTEM L....!! DOl - DB 7 BUS L...l2. 3 01 3 12 NWDS BUS DB 1 11 DI 11 DD2~ ~~~A DB S 01 2 D02~ NRDS - 1 2 I
Figure 4. ROM/RAM Interconnection's Between SC/MP and Cassette Tape Recorder
DATA 0
DATA 1 I CLOCK CLOCK DATA -TIME Figure 5. Data Output from Decoder
STARTING ENTRY LENGTH LEADER IDENTIFICATION ADDRESS POINT OF PROGRAM CHECKSUM 128 BYTES OF WORD OF ADDRESS PROGRAM D'S X'A5 PROGRAM (X'82OC) (X'82oA) (X'8203) (X'82oD) (X'82oB) (X'8204) ~t.s \ ""{SEAC"! 8 BITS GENERATED USER ENTERS HIS BY BLOCK TRANSFER ADDRESSES IN THESE ROUTINE 6 SPECIFIC LOCATIONS
Figure 6. Message Format Playback user operation When receiving data, the processor tests for a (logic '0') level at the sense B input. This level, from the 'send' Sending latch in the Interface Circuit (see figure 2) indicates that the first pulse of the time frame has arrived. The NOTE latch then is reset by SC/MP after delaying one quarter A hexadecimal number is identified by the prefix X'. of a time frame (see figure 7C, Bottom Trace). SC/MP delays an additional one half of a time frame and again The operator may code a program into RAM using the tests for a logic '0' at the sense input; a second low level keyboard. To input a program to the cassette, the indicates that a 'logic l' was received and the latch is operator loads location X'82D3 (high-order byte) and then reset. Otherwise, absence of a second low level X'82D4 (low-order byte) with the starting 4-digit hexa indicates that the data bit is a logic '0'. Using this decimal address of the program. method, a new time frame is generated by SC/MP upon receiving the first logic-'D' level of a time frame. Thus, no cumulative timing errors are built up. Refer to Next, location X'82DC (high-order) and X'B2DD (low the figures 7C and 7D for waveforms that occur during order) are loaded with the hexadecimal address of the the receive mode. These figures, which show transmis desired Entry Point. The entry point may be the start sions of ones and zeros, are included as troubleshooting ing address of any program to which the operator wants aids. to transfer control upon completion of loading (play In the playback mode, the monitor output from the back mode). Finally, the length of the program is loaded recorder is translated to a digital (TTL) signal by the into locations X'82DA (high-order) and X'82DB (low Audio-to-Digital Conversion Circuit of figure 2; the order). To output the operator turns on the cassette TTL signal drives the sense B input of SC/MP. The and then transfers control to the address X 'BDC7, the Receive Routine searches for the identification word, beginning of the Data Write Routines. The Search and upon recognition stores the user data in RAM. Indicator is turned on after the leader of zeros is trans Tape format is such that upon completion of loading mitted. When the transmission is completed, the Search a program from the cassette, the program may be Indicator is turned off, an End of Transmission Indi executed or control may be transferred to another cator is turned on, and the program halts at location existing program (such as a debug program). This is X'8142. accomplished by the user loading the Entry Point Address at record time with the starting location of any Necessary communication between the operator and the program desired. (This is discussed below under User processor must be provided so the operator may transfer Operation.) The Data Write and Receive Routines are control to a location in RAM and may modify RAM stored in ROM along with a minimum control routine; locations. This capability is available using the SC/MP these routines comprise the TAPE I/O SC/MP Routines development system or the SC/MP minimum DEBUG of appendix A. The control routine effects communica Kit plus Hex Keyboard, Interface and Hex Display.2 tions between the operator and a "hex" keyboard and controls the LED indicators of figure 3. 2Refer to SC/MP Technical Description, Appendix B.
TYPICAL DAT~,, FROM ADDRESS u DECODER OUTPUT Q1~..... ~ ____ ...... n __ _ ONE·SHOT { OUTPUTS n2 ~~ LJ
WAVEFORM PRESENTED TO O.ZV MICROPHONE INPUT
KEY: T1 "" Z/.IS T2 "" 15/.15
Figure 7A. Waveforms Developed by Voltage and Pulsewidth Circuit of Interface Circuit H
G
PHOTO NO.1 - WRITE MODE PHOTO NO.2 - WRITE MODE TRACE NO.1 OUTPUT TO CASSETIE DATA OUT = ALTERNATE 0 ! I'S VERTICAL = 0.5V1oIV TOP TRACE = OUTPUT TO CASSETIE HORIZONTAL = 50 jAS/DIV VERTICAL = 5V1DIV TRACE NO.2! NO.3 = ONE SHOT OUTPUTS MIDDLE TRACE = DNE SHOT PIN 9 TRACE 2 = PIN 9 OF 9602 SEE TRACE 3 = PIN 6 OF 9602 IFIGURE _ BOTTOM TRACE = ONE SHOT PIN 6 VERTICAL = 5V/0IV VERTICAL = 5 V/DIV HORIZONTAL = 50 jAS/DIV HORIZONTAL = 1 ~s/DIV (ALL) TRACE NO.4 EFFECTIVE flAG OUTPUT OF PERIPHERAL DECODER PIN 5 Note: Circled letters refer to points on VERTICAL = 5V/DIV Interface Circuit, Schematic Diagram. HORIZONTAL = 10jlS/DIV
Figure 7B. Write Mode Waveforms
OUTPUT OF SEND LATCH
PHOTO NO.3 - RECEIVE MODE TOP TRACE = WAVEFORM FROM MONITOR OUTPUT OF RECORDER MIDDLE TRACE = OUTPUT OF SCHMITT TRIGGER (7413 PIN 6) BOTTOM TRACE = OUTPUT OF SEND F/F (TO SCIMP SENSE B INPUT) VERTICAL = 5V/DIV Note: Circled letters refer to points on HORIZONTAL = 2 mS/DIV Interface Circuit, Schematic Diagram.
Figure 7C. Receive Mode Waveforms
1...... -----'" 4 ms-----...·~I
800 ~s
5V
Figure 70. Waveform at Point E of Interface Circuit Receiving Acknowledgements To receive, using the keyboard, the operator transfers The following people contributed to this application control to X'8000, the starting address of the Bootstrap note: Loader Routine, which initiates the required conditions in SC/MP and then addresses the Receive Routine. Ed Burdick The operator turns on the cassette for 'PLAYBACK.' Bill Grundman The EDT indicator is turned on at the end-of-transmis sion. The Search Indicator is turned on until the identi Tom Harper fication word is recognized and then is turned off. Tom Mills (This indicator will be on 3 to 5 seconds under normal operation.) If the checksum is good, the Search Indi cator is turned on again when the transmission is completed. When in the "playback" mode, the volume control of the cassette recorder should be adjusted to a point References Publications where the monitor output is just below "clipping" SC/MP Technical Description (Pub. No. 4200079) when measured with an oscilloscope. A trial and error method may be used using the Search Indicator on-off SC/MP Users Manual (Pub. No. 4200105) time of ~5 seconds as a limit switch while the volume SC/MP Programming and Assembler Manual (Pub. control is varied. No. 4200094)
EOT SEARCH INDICATDR INDICATOR IN GND DUT
INTERFACE CIRCUIT
RAM AND ROM
ADI1RESS"11ECDDING FOR MEMORY AND PERIPHERALS
Figure 8. SC/MP-to-Cassette Breadboard Appendix A Tape 10 SC/MP Routines 1 · TITLE TAPEIO, ~ SC/MP ROUTINES' 2 3 8121121121 · =X~8e0e 4 5 821313 RAM X"'82ee RAM ADDRESS FOR POINTER 6 831313 PERIPH X"'83e13 PERIPHERAL ADDRESS FOR POINT 7 8 1313133 P3 3 POINTER #3 9 00132 P2 2 POINTER #2 113 1313131 Pi 1 POINTER #1 11 12 ; TEMPORARY DATA IN RAM 13 14 12113121121 CNTU o INSIDE COUNTER FOR LEADER 15 1211301 CNTL 1 OUTSIDE COUNTER FOR LEADER 16 00132 CKSUM 2 CHECK SUM COUNTER 17 01303 STARTU 3 STARTING ADDRESS (UPPER) 18 121004 STARTL 4 STARTING ADDRESS (LOWER) 19 012105 BITCNT 5 BIT COUNTER 213 0006 TEMPi 6 TEMPORARY STORAGE LOCATIONS 21 121121137 TEMP2 7 " 22 12112108 TEMP3 8 23 0009 TEMP4 9 " 24 000A ~lDUHU 10 140RD COUNT <: UPPER) 25 OOOB WDCNTL 11 ~lORD COUNT (LOWER) 26 ooec JUMPU 12 TRANSFER ADDRESS (UPPER) 27 OOOD .]UMPL 13 TRANSFER ADDRESS (LOWER) 28 29 .; PER I PHERAL ORDER CODES 30 31 0000 EOTON o END OF TAPE LED ON POINTER 32 0001 EOTOFF 1 END OF TAPE LED OFF POINTER 33 0002 SRCHON 2 SEARCH LED ON POINTER 34 013133 SRCHOF ]: SEARCH LED OFF POINTER 35 131304 FLAG 4 READ/WRITE FLAG 36 37 · PAGE "'BOOTSTRAP LOA[)ER~ ...:::::: 3:9 413 BOOTSTRAP LOA[)ER ROUTINE. RECEIVES PROGRAM FROM TAPE. 41 ALL NECCESSARY INFORMATION FOR LOADING IS ON TAPE. 42 43 THIS PROGRAM MAY BE REASSEMBLED TO ADDRESS X'00e0 TO 44 FUNCTION AS A POWER-ON LOADER. 45 46 INPUT OPERATION OF LED INDICATORS: 47 48 SEARCH LED ON 14HEN PROGRAM STARTS 49 SEARCH LED OFF WHEN IDENTIFIER CHARACTER RECEIVED 513 END OF TAPE (EOT> LED ON WHEN RECEPTION COMPLETE 51 SEARCH LED ON IF CHECKSUMS COMPARE 52 53 CONTROL IS THEN TRANSFERED TO USER PROGRAM 54 55 56 8131313 138 BOOT: NOP FOR RELOCATION TO x'eeee 57 8eei C4ee LDI L(RAM) INITIALIZE RAM POINTER 58 8003 32 XPAL P2 IN P2 59 8004 (:482 LDI H
80 8026 CB03: SETPNT: ST SRCHOF(P3) TURN OFF SEARCH LED 8:1. 8028 C46[) LDI L(RECV)-:1. PLACE ADDRESS OF BYTE RECEIV 82 802A 31. :X:PAL P1. IN P1. EG 802B C480 L[)I H(RECV) 84 802D 3:5 :X:PAH P1. 85 802E 3D XPPC P1. GET STARTING ADDRESS (LOWER) 86 802F :n XPAL P3 AND PLACE IN P3 87 8030 3D XPPC P1. GET STARTING ADDRESS (UPPER) 88 8031. 37 ><:PAH P3 89 8032 3[:- ~(PPC P1. GET TRANSFER ADDRESS AND 90 8033 CAI3D ST .JUMPL(P2) SAVE IN RAM 91. 8035 3D :><:PPC P:1. 92 8036 CA0C ST JUMPU(P2) 93 8038 3D XPPC P1. GET WORD COUNT (LOWER) 94 8039 CA0B ST WDCNTL(P2) 95 803B 3D XPPC P1. GET WORD COUNT (UPPER) 96 803C CA0A ST WDCNTU(P2) 97 98 803E 3D BOOTI N: XPPC P:1. GO TO RECEIVE 99 803F CF0:1. ST @HP3) STORE AND INCREMENT POINTER :1.00 804:1. F202 ADD CKSUM(P2) ADD CHARACTER TO CHECKSUM 1.0:1. 8043 CA02 ST CKSUM(P2) 1.02 8045 AA0B ILD ~JDCNTL (P2) INCREMENT LOWER WORD COUNTER 1.03 8047 9CF5 JNZ BOOTIN CHECK FOR ZERO :1.04 8049 AA0A ILD WDCNTU(P2) INCREMENT UPPER WORD COUNTER :1.05 804B 9CF:1. JNZ BOOTIN CHECK FOR END OF TRANSMISSIO :1.06 8e4D 3D XPPC P:1. GET CHECKSUM FROM TAPE 1.07 804E E202 XOR CKSUM(P2) COMPARE TO CALCULATED VALUE :1.08 805£1 9809 JZ EXECPR EXECUTE LOADED PROGRAM :1.09 8052 C400 LDI L
1.59 1.60 8090 C400 GET8IT: LDI L(PEPIPH) PLACE PERIPHERAL ADDR. IN P3 1.61. 81392 3:3: ~
237 238 BLOCK TRANSFER ROUTINE. SENDS BLOCK OF DATA TO CASETTE 239 2413 THE FOLLOWING ADDRESSES MUST BE LOADED BY USER BEFORE 241. EXECUTING THE WRITE PROGRAM: 242 243 W82e3 UPPER 8 BITS OF PROGRAM ADDRESS 244 X-'82e4 LOWER 8 BITS OF PROGRAM ADDRESS 245 W82eA UPPER 8 BITS OF PROGRAM LENGTH 246 W82eB LmlER 8 BITS OF PROGRAM LENGTH 247 X-'82e(: UPPER 8 BITS OF TRANSFER ADDRESS (ENTRY POINT) 248 W82eD LOWER 8 BITS OF TRANSFER ADDRESS 249 250 251. 80FC C400 BLOCK: LDI €I CLEAR ACCUMULATOR 252 80FE CA02 ST CKSUM(P2) INITIALIZE CHECKSUM COUNTER 253 81.013 C481. LDI H(WRITE) PLACE ADDRESS OF WRITE IN P1. 254 81.02 35 XPAH P1. 255 81.03 C444 LDI L Manufactured under one or more of the following U.S. patents, 3083262, 3189758, 3231797, 3303356, 3317671, 332J071, 3381071. 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765, 3566218, 3571630, 3575609, 3579059, 3593069, 3597640, 3607469, 3617859. 36JlJ12, 3633052, 3638131, 3648071, 3651565, 3693248. National Semiconductor Corporation 2900 Semiconductor Drive, Santa Clara, California 95051, (408) 737·5000fTWX (910) 339·9240 National Semiconductor GmbH 808 Fuerstenfeldbruck, Industriestrasse 10, West Garmany, Tele. (08141) 1371fTelex 05·27649 National Semiconductor (UK) Ltd. Larkfield Industrial Estate, Greenock, Scotland, Tele. (0475) 33251fTelex 778·632 COMPUTE LIBRARY SUBMITTAL FORM OTHER ______o SC/MP o PACE o IMP-16 o o PACER o SCAMPER Program Title Function Required Hardware Required Software Input Parameters Output Results (use additional sheets if necessary) Registers Modified: Maximum Subroutine Nesting Level: RAM Required: Assembler/Compiler Used: ROM Required: Programmer: Date Submitted: Company: COMPUTE Newsletter· Vol. 2, No.8 7 1. Complete Submittal Form as follows: a. Processor (check appropriate box) b. Program title: Name or brief description of program function c. Function: description of operations performed by the program d. Required hardware/firmware/software For example: TTY High Speed Printer Arithmetic CROM POWR I/O CROM EXTENDED CROM TTY routines Floating point package Support software required for cross products e. Input parameters: Description of register values, memory areas or values accepted from input ports f. Output results: Values to be expected in registers, memory areas or on output ports g. Program details. 1. Registers modified 2. RAM required (bytes) 3. ROM required (bytes) 4. Maximum subroutine nexting level h. Assembler/Compiler used For example: SM/PL IMPASM, PASM PACE CROSS ASSEMBLER SC/MP CROSS ASSEMBLER i. Programmer and company 2. A source listing of the program and paper tape should be included 3. A test program which assures the validity of the contributed program is useful to include for user. This is for the user's verification: Each library program submitted entitles you or one of your colleagues to a free membership. Name (add Address for free COMPUTE membership) Name ______ Company ______ SEND COMPLETED FORMS WITH PROGRAM LISTINGS AND SOURCE TAPES TO: COMPUTE/115 National Semiconductor Corp. Bmbh National Semiconductor 808 Fuerstenfeldbruck 2900 Semiconductor Dr. OR Industriestrasse 10 Santa Clara, CA 95051 Germany ATTN: Georgia Marszalek ATTN: Phil Hughes 8 COMPUTE Newsletter· Vol. 2, No.8 Support Hardware CONFERENCE for SC/MP and PACE ANNOUNCEMENTS MINI/MICROCOMPUTER CONFERENCE AND EXPOSITION 'Application Cards! October 19-20-21, 1976 Brooks Hall/Civic Auditorium, San Francisco Bob Pecotich, National Semiconductor A Major Computer Conference in a Major Computer Market SC/MP and PACE share a common 4.375" X 4.862" card Approximately twenty sessions consisting of eighty pages size, with both families of application cards using the standard covering both application and design topics are planned. 72 pin, 0.1 with center edge connector. The card size is one widely supported by AUGAT, INC. (with its M Series line) PLUS ... tutorial sessions on minis and micros and a special and a number of second sources. The following table lists session for computer hobbyists! support hardware commonly needed by your customers ... For information, write: MINI/MICRO COMPUTER CONFERENCE AND EXPOSITION 5544 E. LaPalma Avenue, Anaheim, CA 92807 Manufacturer Part No. Price Phone: (714) 528-2400 72 CONTACT MICRO-9 EDGE CONNECTOR Ninth Annual Workshop on Microprogramming to be held in Augat 14005·17P3 $4.81/1, New Orleans, September 27-29. For information contact Prof. $4.22/10-24 Peter Kornerup, MICRO-9 Program Chairman, Computer ~obinson/Nugent EC721 $7.55/1, $5.20/100 Science Dept., University of Southwestern Louisiana, Box Elco 00-6307 -072-309-001 4-4330, Lafayette, LA 70504 (318) 233-3850, Ext. 538. Cerich 50-72C-30 National Connector 900100-36 NotFm~ButAffordab~! Stanford Applied CDP7000-72 National Semi Handbooks. The eight-bit SC/MP Technical Engineering Description starts with a general introduction for nontechnical Winchester HW36C0111 $4.79/1, users and follows up with complete details of the design of $3.51/100 SC/MP-based applications. Price for the 65-page handbook is CONNECTOR CARD CAGE $3 ... The Memory Data Book covers most of National's ~/TH BACKPLANE: memory and memory-related products including bipolar, MOS, Augat 8170-MG 1 $177.50/1, CMOS RAMs and PROMs. Price for the 544-page book is $3 $147.75/10-24 ... The TTL Data Handbook describes National's complete Robinson/Nugent MECA-1 $202/1, line of bipolar logic devices. A tri-state selection guide, $150/10-24 industry cross-reference guide and functional index are also EXTENDER CARD: included. Price is $4 ... The 16-bit Pace Technical Description Augat 8136-MG13 $29.50/1, describes both the full-feature CPU and the entire complement $24.50/10-24 of hardware and software items. Price for the 96-page Robinson/Nugent EB-72 $31.60/1 handbook is $3. To obtain these handbooks, send check for amount VNIVERSAL W/W CARD tvlTH TERMINALS: (California residents add 6 percent sales tax) to Marketing Augat 8136-UMG1 $51.75/1 Services Dept., National Semiconductor Corp., 2900 Robinson/Nugent MAL-UNI-24 $48.60/1 Semiconductor Drive, Santa Clara, CA 95051. HIGH DENSITY W/W CARD WITH TERMINALS: ERRATA Augat 8136-MG-15 $85.25/1, The September 1975 issue of the PACE Data Book contains $71.50/10 the following corrections: Page 23 The PACE ILE/16 (lPC-168/513J) has been replaced by tbe PACE I LE/8 (I PC-16A/503J), and this latter part should be used in new NEWADDRESS designs. FOR MICROPROCESSOR Page 40 The ALE/8 (IPC-16A/508J) has been replaced by the ALE/16 (lPC-16A/518J), and this latter SERVICE CENTER part should be used in new designs. Pages 45, 46 The "J" package in which the Blue/Green Microprocessor Service Center Chips are currently supplied is not a hermetic National Semiconductor cavity DIP as described. Instead, the package 2921 Copper Rd. consists of a ceramic substrate to which the Santa Clara, CA 95051 chips are fixed. The attached chips are For information regarding the status of equipment or service protected by a conformal epoxy coating that policies call (408) 737-6270. Ask for Jim Snyder or Don provides hermeticity comparable to an Epoxy B Cooper. package. COMPUTE Newsletter· Vol. 2, No.8 9 SCIMP, PACE TRAINING AT EUROPEAN WORK SHOPS 8r SEMINARS! Dear Sirs: SC/MP WORKSHOPS Enclosed you will find my application for membership in COMPUTE. I am interested in obtaining a list of the routines Belgium currently in the User's Group Library. Specifically, I am Date: September 13-15 inclusive interested in obtaining a routine to calculate the square root Location: Brussels of a positive integer number. Sponsor: J.P. Lemaire Sincerely, Rame Galoise 1 A David L. Wilson 1020 Brussels Air Monitoring Inc. Telephone: (02)-478.48.47 2015 Bellaire Avenue Telex: 24.612 Royal Oak, Michigan 48067 Norway Mr. Wilson has a PACE kit and a PACER system. We have Date: October 11-13 a SQRT program for IMP-16 (SLOO28A). Does anyone have Location: Oslo one for PACE? Ed. Further information from: NS Sweden 0046-8-970835 ~~~ Finnland 16 BIT COMPUTER KIT (Cont'd) Date: September 28-30 Location: Helsinki The keyboard will also allow you to sequentially increment or Further information from: decrement through memory or internal accumulators and NS Sweden registers for examination or modification of contents. Other Mu Itikomponent front panel buttons include run, initialize (reset). restart (halt Copenhagen CPU but do not reset). and cancel last command. Denmark The kit includes all parts one needs to have a working desk top Date: September 1-3 inclusive microcomputer development system. The CPU board includes Location: Copenhagen the PACE 16 bit MPU with necessary input and output buffers~ Sponsor: Multikomponent On the control and I/O boards are two DM8531 (2038 X 8 ~ Herstedvang 7 C each) ROMs for the system monitor. Also included on these 2020 Albertslund boards are four MM2112 (256 X 4) static RAMs, one Denmark MM5740 keyboard encoder, two hex latches and LED driver Telephone: (02)-644471 circuits as well as all required support components to interface with the two 4 digit displays and 32 keypad. The control France board has space for four more MM2112 RAMs. The memory Dates: September 20-24, November 2-26 board comes with four MM2112 RAMs. Space is provided Location: Paris for 12 more MM2112 RAMs and four MM5204 (512 X 8) Sponsor: Fime PROMs for future memory expansion. The PAC II card has 3 Rue de Chevilly 2k X 16 of MOS RAM. The PAC I, PAC II, and PAC III cards 94262 Fresnes, France t are optional cards. PAC III is a prototyping card with voltage Telephone: 6669501 regulators. All other boards also have their own on board Telex: 204802 voltage regulators. PAC I is a TTY (or RS232C) interface and Switzerland resident assembler card. With PAC I the user may perform all Date: September 27-29 the front panel functions from a teletype (or similar device Location: Geneva using current loop or RS232C) as well as the following useful Sponsor: Fenner functions: Rheinfelderstr 16-18 • Load or punch a paper tape - no bootstrap need be loaded. 4450 Sissach • Display a block of memory in one of several formats Switzerland including assembly language (yes a dis-assembler! - very Telephone: (061 )-982202 useful), ASCII, hexadecimal, unsigned decimal, or signed Telex: 63235 decimal. U.K. • Set, list, or reset break or snap points (Break points are 1. Date: September 6 placed at strategic locations in a program. They halt Location: Birmingham execution and display the contents of specified registers 2. Date: October 4 and memory locations. Snap points do the same except Location: Manchester program execution is not halted.) ~ 3. Date: November 1 • Enter programs in assembly language format (the assembler1 Location: London converts your programs line by line as you type them, to 4. Date: November 29 hexadecimal. No paper tape or cassette need be used for Location: Leeds this. The assembler and other features listed here reside in (Continued on page 12) two EA4900 type ROMs which hold 16k bits each.) 10 COMPUTE Newsletter· Vol. 2. No.8 • Use symbols; the assembler does all address assignment and Footnotes for 16-bit Computer Kit article: referencing. (One may also list the symbol table, delete a (1) Project Support Engineeringl750 N. Mary/Sunnyvale, symbol or clear the table.) CA 94086. ihe Pacer worked perfectly the first time I turned on the (2) Bit BucketICompute-116/National Semiconductor/ ~wer. As I played with it, I began to appreciate the beauty of 2900 Semi€onductor Dr., Santa Clara, CA 95051. Its high level front panel operational and debug capabilities. (3) Described in The Technology of Computer Music by M. Mathews, MIT Press, Cambridge, MA 1969. Now I wanted to try our teletype with it. I quickly wired up (4) "Score - A Musician's Approach to Computer Music" our TTY to the connector and plugged in a PAC I pc board by L. Smith in the Journal of the Audio Engineering (TTY interface/resident assembler). The TTY would not Society (JAES) Vol. 20, No.1, Jan/Feb, '72. work - oops, I neglected to ground the TTY select (low = (5) "Digital-to-Analog Converters: Some Problems in select) pin on the connector. Once I did this everything Producing High Fidelity Systems" by R. Talambiras, worked perfectly, and I enjoyed exploring the fine operational Computer Design, Vol. 15, No.1, page 63, Jan, '76. capabilities of the unit. (6) J. Chowning, "The Synthesis of Complex Audio Spectra Available soon from P.S.E. will be a PROM burning board, and by Means of Frequency Modulation" JAES, Vol. 21, an audio cassette interface, a CRT character generator and No.7, p. 526, Sept, 1973. interface, a floppy disk interface, and BASIC (the debugged program burned into PROMs) as well as other programs in ~~~ firmware. Since the Pace shares instructions with the IMp·16 A HIGH LEVEL LANGUAGE (Cent'd) (minor modification of programs might be needed), there is a lot of software already available. The Bit Bucket2 newsletter is DO WHI LE Statement: ihe best source of PACE and IMP-16 software. Program Executes a group of statements a specified number of times, 'stings are free, source tap!!s $5, object tapes $3. varying the controlling index on each repetition. Overall I very much like the Pacer. I wish sockets had been Iterative DO Statement: provided for all the IC's and a heftier power supply had been Executes a group of statements a specified number of times, used, however, these additions would of course increase the varying the controlling index on each repetition. cost. The front panel operation and debug capabilities are the DECLARE Statement: best I have seen on any commercial computer kit. I have not Defines the data types of variable (BYTE or WORD), the used any PAC II operational memory cards yet; so I can't number of variables in arrays, initialization of variables (INITIAL), evaluate them. However, I would highly recommend the PAC I constants (DATA), strings for compile-time substitution TTY interface/resident assembler optional card. Having an ( LITERALLY), and variables to be addressed indirectly (BASED). mbler and dis-assembler as well as a system monitor in Built-In Functions and Routines: mware result in relatively quick and easy assembly E A set of built-in functions provide facilities such as rotation and anguage, programming and debugging. The 16-bit instructions shifting, decimal arithmetic time delays, binary ~ ASCII and data provide for efficient assembly language programming conversion, stack operations, condition code and control flag as well as increased accuracy_ One may use words as a whole or manipulation. in 8-bit bytes. Common memory and peripheral addressing result in simple quick I/O instructions. Interrupt Procedures and Control: Service routine executed when an interrupt occurs. Statements With the Pacer's 16-bit accuracy and easy I/O and a couple of also exist for Interrupt ENABLE and DISABLE. floppy disks, one could program something like Music V3 and Score4 for composition and playing of high fidelity Assembly Language Linkage: music. Of course you would also need a 16-bit DAC5. If a Assembly language procedures can be defined and linked to lery fast hardware multiply card were added as well as a fast SM/PL programs. Pace IC (rumored to be coming out from National Semi) to Input and Output: replace the pMOS IC, a real time FM synthesis6 of timbre I/O statements that allow data to be read or written to an might be possible. I'm not sure if the rest of the Pacer circuits external device. would be fast enough. Oh well - back to the 4-bit bipolar slices for real time Fourier synthesis. The charge for a copy of the manual, paper table object program and source listing is $100. To order copies of the PACER PRODUCT LINE RETAIL PRICE LIST (June, 1976) above material please fill out the form below. Make checks Quantity 1H 2H 3H PAC I PAC I! PAC III PAC IV Fan Kit payable to COMPUTE. Delivery is 6-8 weeks after your order 1-3 $895 $1075 $1025 $180 $225 $50 $7 $25 is received. 4-9 $855 $1035 $ 985 $175 $245 $47 $6 $23 1O-up $820 $ 995 $ 950 $1 70 $235 $45 $5 $22 Club group buys would help reduce costs. ~/-PL-ORD-ER-FO-RM------, Pacer 1 H - totally unassembled (not recommended by P.S.E. I Name I for beyinners. Pacer 2H - completely assembled, tested and burned in. I~m~~ I Pacer 3H - unassembled except for logic cards which are IStreet Address ______I tested and burned in. ~AC I - TTY interface/resident assembler card. ICity ______State _____Zip, ___ I ~AC II - 2k X 16 MOS RAM card. PAC III - prototyping card with voltage regulators. IDa~ I PAC IV - dual 43 pin motherboard connector (this comes I Enclosed is $100.00 each for set(s) of SM/PL softwarel with PAC I, PAC II or PAC III). Fan Kit - designed for general purpose use. COMPUTE Newsletter· Vol. 2, No.8 11 UNITED STATES COMPUTE/115 NATIONAL SEMICONDUCTOR CORP. 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA. 95051 TEL: (408) 247·7924 TWX: 910·338-0537 EUROPE GERMANY National Semiconductor GmBH 808 Fuerstenfeldbruck Industriestrasse 10 Tel: 08141/1371 Telex: 05-27649 AUSTRALIA NS Electronics Pty Ltd Cnr. Stud Rd. & Mtn. Highway Bayswater, Victoria 3153 Tel: 03-729~333 Telex: 32096 (Continued from page 10) Further information from: Holland N.S.U.K. -0234-211262 Rode/co is holding SC/MP 'Product Days' 1 day per week until Farnell Electronic, Leeds -0532-636311 September Atlantic Components, Leicester -0533-65931 Italy DTV Group Ltd., London 01-670-6166 1. Date: October 18 ITT Electronic Serv., Harlow 0279-26777 Location: Milan Sasco Ltd., Crawley 0293-28700 2. Date: October 20 Swift Hardman, Rochdale 0706-47411 Location: Bolognia Jermyn Industries, Sevendars 50144 3. Date: October 22 Nsign, Reading 0734-59491! Location: Rome Germany Sponsors: Adelsy TEL (02)-4985051 1. Date: October 13 Interrep TE L (06)-8124894 Location: Munich Interrep TEL (02)-6881783 2. Date: November 8 Location: Hamburg PACE WORKSHOPS Further information from: PAN Elektronik 089-6123329 Switzerland EBV Elektronik 0611-720418 Date: November 15-17 RTG-Distron 030-8233064 Location: Sissach RTG·Springorum 0231-579252 Sponsor: Fenner France SC/MP SEMINARS Date: October 18-22, December 13-17 Location: Paris Switzerland Sponsor: FIME 1. Date: September 7 Location: Zurich Italy 2. Date: September 8 Date: November 22-24 Location: Geneva Location: Milan Sponsor: Fenner Sponsor: C.P.M. Via M Gioia 55 ,------, Milan I I Telephone: 02-683680 For further information on these short courses, European : IMPORTANT : members of Compute should contact: I SEE REVERSE SIDE FOR I Philip Huges SM/PL ORDER FORM National Semiconductor Gmbh 808 Fuerstenfeldbruck I I Industriestrasse 10 I I Germany Telephone: 08141/1371 L ______.-J Telex: 05-27649 12 COMPUTE Newsletter· Vol. 2, No.8