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Intel and Mobileye Autonomous Driving Solutions
PRODUCT BRIEF Autonomous Driving Intel and Mobileye Autonomous Driving Solutions Together, Mobileye and Intel deliver scalable and versatile solutions using purpose-built software and efficient, powerful compute that will make autonomous driving an economic reality. Total Technology and Resources Making the self-driving car a reality requires an unprecedented integration of technology and expertise. Together, Mobileye and Intel provide comprehensive, scalable solutions to enable autonomous driving engineered for safety and affordability. With a combination of industry-leading computer vision, unique algorithms, crowdsourced mapping, efficient driving policy, a mathematical model designed for safety, and high-performing, low-power system designs, we deliver a versatile road map that scales to millions, not thousands, of vehicles. Purpose-built software and hardware Mobileye’s portfolio of innovative software across all pillars of autonomous driving (the “eyes”) complements Intel’s high-performance computing and connectivity expertise (the “brains”). This winning package supports complex and computationally intense vision processing with low power consumption, creating powerful and smart autonomous driving solutions from bumper to cloud. We start with revolutionary software from Mobileye that includes: • Low-cost, 360-degree surround-view computer vision • Crowdsourced Road Experience Management™ (REM™) mapping and localization • Sensor fusion, integrating surround vision and mapping with a multimodal sensor system • Efficient, semantic-based artificial intelligence (AI) for driving policy (decision-making) • A formal safety software layer via our Responsibility Sensitive Safety (RSS) model This advanced software calls for a powerful compute platform. We use a combination of proven Mobileye EyeQ® SoCs for computer vision, localization, sensor fusion, trajectory planning, and our RSS model designed for safety, as well as Intel® processors for translation of the planned trajectory into commands that are issued to the vehicle’s actuation system. -
Simics* Model Library for Eagle Stream Simulation Environment
Simics* Model Library for Eagle Stream Simulation Environment Release Notes May 2020 Revision V0.6.00 Intel Confidential Notice: This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information. Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software, or service activation. Learn more at intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade. -
Fax86: an Open-Source FPGA-Accelerated X86 Full-System Emulator
FAx86: An Open-Source FPGA-Accelerated x86 Full-System Emulator by Elias El Ferezli A thesis submitted in conformity with the requirements for the degree of Master of Applied Science (M.A.Sc.) Graduate Department of Electrical and Computer Engineering University of Toronto Copyright c 2011 by Elias El Ferezli Abstract FAx86: An Open-Source FPGA-Accelerated x86 Full-System Emulator Elias El Ferezli Master of Applied Science (M.A.Sc.) Graduate Department of Electrical and Computer Engineering University of Toronto 2011 This thesis presents FAx86, a hardware/software full-system emulator of commodity computer systems using x86 processors. FAx86 is based upon the open-source IA-32 full-system simulator Bochs and is implemented over a single Virtex-5 FPGA. Our first prototype uses an embedded PowerPC to run the software portion of Bochs and off- loads the instruction decoding function to a low-cost hardware decoder since instruction decode was measured to be the most time consuming part of the software-only emulation. Instruction decoding for x86 architectures is non-trivial due to their variable length and instruction encoding format. The decoder requires only 3% of the total LUTs and 5% of the BRAMs of the FPGA's resources making the design feasible to replicate for many- core emulator implementations. FAx86 prototype boots Linux Debian version 2.6 and runs SPEC CPU 2006 benchmarks. FAx86 improves simulation performance over the default Bochs by 5 to 9% depending on the workload. ii Acknowledgements I would like to begin by thanking my supervisor, Professor Andreas Moshovos, for his patient guidance and continuous support throughout this work. -
Safe and Secure Model-Driven Design for Embedded Systems Letitia Li
Safe and secure model-driven design for embedded systems Letitia Li To cite this version: Letitia Li. Safe and secure model-driven design for embedded systems. Embedded Systems. Université Paris-Saclay, 2018. English. NNT : 2018SACLT002. tel-01894734 HAL Id: tel-01894734 https://pastel.archives-ouvertes.fr/tel-01894734 Submitted on 12 Oct 2018 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Approche Orientee´ Modeles` pour la Suretˆ e´ et la Securit´ e´ des Systemes` Embarques´ These` de doctorat de l’Universite´ Paris-Saclay prepar´ ee´ a` Telecom ParisTech Ecole doctorale n◦580 Denomination´ (STIC) NNT : 2018SACLT002 Specialit´ e´ de doctorat: Informatique These` present´ ee´ et soutenue a` Biot, le 3 septembre` 2018, par LETITIA W. LI Composition du Jury : Prof. Philippe Collet Professeur, Universite´ Coteˆ d’Azur President´ Prof. Guy Gogniat Professeur, Universite´ de Bretagne Sud Rapporteur Prof. Maritta Heisel Professeur, University Duisburg-Essen Rapporteur Prof. Jean-Luc Danger Professeur, Telecom ParisTech Examinateur Dr. Patricia Guitton -
Hardware Mechanisms for Distributed Dynamic Software Analysis
Hardware Mechanisms for Distributed Dynamic Software Analysis by Joseph Lee Greathouse A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy (Computer Science and Engineering) in The University of Michigan 2012 Doctoral Committee: Professor Todd M. Austin, Chair Professor Scott Mahlke Associate Professor Robert Dick Associate Professor Jason Nelson Flinn c Joseph Lee Greathouse All Rights Reserved 2012 To my parents, Gail and Russell Greathouse. Without their support throughout my life, I would never have made it this far. ii Acknowledgments First and foremost, I must thank my advisor, Professor Todd Austin, for his help and guid- ance throughout my graduate career. I started graduate school with the broad desire to “research computer architecture,” but under Professor Austin’s watch, I have been able to hone this into work that interests us both and has real applications. His spot-on advice about choosing topics, performing research, writing papers, and giving talks has been an invaluable introduction to the research world. The members of my committee, Professors Robert Dick, Jason Flinn, and Scott Mahlke, also deserve special gratitude. Their insights, comments, and suggestions have immea- surably improved this dissertation. Together their expertise spans low-level hardware to systems software and beyond. This meant that I needed to ensure that any of my ideas were defensible from all sides. I have been fortunate enough to collaborate with numerous co-authors. I have often published with Professor Valeria Bertacco, who, much like Professor Austin, has given me invaluable advice during my time at Michigan. I am extremely lucky to have had the chance to work closely with Ilya Wagner, David Ramos, and Andrea Pellegrini, all of whom have continued to be good friends even after the high-stress publication process. -
Case Studies: Memory Behavior of Multithreaded Multimedia and AI Applications
Case Studies: Memory Behavior of Multithreaded Multimedia and AI Applications Lu Peng*, Justin Song, Steven Ge, Yen-Kuang Chen, Victor Lee, Jih-Kwon Peir*, and Bob Liang * Computer Information Science & Engineering Architecture Research Lab University of Florida Intel Corporation {lpeng, peir}@cise.ufl.edu {justin.j.song, steven.ge, yen-kuang.chen, victor.w.lee, bob.liang}@intel.com Abstract processor operated as two logical processors [3]. Active threads on each processor have their own local states, Memory performance becomes a dominant factor for such as Program Counter (PC), register file, and today’s microprocessor applications. In this paper, we completion logic, while sharing other expensive study memory reference behavior of emerging components, such as functional units and caches. On a multimedia and AI applications. We compare memory multithreaded processor, multiple active threads can be performance for sequential and multithreaded versions homogenous (from the same application), or of the applications on multithreaded processors. The heterogeneous (from different independent applications). methodology we used including workload selection and In this paper, we investigate memory-sharing behavior parallelization, benchmarking and measurement, from homogenous threads of emerging multimedia and memory trace collection and verification, and trace- AI workloads. driven memory performance simulations. The results Two applications, AEC (Acoustic Echo Cancellation) from the case studies show that opposite reference and SL (Structure Learning), were examined. AEC is behavior, either constructive or disruptive, could be a widely used in telecommunication and acoustic result for different programs. Care must be taken to processing systems to effectively eliminate echo signals make sure the disruptive memory references will not [4]. -
Ramp: Research Accelerator for Multiple Processors
..................................................................................................................................................................................................................................................... RAMP: RESEARCH ACCELERATOR FOR MULTIPLE PROCESSORS ..................................................................................................................................................................................................................................................... THE RAMP PROJECT’S GOAL IS TO ENABLE THE INTENSIVE, MULTIDISCIPLINARY INNOVATION John Wawrzynek THAT THE COMPUTING INDUSTRY WILL NEED TO TACKLE THE PROBLEMS OF PARALLEL David Patterson PROCESSING. RAMP ITSELF IS AN OPEN-SOURCE, COMMUNITY-DEVELOPED, FPGA-BASED University of California, EMULATOR OF PARALLEL ARCHITECTURES. ITS DESIGN FRAMEWORK LETS A LARGE, Berkeley COLLABORATIVE COMMUNITY DEVELOP AND CONTRIBUTE REUSABLE, COMPOSABLE DESIGN Mark Oskin MODULES. THREE COMPLETE DESIGNS—FOR TRANSACTIONAL MEMORY, DISTRIBUTED University of Washington SYSTEMS, AND DISTRIBUTED-SHARED MEMORY—DEMONSTRATE THE PLATFORM’S POTENTIAL. Shih-Lien Lu ...... In 2005, the computer hardware N Prototyping a new architecture in Intel industry took a historic change of direction: hardware takes approximately four The major microprocessor companies all an- years and many millions of dollars, nounced that their future products would even at only research quality. Christoforos Kozyrakis be single-chip multiprocessors, and that N Software -
Automotive Solutions Brochure
WIND RIVER AUTOMOTIVE SOLUTIONS The Software-Enabled Automobile Simplifying the Connected Car Software is a key differentiating factor for today’s automakers. It is critical to harnessing the opportunities of autonomous driving, creating the connected car, delivering unique driving and infotainment experiences, ensuring all-around safety, and generating new revenue streams from innovative applications. But automotive software is becoming increasingly complex, because it must Tackle complexity, increase support greater functionality to meet consumer expectations, address competitive pressures, integrate predictability, reduce costs, disparate platforms, and adapt quickly to the ever-accelerating rate of technological change, while maintaining compliance with safety and security requirements and remaining within cost targets. and speed time-to-production Software complexity, in turn, slows time-to-production and increases development costs, creating a for your automotive projects vicious cycle. with Wind River. For example, a high-end modern car has more than 100 million lines of code, 145 actuators, over 4,000 signals, 75 sensors, and more than 70 on-board computers analyzing 25 GB of data per hour. In addition, the car might have as many as 100 different electronic control units (ECUs) managing both safety-critical and non-safety-critical functions. The more complex systems become, the higher the risk that functions will interfere with each other or that one or more systems will fail. Connected cars provide a further example: employing V2X communications, they will be able to An experienced software integrator such as Wind River® can help automotive original equipment alert each other and the infrastructure to road hazards or impending collisions. But as cars become manufacturers (OEMs) and their Tier 1 suppliers manage complexity, alleviate risk, increase more dependent on wireless connectivity, both within the vehicles and externally, they become predictability, and shorten development time. -
Computer Architectures an Overview
Computer Architectures An Overview PDF generated using the open source mwlib toolkit. See http://code.pediapress.com/ for more information. PDF generated at: Sat, 25 Feb 2012 22:35:32 UTC Contents Articles Microarchitecture 1 x86 7 PowerPC 23 IBM POWER 33 MIPS architecture 39 SPARC 57 ARM architecture 65 DEC Alpha 80 AlphaStation 92 AlphaServer 95 Very long instruction word 103 Instruction-level parallelism 107 Explicitly parallel instruction computing 108 References Article Sources and Contributors 111 Image Sources, Licenses and Contributors 113 Article Licenses License 114 Microarchitecture 1 Microarchitecture In computer engineering, microarchitecture (sometimes abbreviated to µarch or uarch), also called computer organization, is the way a given instruction set architecture (ISA) is implemented on a processor. A given ISA may be implemented with different microarchitectures.[1] Implementations might vary due to different goals of a given design or due to shifts in technology.[2] Computer architecture is the combination of microarchitecture and instruction set design. Relation to instruction set architecture The ISA is roughly the same as the programming model of a processor as seen by an assembly language programmer or compiler writer. The ISA includes the execution model, processor registers, address and data formats among other things. The Intel Core microarchitecture microarchitecture includes the constituent parts of the processor and how these interconnect and interoperate to implement the ISA. The microarchitecture of a machine is usually represented as (more or less detailed) diagrams that describe the interconnections of the various microarchitectural elements of the machine, which may be everything from single gates and registers, to complete arithmetic logic units (ALU)s and even larger elements. -
Autonomous Vehicle Technology: a Guide for Policymakers
Autonomous Vehicle Technology A Guide for Policymakers James M. Anderson, Nidhi Kalra, Karlyn D. Stanley, Paul Sorensen, Constantine Samaras, Oluwatobi A. Oluwatola C O R P O R A T I O N For more information on this publication, visit www.rand.org/t/rr443-2 This revised edition incorporates minor editorial changes. Library of Congress Cataloging-in-Publication Data is available for this publication. ISBN: 978-0-8330-8398-2 Published by the RAND Corporation, Santa Monica, Calif. © Copyright 2016 RAND Corporation R® is a registered trademark. Cover image: Advertisement from 1957 for “America’s Independent Electric Light and Power Companies” (art by H. Miller). Text with original: “ELECTRICITY MAY BE THE DRIVER. One day your car may speed along an electric super-highway, its speed and steering automatically controlled by electronic devices embedded in the road. Highways will be made safe—by electricity! No traffic jams…no collisions…no driver fatigue.” Limited Print and Electronic Distribution Rights This document and trademark(s) contained herein are protected by law. This representation of RAND intellectual property is provided for noncommercial use only. Unauthorized posting of this publication online is prohibited. Permission is given to duplicate this document for personal use only, as long as it is unaltered and complete. Permission is required from RAND to reproduce, or reuse in another form, any of its research documents for commercial use. For information on reprint and linking permissions, please visit www.rand.org/pubs/permissions.html. The RAND Corporation is a research organization that develops solutions to public policy challenges to help make communities throughout the world safer and more secure, healthier and more prosperous. -
Certain Vision-Based Driver Assistance System Cameras, Components Thereof, and Products Containing the Same
In the Matter of CERTAIN VISION-BASED DRIVER ASSISTANCE SYSTEM CAMERAS, COMPONENTS THEREOF, AND PRODUCTS CONTAINING THE SAME 337-TA-907 Publication 4866 February 2019 U.S. International Trade Commission Washington, DC 20436 U.S. International Trade Commission COMMISSIONERS Meredith Broadbent, Chairman Dean Pinkert, Vice Chairman Irving Williamson, Commissioner David Johanson, Commissioner Rhonda Schmidtlein, Commissioner Address all communications to Secretary to the Commission United States International Trade Commission Washington, DC 20436 1,----- .______U.S. _____ International Trade Commission I Washington, DC 20436 www.usitc.gov In the Matter of CERTAIN VISION-BASED DRIVER ASSISTANCE SYSTEM CAMERAS, COMPONENTS THEREOF, AND PRODUCTS CONTAINING THE SAME 337-TA-907 Publication 4866 February 2019 UNITED STATES INTERNATIONAL TRADE COMMISSION Washington, D.C. 20436 In the Matter of Investigation No. 337-TA-907 CERTAIN VISION-BASED DRIVER ASSISTANCE SYSTEM CAMERAS, COMPONENTSTHEREOF,AND PRODUCTS CONTAINING THE SAME NOTICE OF THE COMMISSION'S DETERMINATION FINDING NO VIOLATION OF SECTION 337; TERMINATION OF THE INVESTIGATION AGENCY: U.S. International Trade Commission. ACTION: Notice. SUMMARY: Notice is hereby given that the U.S. International Trade Commission has found no violation of section 337 of the Tariff Act of 1930, 19 U.S.C. § 1337, in the above-captioned investigation, and has terminated the investigation. FOR FURTHER INFORMATION CONTACT: Amanda P. Fisherow, Office of the General Counsel, U.S. International Trade Commission, 500 E Street, S.W., Washington, D.C. 20436, telephone (202) 205-2737. The public version of the complaint can be accessed on the Commission's electronic docket (EDIS) at http://edis.usitc.gov, and will be available for inspection during official business hours. -
MOBILEYE What’S Next from CTO Amnon Shashua and His Benchmark ADAS Tech?
AUTOMOTIVE ENGINEERING! Argonne Labs’ nano-coating banishes friction, self-heals New sensor ICs critical for safety Nissan’s latest Titanic truck cab All eyes on MOBILEYE What’s next from CTO Amnon Shashua and his benchmark ADAS tech? March 2017 autoengineering.sae.org New eye on the road One of the industry’s hottest tech suppliers is blazing the autonomy trail by crowd-sourcing safe routes and using AI to learn to negotiate the road. Mobileye’s co-founder and CTO explains. by Steven Ashley With 15 million ADAS-equipped vehicles worldwide carrying Mobileye EyeQ vision units, Amnon Shashua’s company has been called “the benchmark for applied image processing in the [mobility] community.” mnon Shashua, co-founder and Chief image-processing ‘system-on-a-chip’ would be enough to reliably ac- Technology Officer of Israel-based Mobileye, complish the true sensing task at hand, thank you very much. And, it tells a story about when, in the year 2000, would do so more easily and inexpensively than the favored alternative he first began approaching global carmakers to radar ranging: stereo cameras that find depth using visual parallax. Awith his vision—that cameras, processor chips and software-smarts could lead to affordable advanced driver-assistance systems (ADAS) and eventually to zFAS and furious self-driving cars. Seventeen years later, some 15 million ADAS-equipped vehicles “I would go around to meet OEM customers to try worldwide carry Mobileye EyeQ vision units that use a monocular to push the idea that a monocular camera and chip camera. The company is now as much a part of the ADAS lexicon as could deliver what would be needed in a front-facing are Tier-1 heavyweights Delphi and Continental.