OS, Base & Bounds, Intro Instructor: Steven Ho Review

• Warehouse Scale Computers – Supports many of the applications we have come to depend on – Software must cope with failure, load variation, and latency/bandwidth limitations – Hardware sensitive to cost and energy efficiency • Request Level Parallelism – High request volume, each largely independent – Replication for better throughput, availability • MapReduce – Convenient data-level parallelism on large dataset across large number of machines – Spark is a framework for executing MapReduce algorithms

7/30/2018 CS61C Su18 - Lecture 22 2 Word Count in Spark’s Python API

// RDD: primary abstraction of a distributed collection of items file = sc.textFile(“hdfs://…”) // Two kinds of operations: // Actions: RDD → Value // Transformations: RDD → RDD // e.g. flatMap, Map, reduceByKey file.flatMap(lambda line: line.split()) .map(lambda word: (word, 1)) .reduceByKey(lambda a, b: a + b)

7/30/2018 CS61C Su18 - Lecture 22 3 MapReduce Word Count Example • Map phase: (doc name, doc contents) → list(word, count) // “I do I learn”” → [(“I”,1),(“do”,1),(“I”,1),(“learn”,1)] map(key, value): for each word w in value: emit(w, 1)

• Reduce phase: (word, list(count)) → (word, count_sum) // (“I”, [1,1]) → (“I”,2) reduce(key, values): result = 0 for each v in values: result += v emit(key, result)

7/30/2018 CS61C Su18 - Lecture 22 4 Word Count in Spark’s Python API

// RDD: primary abstraction of a distributed collection of items file = sc.textFile(“hdfs://…”) // Two kinds of operations: // Actions: RDD → Value // Transformations: RDD → RDD // e.g. flatMap, Map, reduceByKey file.flatMap(lambda line: line.split()) .map(lambda word: (word, 1)) .reduceByKey(lambda a, b: a + b)

7/30/2018 CS61C Su18 - Lecture 22 5 MapReduce Word Count Example • Map phase: (doc name, doc contents) → list(word, count) // “I do I learn”” → [(“I”,1),(“do”,1),(“I”,1),(“learn”,1)] map(key, value): for each word w in value: emit(w, 1)

• Reduce phase: (word, list(count)) → (word, count_sum) // (“I”, [1,1]) → (“I”,2) reduce(key, values): result = 0 for each v in values: result += v emit(key, result)

7/30/2018 CS61C Su18 - Lecture 22 6 Word Count in Spark’s Python API

// RDD: primary abstraction of a distributed collection of items file = sc.textFile(“hdfs://…”) // Two kinds of operations: // Actions: RDD → Value // Transformations: RDD → RDD // e.g. flatMap, Map, reduceByKey file.flatMap(lambda line: line.split()) .map(lambda word: (word, 1)) .reduceByKey(lambda a, b: a + b)

7/30/2018 CS61C Su18 - Lecture 22 7 MapReduce Word Count Example • Map phase: (doc name, doc contents) → list(word, count) // “I do I learn”” → [(“I”,1),(“do”,1),(“I”,1),(“learn”,1)] map(key, value): for each word w in value: emit(w, 1)

• Reduce phase: (word, list(count)) → (word, count_sum) // (“I”, [1,1]) → (“I”,2) reduce(key, values): result = 0 for each v in values: result += v b emit(key, result) a

7/30/2018 CS61C Su18 - Lecture 22 8 Agenda • OS Intro • Administrivia • OS Boot Sequence and Operation • Multiprogramming/time-sharing • Introduction to Virtual Memory

7/30/2018 CS61C Su18 - Lecture 22 9 CS61C so far… C Programs

#include

RISC-V Assembly int fib(int n) { return Project 3 fib(n-1) + .foo fib(n-2); lw t0, 4(s0) } CPU addi t1, t0, 3 beq t1, t2, foo nop Labs Project 2 Project 1

Caches

Memory

7/30/2018 CS61C Su18 - Lecture 22 10 So how is this any different?

Screen

Keyboard

Storage

7/30/2018 CS61C Su18 - Lecture 22 11 Adding I/O C Programs

#include

RISC-V Assembly int fib(int n) { return Project 3 fib(n-1) + .foo fib(n-2); lw t0, 4(s0) } CPU addi t1, t0, 3 beq t1, t2, foo nop Project 2 Project 1

Screen Keyboard Storage

Caches I/O (Input/Output)

Memory

7/30/2018 CS61C Su18 - Lecture 22 12 Raspberry Pi ($40 on Amazon)

Serial I/O CPU+$s, etc. (USB) Storage I/O Memory (Micro SD Card)

Network I/O Screen I/O (Ethernet) (HDMI)

7/30/2018 CS61C Su18 - Lecture 22 13 It’s a real computer!

7/30/2018 CS61C Su18 - Lecture 22 14 But wait… • That’s not the same! When we run Venus, it only executes one program and then stops. • When I switch on my computer, I get this:

Yes, but that’s just software! The (OS)

7/30/2018 CS61C Su18 - Lecture 22 15 Well, “just software”

• The biggest piece of software on your machine? • How many lines of code? These are guesstimates: 84 million lines of code!

Codebases (in millions of lines of code). CC BY-NC 3.0 — David McCandless © 2015 http://www.informationisbeautiful.net/visualizations/million-lines-of-code/

7/30/2018 CS61C Su18 - Lecture 22 16 What does the OS do? • One of the first things that runs when your computer starts (right after firmware/bootloader) • Loads, runs and manages programs: – Multiple programs at the same time (time-sharing) – Isolate programs from each other (isolation) – Multiplex resources between applications (e.g., devices) • Services: , Network stack, etc. • Finds and controls all the devices in the machine in a general way (using “device drivers”)

7/30/2018 CS61C Su18 - Lecture 22 17 Agenda • OS Intro • Administrivia • OS Boot Sequence and Operation • Multiprogramming/time-sharing • Introduction to Virtual Memory

7/30/2018 CS61C Su18 - Lecture 22 18 Administrivia • Proj4 due on Friday (8/03) – Project Party tonight, Soda 405/411, 4-6pm • HW6 due tonight, HW7 released • Guerilla Session on Wed. @Cory 540AB • The final will be 8/09 7-10PM @VLSB 2040/2060! • We’re almost there! :D

7/30/2018 CS61C Su18 - Lecture 22 19 Agenda • OS Intro • Administrivia • OS Boot Sequence and Operation • Multiprogramming/time-sharing • Introduction to Virtual Memory

7/30/2018 CS61C Su18 - Lecture 22 20 What happens at boot? • When the computer switches on, it does the same as Venus: the CPU executes instructions from some start address (stored in Flash ROM)

CPU

Memory mapped

0x2000: addi t0, x0, 0x1000 lw t0, 4(s0) …

(Code to copy firmware into regular memory and jump into it)

PC = 0x2000 (some default value) Address Space

7/30/2018 CS61C Su18 - Lecture 22 21 What happens at boot? • When the computer switches on, it does the same as Venus: the CPU executes instructions from some start address (stored in Flash ROM) 1. BIOS: Find a storage 4. Init: Launch an application device and load first that waits for input in loop sector (block of data) (e.g., Terminal/Desktop/...

2. Bootloader (stored on, e.g., disk): Load the OS kernel from disk into a location in memory 3. OS Boot: Initialize and jump into it. services, drivers, etc. 7/30/2018 CS61C Su18 - Lecture 22 22 Launching Applications • Applications are called “processes” in most OSs. • Created by another calling into an OS routine (using a “syscall”, more details later). – Depends on OS, but Linux uses fork (see OpenMP threads) to create a new process, and execve to load application. • Loads executable file from disk (using the file system service) and puts instructions & data into memory (.text, .data sections), prepare stack and heap. • Set argc and argv, jump into the main function.

7/30/2018 CS61C Su18 - Lecture 22 23 Supervisor Mode • If something goes wrong in an application, it can crash the entire machine. What about malware, etc.? • The OS may need to enforce resource constraints to applications (e.g., access to devices). • To protect the OS from the application, CPUs have a supervisor mode bit (also need isolation, more later). – You can only access a subset of instructions and (physical) memory when not in supervisor mode (user mode). – You can change out of supervisor mode using a special instruction, but not into it (unless there is an ).

7/30/2018 CS61C Su18 - Lecture 22 24 Syscalls • How to switch back to OS? OS sets timer interrupt, when trigger, drop into supervisor mode. • What if we want to call into an OS routine? (e.g., to read a file, launch a new process, send data, etc.) – Need to perform a syscall: set up function arguments in registers, and then raise software interrupt – OS will perform the operation and return to user mode • This way, the OS can mediate access to all resources, including devices, the CPU itself, etc.

7/30/2018 CS61C Su18 - Lecture 22 25 Syscalls in Venus • Venus provides many simple syscalls using the ecall RISC-V instruction • How to issue a syscall? – Place the syscall number in a0 – Place arguments to the syscall in the a1 register – Issue the ecall instruction • This is how your RISC-V code has been able to produce output all along • ecall details depend on the ABI (Application Binary Interface)

7/30/2018 CS61C Su18 - Lecture 22 26 Example Syscall

• Let’s say we want to print an integer stored in s3:

Print integer is syscall #1 li a0, 1 add a1, s3, x0 ecall

7/30/2018 CS61C Su18 - Lecture 22 27 Venus’s Environmental Calls

7/30/2018 CS61C Su18 - Lecture 22 28 Agenda • OS Intro • Administrivia • OS Boot Sequence and Operation • Multiprogramming/time-sharing • Introduction to Virtual Memory

7/30/2018 CS61C Su18 - Lecture 22 29 Multiprogramming • OS runs multiple applications at the same time. • But not really (unless have a core per process) • Switches between processes very quickly. This is called a “”. • When jumping into process, set timer interrupt. – When it expires, store PC, registers, etc. (process state). – Pick a different process to run and load its state. – Set timer, change to user mode, jump to the new PC. • Deciding what process to run is called scheduling.

7/30/2018 CS61C Su18 - Lecture 22 30 Protection, Translation, Paging • Supervisor mode does not fully isolate applications from each other or from the OS. – Application could overwrite another application’s memory. – Remember the linker in CALL: application assumes that code is in certain location. How to prevent overlaps? – May want to address more memory than we actually have (e.g., for sparse data structures). • Solution: Virtual Memory. Give each process the illusion of a full memory address space that it has completely to itself.

7/30/2018 CS61C Su18 - Lecture 22 31 Meet the Staff Emaan Sruthi Sean Trash TV Bachelor in Judge Judy Dr. Phil Show Paradise Favorite Breaking Bad Arrival Memento Plot Twist Best Bottom Floor of Bathroom 7th Floor Soda Stanley Hall Cory in Cal Best Study The VLSB Upper Floor of 1st Floor Moffitt Spot Library East Asian

6/21/2018 CS61C Su18 - Lecture 4 32 Agenda • OS Intro • Administrivia • OS Boot Sequence and Operation • Multiprogramming/time-sharing • Introduction to Virtual Memory

7/30/2018 CS61C Su18 - Lecture 22 33 Adding Disks to Hierarchy • Use VM as a mechanism to “connect” memory and disk in the memory hierarchy

7/30/2018 CS61C Su18 - Lecture 22 34 Memory Hierarchy

Regs Upper Level Faster Instr Operands L1 Cache Earlier: Caches Blocks L2 Cache Blocks Now: Memory Virtual Pages Memory Disk Files Tape Larger Lower Level 7/30/2018 CS61C Su18 - Lecture 22 35 Virtual Memory Goals • Allow multiple processes to simultaneously occupy memory and provide protection: Don’t let programs read/write each other’s memory • Give each program the illusion that it has its own private address space – Suppose code starts at address 0x00400000, then different processes each think their code resides at that same address! – Each program must have a different view of memory

7/30/2018 CS61C Su18 - Lecture 22 36 Virtual Memory Goals

• Next level in the memory hierarchy: – Provides program with illusion of a very large main memory: – Working set of “pages” reside in main memory - others reside on disk. • Also allows OS to share memory, protect programs from each other • Today, more important for protection vs. just another level of memory hierarchy • Each process thinks it has all the memory to itself • (Historically, it predates caches)

7/30/2018 CS61C Su18 - Lecture 22 37 Virtual to Translation

• Each program operates in its own virtual address space; ~only program running • Each is protected from the other • OS can decide where each goes in memory • Hardware gives virtual physical mapping

38 Dynamic Address Translation

Location-independent programs Programming and storage management ease ⇒ need for a base register prog1 Protection Independent programs should not affect each other inadvertently ⇒ need for a bound register Multiprogramming drives prog2 requirement for resident supervisor

(OS) software to manage context Physical Memory switches between multiple OS programs 7/30/2018 CS61C Su18 - Lecture 22 39 Modern Virtual Memory Systems Illusion of a large, private, uniform store Protection OS several programs, each with their private address space and one or

more shared address spaces progi

Demand Paging Swapping Provides the ability to run programs Store larger than the primary memory Primary Memory Hides differences in machine configurations

The price is address translation on each memory reference mapping VA PA TLB 7/30/2018 CS61C Su18 - Lecture 22 40 Analogy: Shopping at IKEA • Furniture name like virtual address • Actual warehouse location like physical address • IKEA shopping list like —you write mappings from furniture name to location • On shopping list, whether the item is sold out like valid bit indicating in main memory vs. on disk • Whether you can flop on a bed, draw on chalk board, turn lights off/onlike access rights

41 Simple Example: Base and Bound Reg

42 Simple Base and Bound Translation

Segment Length

Bound Bounds Register ≤ Violation?

Physical current Address Load X Logical segment Address +

Base Physical Memory Register Base Physical Address Program Address Space Base and bounds registers are visible/accessible only when processor is running in supervisor mode

7/30/2018 CS61C Su18 - Lecture 22 43 Separate Areas for Program and Data (Scheme used on all Cray vector supercomputers prior to X1, 2002)

Bounds Data Bound ≤ Register Violation? data Mem. Address Logical Load X Register Address segment Data Base Physical

Register + Address

Program Main Memory Program Bound Bounds Address Register ≤ Violation? Space Logical Program Counter program Address segment Program Base Physical

Register + Address

What is an advantage of this separation?

7/30/2018 CS61C Su18 - Lecture 22 44 “Bare” 5-Stage Pipeline

Physical Physical P Address Inst. Address Data D Decode E + M W C Cache Cache

Physical Memory Controller Physical Address Address Physical Address

Main Memory (DRAM)

• In a bare machine, the only kind of address is a physical address

7/30/2018 CS61C Su18 - Lecture 22 45 Base and Bound Machine

Prog. Bound Data Bound Register Bounds Violation? Register Bounds Violation? ≤ ≤ Logical Logical Address Address

Data P Inst. D Decode E + M W C + Cache + Cache Physical Physical Address Address Program Base Data Base Register Register Physical Physical Address Address Memory Controller

Physical Address

Main Memory (DRAM)

7/30/2018 CS61C Su18 - Lecture 22 46 Memory Fragmentation free Programs 4 & 5 Programs 2 & 5 start OS end OS OS Space Space Space 16K prog 1 16K prog 1 BIG IDEA: prog 1 16K 24K prog 2 24K prog 2 USE RAM AS $$ 24K prog 4 16K 24K prog 4 16K 8K FOR DISK 8K 32K prog 3 32K prog 3 prog 3 32K

24K 24K prog 5 24K

AsWhat programs if we want start to and run end,process memory 6, and becomes we need 32K of fragmented.space?! Therefore, if we ever need a large chunk of memory, programs will need to be moved.

7/30/2018 CS61C Su18 - Lecture 22 47 Question: What kind of cache should memory be?

(A) Direct Mapped, write back/write allocate

(B) Direct Mapped, write through/no write allocate

(C) Fully Associative, write back/write allocate

(D) Fully Associative, write thorugh/no write allocate

48 Question: What kind of cache should memory be?

(A) Direct Mapped, write back/write allocate

(B) Direct Mapped, write through/no write allocate

(C) Fully Associative, write back/write allocate

(D) Fully Associative, write through/no write allocate

49 Summary

• The role of the Operating System – a computer: BIOS, bootloader, OS boot, initialization • Base and bounds for multiple processes – Simple, but doesn’t give us everything we want • Virtual memory bridges memory and disk – Provides illusion of independent address spaces to processes and protects them from each other

7/30/2018 CS61C Su18 - Lecture 22 50