Design and Optimization of Barium Strontium Titanate
Total Page:16
File Type:pdf, Size:1020Kb
DESIGN AND OPTIMIZATION OF BARIUM STRONTIUM TITANATE FERROELECTRIC VARACTORS Thesis Submitted to The School of Engineering of the UNIVERSITY OF DAYTON In Partial Fulfillment of the Requirements for The Degree of Master of Science in Electrical Engineering By Hailing Yue Dayton, Ohio December, 2012 DESIGN AND OPTIMIZATION OF BARIUM STRONTIUM TITANATE FERROELECTRIC VARACTORS Name: Yue, Hailing APPROVED BY: Guru Subramanyam, Ph.D. Monish Chatterjee, Ph.D. Advisory Committee Chairman Committee Member Professor and Department Chairperson Professor School of Engineering School of Engineering Robert Penno, Ph.D. Committee Member Professor School of Engineering John G. Weber, Ph.D. Tony E. Saliba, Ph.D. Associate Dean Dean, School of Engineering School of Engineering & Wilke Distinguished Professor ii ABSTRACT DESIGN AND OPTIMIZATION OF BARIUM STRONTIUM TITANATE FERROELECTRIC VARACTORS Name: Yue, Hailing University of Dayton Advisor: Dr. Guru Subramanyam Barium-Strontium-Titanate(BST) thin film based varactors are designed at specific capacitances under 0V dc bias on CMOS compatible low-resistivity silicon substrate. The BST varactor device operation is based on the nonlinear dielectric tunability of BST thin film sandwiched between two metal layers in a revised conductor- backed coplanar waveguide(CBCPW) transmission line configuration. The varactor capacitance at 0V dc bias is determined by the overlap area between the CPW signal line in the top metal electrode and a tapered shunt line in the bottom electrode. Therefore a series of devices with fixed 0 V capacitances ranging were designed and fabricated based on changing their corresponding overlap areas according to the original parallel plate capacitance equation. A schematic model is also utilized to extract the designed and measured capacitances. The relationship between the sizes of overlap areas and the extracted capacitances from the electromagnetic and schematic models is demonstrated by a reasonable agreement with the experimental measurements from fabricated devices. iii DEDICATION Dedicated to my husband, Jian Gao, my son, William Gao, and my parents, Han Yue and Mei Xu. iv ACKNOWLEDGEMENTS First and foremost I offer my sincerest gratitude to my advisor, Dr. Guru Subramanyam, who has supported me throughout my graduate study with his patience and knowledge whilst allowing me the room to work in my own way. I attribute the level of my Master’s degree to his advice, insight, encouragement and effort. In my daily work I have been blessed with a friendly and cheerful group of fellow colleagues. In the laboratory I have been aided for almost two years in running the Vector Network Analyzer by Henry Zhang, a fine technician who always offers the detailed and accurate measurement data. Dustin Brown and Mark Patterson tutored me in how to design and optimize the devices and to analyze the data from them by integrating the microwave theory into the AWR simulating software. I was also educated in the use of Pulsed Laser Deposition(PLD) system under their guidance. I also would like to thank Dustin, Mark and other the working staff in AFRL who provided the supplies as well as the effort in fabricating the samples for my research work. My committee members, Professor Monish Chatterjee and Professor Robert Penno, lectured me on the theory of electromagnetics, transmission lines and waveguide, and digital communications, which stabilized my academic background and assisted me in exploring advanced agile microwave devices related to my research. v The Department of Electrical Engineering in University of Dayton has provided the support and equipment I have needed to produce and complete my thesis and funded my studies. Finally, I thank my parents, parents-in-law, and my husband for supporting me all my studies at University of Dayton at all possible angles. vi PREFACE Silicon based transistors with fast transit times and high oscillation frequencies makes it possible to develop Monolithic Microwave ICs (MMICs) for frequencies up to 100GHz. Along with transistors, varactors are one of the most widely used components used in microwave technology for analog tuning purposes. Today no semiconductor varactors with high enough Q-factor and tuneability are available for frequencies above 10GHz.The Q-factor of the semiconductor varactors decrease significantly with the increased frequency. This gap can be filled by the ferroelectric varactors. Considerable progress has been achieved in tunable permittivity ferroelectrics in developing ferroelectric varactors with performance better than semiconductor analogs at the high frequency range. The work described in this thesis responds to the need of the MMIC compatible ferroelectric varactors with optimized performances (improved Q, high isolation, low insertion loss) at high frequencies. vii TABLE OF CONTENTS ABSTRACT .................................................................................................................................... iii DEDICATION ................................................................................................................................ iv ACKNOWLEDGEMENTS ............................................................................................................. v PREFACE ...................................................................................................................................... vii LIST OF ILLUSTRATIONS .......................................................................................................... xi LIST OF TABLES ....................................................................................................................... xvii CHAPTER 1 INTRODUCTION ..................................................................................................... 1 1.1 Scope ...................................................................................................................................... 6 1.2 Outline ................................................................................................................................... 7 CHAPTER 2 EXISTING VARACTOR TECHNOLOGIES ........................................................... 8 2.1 RF-MEMS Varactors ............................................................................................................. 9 2.2 Semiconductor Varactor Diodes .......................................................................................... 12 2.3 Ferroelectric Varactors ......................................................................................................... 16 2.4 Conclusion ........................................................................................................................... 18 2.5 Ferroelectric Varactors in this Work .................................................................................... 18 CHAPTER 3 FERROELECTRIC MATERIALS .......................................................................... 19 3.1 Basics of Ferroelectric Material ........................................................................................... 19 3.1.1 Applications in Ferroelectric (polar) Phase................................................................... 21 3.1.2 Applications in Paraelectric (non-polar) Phase ............................................................. 22 3.2 Figure of Merits ................................................................................................................... 23 viii 3.3 Barium Strontium Titanate .................................................................................................. 24 CHAPTER 4 FABRICATION OF THIN FILM FERROELECTRIC VARACTORS ................. 27 4.1 Thin Film Processing Using Pulse Laser Deposition ........................................................... 27 4.2 Thin Film Device Processing ............................................................................................... 29 4.3 Electrodes Selection ............................................................................................................. 30 4.4 Electrode Patterning ............................................................................................................. 30 4.4.1 Lift-off Route ................................................................................................................ 30 4.4.2 Wet/dry Etching Route ................................................................................................. 31 4.5 Substrate Micromachining and Passivation ......................................................................... 31 4.5.1 Common Substrates ...................................................................................................... 32 4.5.2 Low-resistivity Silicon as a Substrate .......................................................................... 33 4.5.3 Metal-semiconductor Ohmic Contacts Formation ........................................................ 35 CHAPTER 5 CB-CPW BASED THIN FILM VARACTOR DESIGN ........................................ 40 5.1 Parallel Plate Varactor Design ............................................................................................. 40 5.2 Coplanar Plate (CPW) Varactor Design .............................................................................. 41 5.3 Conductor Backed Coplanar Waveguide (CBCPW) Varactor Design ................................ 43 5.4 Finalized Coplanar Waveguide (CPW) Parallel Plate Varactor Design ............................. 44 5.5 Concept to Proof .................................................................................................................