Rasit Onur TOPALOGLU

University of California San Diego Computer Science & Engineering Department 9500 Gilman Drive Dept. Mail Code: 0114 92093-0114 La Jolla/CA Phone: 858 3662301 Email: [email protected] URL: www-cse.ucsd.edu/users/~rtopalog

RESEARCH INTERESTS RF integrated circuit design (distributed amplifiers, LC filters and LNAs); Mixed-signal design (filters, VCOs, PLLs, Delta-Sigma modulators, high speed ADCs and DACs); Mismatch modeling and test for ADCs, DACs and PLLs; CAD tool design and simulation for electronic circuits; Mixed-signal behavioral modeling; test, DFT and BIST; Design for manufacturability; TCAD tool design for process variations; Physical modeling and device characterization; Design process porting and evaluation; Digital design

OBJECTIVES/ SHORT-TERM GOAL I will be transferring to EE department and continue my PhD on RF distributed amplifier and distributed oscillator design with Prof. Walter Ku starting 2006 January. Until then, I am looking for an RF design intern or co-op opportunity beginning July 1st to the end of December.

LONG-TERM GOAL My long term goal is to combine my eagerness, intuition, intelligence, interest in learning new things, my work-devoted nature, problem solving capabilities and innovative thinking; with the experience and support of a high-tech company or university to conduct research and invent new frontiers in the science and technology world. I want this to the extent that I want to see my inventions influence and possibly improve, either explicitly or implicitly, a large percentage of people in the world.

EDUCATION & COURSES (September 2002-2007), Ph.D. student, Computer Eng., University of California (concentration on CAD for microelectronics) GPA: 3.82 I have worked in Reliable System Synthesis Lab as a Research Assistant Related courses: Advanced Analog IC Design (ADCs, DACs, PLLs), RF Circuit Design (LNAs, mixers), Microwave design with GaAs, VLSI Test, VLSI Circuit Simulation, VLSI CAD, Artificial Intelligence, Statistical Learning, Noise in Circuits, Computer Architecture, Computation, Stochastic Modeling, Compilers, Operating Systems, Neural Networks, Algorithms, Communication Network Design, VLSI Testing Seminars (also see below the courses I took at Bogazici University)

(September 1998-June 2002), B.S., Electrical and Electronics Engineering, Bogazici University, Istanbul, Turkey GPA: 3.54 (over 4.0) Class Rank: 6 (over 50) Rank Among All Engineering Fields: 21 (over 300) Degree: High Honor Related Courses: Microwave design, Analog IC design, MEMS, Semiconductor Modeling, Solid State Electronics Devices, Advanced Digital Design, Advanced VLSI Design, Communication Electronics, Math. Methods in Engineering, Numerical Methods, System Control, Communication Eng., Electronics I-II, Electromagnetic Field Theory, Probability, Signals & Systems, HW-SW Co-design and Scheduling Algorithms, DSP, Physical Electronics, all other basic electrical engineering courses, System Programming, Data Structures- some of these are graduate level courses

WORK EXPERIENCE Qualcomm, San Diego Interim Engineering Intern in QCT RF Department, 2005 Working under supervision of: Seyfi Bazarjani Work Experience: test cost reduction, BIST and DFT implementation for analog circuits; analog design

National Semiconductor, Santa Clara Engineering Coop in CAD Group, 2004 summer Worked under supervision of: Dennis Lau, Hosam Haggag Work Experience: Process variation modeling; analog modeling (I have developed and incorporated a process variation model in the static timing analysis tool PrimeTime; I have developed a novel methodology to test a PLL)

Qualcomm, San Diego Interim Engineering Intern in QCT Department, 2003 summer Worked under supervision of: Rich Nagle, Michael Leisne Work Experience: Analog behavioral modeling (I have developed hierarchical Verilog-A models for their latest base- band analog chip to ensure fast mixed-signal verification and test)

University of California San Diego Graduate Research Assistant, 2002-2005. Advisor: Prof. Alex Orailoglu Research on analog and RF mismatch modeling; design for testing of analog and RF circuits, simulation, CAD tool design, optimization Research on distributed amplifiers, LC filters, analog integrators and circuit simulation with Prof. Walter Ku and Bang-sup Song. Refereed papers for a number of design automation and VLSI conferences and proposals for NSF (National Science Foundation)

University of California San Diego Graduate Teaching Assistant, 2003 summer and 2005 winter Teaching Experience: Digital Design (Problem solving classes, office hours, grading)

Bogazici University, Istanbul, Turkey Research with Prof. Oguzhan Cicekoglu Research on "Design and verification for current mode analog filters"

Bogazici University, Istanbul, Turkey Research with Prof. Gunhan Dundar Research on "Analog VLSI CAD, fast simulators" Bogazici University, Istanbul, Turkey Student Teaching Assistant, 2002 Teaching Experience: Electronic Circuits I Instructor: Prof. Gunhan Dundar (Homework grading, lab assistance for SPICE simulations)

Alcatel Microelectronics Research Dept., Istanbul, Turkey, Summer 2002 Attended training on System C design language Implemented and tested circuits in System C (parallel encoder, decoder, interleaver, de-interleaver block with communication buffers) Attended training on VHDL Implemented, synthesized and verified circuits in VHDL

Alcatel Manufacturing Department, Istanbul, Turkey, Summer 2001 Research Experience: Experience in control and testing of circuit fabrication and manufacturing

Nortel Networks Research and Development Dept., Istanbul, Turkey, Summer 2000 Research Experience: Attended SDH (Synchronous Digital Hierarchy) course Learned techniques for implementing this technology in software

PROPOSALS I have written a research proposal on mismatch and process variations in RF circuits. It has been accepted and SRC (Semiconductor Research Corporation) agreed to provide 3 years of full-time funding for 2 graduate students.

PUBLICATIONS Mixed-Signal DFT and Diagnosis Papers:

R. O. Topaloglu, A. Orailoglu, A DFT Approach for Diagnosis and Process Variation-Aware Structural Test of Thermometer Coded Current Steering DACs, to appear in Proceedings of DAC, 2005

R. O. Topaloglu and A. Orailoglu; Test of Mismatch; SRC Deliverable Report; 19-Nov-2003; (Pub P007660); Task 906.001

Mismatch and Process Variation Modeling and CAD papers:

R. O. Topaloglu, A. Orailoglu, Forward Discrete Probability Propagation as a Non-Parametric and Deterministic Means for Device Performance Characterization, to appear in Proceedings of ASP-DAC, 2005

R. O. Topaloglu and A. Orailoglu; Developments on Mismatch Measurements and Simulations for High Level Blocks, SRC Deliverable Report; 04-Oct-2004 (Pub P010266); Task 906.001

R. O. Topaloglu and A. Orailoglu; Development of First Order Sensitivity Functions for Mismatch; SRC Deliverable Report; 05-Aug-2004; (Pub P009752); Task 906.001 R. O. Topaloglu, A. Orailoglu, On Mismatch in the Deep Sub-micron Era: From Physics to Circuits, in Proceedings of ASP-DAC, 2004

R. O. Topaloglu, A. Orailoglu; On Mismatch in the Deep Sub-Micron Era; SRC Deliverable Report; 16-Jul-2003; (Pub P006380); Task 906.001

Analog Design Papers:

R. O. Topaloglu, H. Kuntman, O. Cicekoglu, Current-Input Current- Output Notch and Bandpass Analog Filter Structures as Alternatives to Active-R Circuits, Frequenz, vol. 57, Nr. 5-6, pp. 123-127, 2003

R. O. Topaloglu, H. Kuntman, O. Cicekoglu, Novel Notch and Bandpass Filter Structures Using OTAs and OPAMPs, Proceedings of the International Conference on Electrical and Electronics Engineering, ELECO'2001, pp. 63-67, Bursa-Turkey, 7-11 November 2001

PROFESSIONAL PRESENTATIONS

Design Automation Conference, A DFT Approach for Diagnosis and Process Variation-Aware Structural Test of Thermometer Coded Current Steering DACs, 2005

Synopsys User Group Conference, The ABOVE (Angle-Based On-Chip Variation Estimation) Technique for a Process Variation-Immune Design, 2005

ICSS Circuit Contract Review for SRC, Focused Test of Mismatch, Ohio, 2004

ICSS Circuit Contract Review for SRC, Forward Discrete Probability Propagation for Modeling Process Variations, Ohio, 2004

IEEE International Electrical Engineers Conference (ELECO), On Current Mode Filters, Bursa, Istanbul, 2001

UNPUBLISHED PROJECTS 12 dB gain , 6dB NF, 0-50 GHz Distributed Amplifiers in 90nm SOI CMOS and 0.25um PHEMT, Rasit Onur Topaloglu and Walter Ku

ERDOGAN E. S., TOPALOGLU R., O., CICEKOGLU O., KUNTMAN H., New Current-Mode Special Function Continuous Time Active Filters Employing only OTAs and OPAMPs, provisionally accepted to International Journal of Electronics

ERDOGAN E.S., TOPALOGLU R., CICEKOGLU O., KUNTMAN H., MORGUL A., Novel Multiple Function Analog Filter Structures and a Dual-Mode Multifunction Filter

TOPALOGLU R., O., BASKAYA F., DUNDAR G., An Analog Circuit Performance Estimation Methodology and its Application to a Simple Circuit

AWARDS/RECOGNITION Ranked 145th in the Turkish Republic National University Entrance Examination taken among 3,000,000 students each year, 1997

I have been offered full scholarship by OSYM (Turkish Governmental Education Office) to study abroad in USA during undergraduate studies (and potentially up to completing Ph.D.)

Graduated with high honor in 21th overall rank in engineering school

I have been offered a Texas Instruments Fellowship in 2002

UCSD CSE departmental fellowship, 2002

Mat-Fen Fellowship: 1995-1997 (a private educational organization in Turkey)

In high school, 15 High Honor Certificates

Citywide high-school chess championship cup winner, Kirklareli, TURKEY

PERSONAL TRAITS Good in team work, creative intelligence, independent thinker, assiduous and eager to learn new things all the time. Dedicated to conducting research Productive and innovative Always want to use my brain, yet patient for tedious works Calm to unexpected situations Ability to observe & analyze problems at a high level and relate them to low levels to solve them efficiently and accurately Consistently being recommended as a role model to my peers during my undergraduate years by many professors including ex department chair, Prof. Yorgo Istefanopulos at Bogazici University Adventurous, nature lover Loves the momentary, yet momentous pleasures that follow hard and long work

COMPUTER SKILLS Programming languages: C(proficient), C++, JAVA, Assembly(Intel 8086, Sparc, Qualcomm DSP), C#, ML Hardware & system description languages: VHDL and VHDL- AMS(proficient), Verilog-A (proficient), System C (experienced), HSPICE (proficient), SPICE, Awanwaves, ADS (experienced), IC layout (Magic, Irsim), strong familiarity with the Cadence(experienced in Analog Design Env.), Mentor and Synopsis tools, PrimeTime (experienced), Astro Operating Systems: UNIX( Linux, Solaris), Windows(NT) Other Applications: MATLAB, Mathematica, Maple TOEFL: Score: 280/300 (corresponds to 652 in paper based exam) GRE Score : Analytic : 790/800 Quantitative : 800/800 Verbal : 390 +Strong mathematics, physics and engineering background