Examination questions

Microelectronics and Technology

2006 Fall semester

1. Main characteristics of IC technology. Wafer, chip, masks, feature size, self- alignment. Yield, cost factors. Encapsulation. Roadmaps and main trends.

2. IC technology: forming the depth structure. Fabrication of single crystal layers with epitaxial layer growing. Diffusion and the basic equations. Oxidation, deposition and removal of layers. Ion implantation. Vacuum evaporation, sputtering, and realisation of metal interconnections.

3. Forming the surface structure. Lithography, masking. Steps in the oxide, planarity. The main steps in the fabrication of MOS integrated circuits.

4. The elements of MOS integrated circuits. Poly-Si gate MOS transistor (enhancement and depletion types). Layout, depth structures. Steps in the fabrication technology.

5. Realisation of capacitors in MOS ICs: the poly-oxide-Si arrangement. Electrical properties, examples for application. Interconnection lines in ICs. Properties, resistance, fringing capacitance, orders of magnitudes. Pulse transfer, delay.

6. Elements of bipolar integrated circuits. Isolation, realisation of resistors and capacitors. Value rangers, calculation of electrical parameters.

7. Cross-section of the bipolar IC npn transistor. Electrical parameters, technological steps of fabrication. Elimination of current crowding. IC pnp transistors: lateral and vertical solutions. The sector transistor. Layout of the multiemitter transistor.

8. Basics of digital integrated circuits. Rudiments of the inverter. Transfer characteristics, the inverter logic threshold voltage. Layout arrangements. Comparison of inverters.

9. Passive load NMOS logical circuits. Design questions layout versions. Complex gates and their advantages.. 10. The CMOS inverter. Transfer characteristics, mutual conduction. Dynamic power consumption, transient properties. Versions, main features, layout. Comparison with other logic families.

11. Calculation of the inverter switching times in the case of capacitive load. Signal delays orders of magnitudes. Comparison of inverter types from the point of view of switching times. The ring oscillator as a measuring circuit. The power-delay product.

12. NMOS and CMOS line and bus driver circuits. Realisation of tri-state outputs. Operation of the transfer gate. Transfer gates in NMOS and CMOS circuits.

13. Forming CMOS logical gates. Various realisations and their comparison.

14. Dynamic CMOS circuits. Precharging. Clock controlled CMOS, pseudo NMOS, CMOS domino logic. 4 phase dynamic inverter.

15. RS flip-flop in NMOS and CMOS realization. Different realizations of D flip-flops (static, with transfer gate, dynamic, etc.) Master-slave flip-flops.

16. Realization of multiplexers, adders and combinational multipliers.

17. Classification of memories. Typical structure of a memory chip. ROM memories. Bipolar mask programmed ROM, burnt in PROM.

18. Structure, operation and layout of mask programmed MOS ROMs. EPROM and EEPROM memories. Comparison of the characteristic data.

19. Structure of a memory chip. Bipolar and MOS static RAM memory cells. Cell size, integration density and maximal bit capacity. Comparison of the characteristic data.

20. Dynamic MOS RAM memories. Structure and operation of the one- transistor memory cell. The problem of charge share between the cell and the bit line. Refreshing. Cell size, integration density and max. bit capacity. Realisation of the capacitances.

21. Classification of integrated circuits. Main features of the different IC realisations.

22. Application specific integrated circuits. The most important types. Structure, design, advantages and disadvantages of the gate array circuits.

23. Application specific integrated circuits. Structure, advantages and disadvantages of standard cell circuits. The cell library. 24. The structure, operation and application of programmable logic devices (PLA, PLD, EPLD, FPGA). Advantages and disadvantages.

25. Design of integrated circuits. The need and possibility of using IPs. The main characteristics of IC design.

26. Computer aided design of integrated circuits. The design hierarchy. Steps of the top-down design.

27. The way of hardware definition. Characterise the most important hardware description languages.

28. The automated design: silicon compilers. The steps of logic synthesis. Design rule checking.

29. Testing integrated circuits. Design for testability, scan design, built-in self test and boundary scan.