HIGH PERFORMANCE

Measure specific parameters of an IEEE 1394 interface with Time Domain Reflectometry. Michael J. Resso, Hewlett-Packard and Michael Lee, Zayante

Evaluating Signal Integrity of IEEE 1394 Physical Layer with Time Domain Reflectometry, Part 2

he data rates of today’s high- LED Display speed digital systems are T rapidly increasing. New seri- RAM al data communication standards 1394 Link Glue ROM ROM such as IEEE 1394 (FireWire) are logic being developed that push the Power gigabit per second limit and Analyzer beyond. Cables, interconnects, logic

PCBs, and silicon behave much Phy PowerPC differently as rise times in the sub- nanosecond regime become com- JTAG monplace. Extreme challenges are presented to the digital designer as RS-232 Port various physical layer components IEEEE 1394 Logic Analyzer Interface create signal integrity problems Serial Bus under these extreme conditions. TDR Controlling the impedance environ- Computer TDR Launch Logic Control ment of the FireWire physical layer Fixture is now paramount to assuring that a design meets functional require- Figure 1. The basic components of the IEEE 1394 TDR test setup. ments. By using Time Domain Reflectometry (TDR), the maxi- mum amplitude of reflection can Focus on the Physical Layer specification. This ensures that a be measured directly to certify particular device does not load The IEEE 1394 compliance mea- compliance with the 1394 standard. down the bus excessively. surements described here focus on The basics of TDR were pre- The IEEE 1394-1995 standard is the physical layer silicon chip, sented in the first part of this written from the perspective of referred to as the PHY chip, and article (Insight, Volume 4, Issue 2, the cable looking into the trans- the transceiver board into which it 1999, page 22). This part describes ceiver. Two different input imped- is mounted. The 1394 transceiver methods of using TDR to measure ance measurements are made: one board has two differential signal the input impedance, input capaci- when the transceiver is in transmit pairs called TPA and TPB. To com- tance, and jitter of an IEEE 1394 mode and another when it is in ply with the standard, both TPA interface. receive mode. The transceiver is and TPB must conform to the spec- in transmit mode when it is in the ification while in transmit mode process of driving a 1b or 0b. It is and receive mode. They must also in receive mode when it is not dri- comply with an input capacitance ving and is in an idle state. Signal

4 Volume 4 • Issue 3 • 1999 pairs TPA and TPB are very differ- equal in magnitude and opposite in imbalance can occur in the FireWire ent and therefore both need to be polarity, thereby creating a differen- cable media are if the individual tested. The TPA pair on the trans- tial stimulus as normally seen by the legs are not symmetrically twisted ceiver drives TPBias and has a small transceiver data-transport pairs. The or if one line has a larger gauge current source called Icd. The TPB oscilloscope is set up to receive the wire. Three ways imbalance can pair has only the termination resis- differential response to the differen- occur on a printed circuit board tors and a 270-pF capacitor in paral- tial stimulus. It is also possible to are if there is a ground-plane dis- lel to ground. All of the external ter- configure the stimulus and/or continuity under one leg and not mination components on both TPA response as common mode instead the other, if one microstrip leg is and TPB exist common mode only, of differential. This equipment flexi- thicker than the other, or if the an important design feature that bility results in a test matrix that dielectric material in the board is enables the balanced differential cir- can lead to valuable insights into not homogeneous. cuit topology. This also allows the the Device Under Test (DUT). We chose the second method method of measuring a differential For the first method of measuring described in the standard to mea- circuit using the single-ended TDR input impedance, the oscilloscope is sure the input impedance of the test techniques discussed later. in a mode in which it measures dif- FireWire transceiver. In this case, ferential impedance directly by the requirement is measured in using its impedance extraction algo- terms of the maximum amplitude of Standard Dictates the Input rithm firmware. The vertical units reflection from the DUT. When the Impedance are changed from millivolts to vertical units are changed from mil- The 1394 standard dictates an input ohms, and the waveform markers livolts to percent reflection on the impedance specification for both are placed at the appropriate posi- oscilloscope, the amplitude of the TPA and TPB. It states that for all tion on the DUT. The differential reflection coefficient (Rho), is mea- devices the differential input imped- impedance is then read directly sured. If the waveform markers are ance should be between 109 and from the marker table on the oscil- put at the proper position, the mea- 111 Ω when in receive mode and loscope display. Two single-ended surement can be read numerically between 105 and 111Ω when in lines with a characteristic imped- from the oscilloscope display. The transmit mode. Two methods are ance of 50 Ω should yield a differ- 1394 standard states that for a trans- proposed by the standard to verify ential impedance of 100 Ω , assum- ceiver capable of S400 speeds, the the input impedance compliance of ing a perfectly balanced differential amplitude of reflection must be less TPA and TPB. Both methods use system. However, if the data trans- than 21.4 percent; for an S200-capa- Differential TDR to accomplish this port lines of the FireWire transceiv- ble transceiver, it must be less than measurement. With Differential er are not perfectly balanced, possi- 37.4 percent; and for an S100-capa- TDR, the TDR step generators bly due to impedance discontinuties ble transceiver, it must be less than inside the oscilloscope launch two on one line and not the other, the 48.0 percent. fast edges (one into each leg of the differential impedance would not be twisted pair). The two edges are the expected 100 Ω . Two ways

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Naturally, the fastest edge results in the largest reflection, so the waveform with the highest-ampli- tude reflections is the one with the 35-ps rise time. The 500-ps and 1-ns waveforms yield reflections with correspondingly smaller amplitudes.

Measuring Input Capacitance A second compliance test is trans- ceiver input capacitance. As with the input impedance specification, different-speed transceivers have different performance require- ments. The maximum input capaci- tance for S400 is 4 pF; for S200, it is Figure 2. The measurements of input impedance of PHY #1 TPB Port were obtained using the amplitude of reflection method. 7 pF; and for S100, it is 9 pF. For this measurement, we used a TDR step with a 200-mV amplitude and a Rise Time Measurement connectors are characterized in 1-ns rise time, the fastest allowed the time domain. A gigabit The 1394-1995 standard dictates by the 1394-1995 standard. Using FireWire copper interconnect the worst-case rise time for a data this fastest allowable rise time would need to exhibit a low pulse to be 1 nanosecond. In order again provides the worst-case sce- reflection coefficient when a very to measure the 1394 transceiver’s nario for reflections from imped- fast rise-time edge is launched response to this worst-case rise ance discontinuities: The faster the into it. Even if the whole package time, a novel variable-rise-time rise time, the larger the amplitude passes the 1394 standard, its sig- test methodology was implement- of the reflection. This test shows nal integrity can be improved by ed. A bandwidth-limiting math what structure in the physical layer pinpointing discontinuities using function allows the transceiver’s causes the most problems for sig- the fastest edge speed. response to a faster or slower nal integrity. The input capacitance The measurement of input edge to be simulated in software specification is written to address impedance (of PHY #1 TPB Port in by the oscilloscope. This method the complete FireWire termination this case) is shown in Figure 2. has proven very useful because it network: not only the physical sili- The measurements were obtained indicates how much a specific con chip, but also the cable, con- using the amplitude of reflection discontinuity will contribute to nector, printed circuit board, and method. There are two simulated overall signal integrity at real- termination devices. waveforms and one real wave- world speeds. For example, if an Normalization is a TDR mea- form. The two simulated wave- S100 FireWire board is running at surement technique that allows forms represent signals into the 100 Mb/s, it is much more tolerant any test fixture to be electrically transceiver with two different rise of large impedance discontinuities removed from the measurement by times. These rise times are 1 ns than an S400 board running at calibration. The test fixture could and 500 ps, representing the 400 Mb/s. Increasing the TDR step be a cable assembly, a TDR probe, 1394-1995 standard and 1394b will emphasize the areas of inher- an SMA launch board, or a simple standard, respectively. The third ently lower signal integrity within connector. There is normally some waveform is the actual 35-ps rise the board. This is how high-speed bandwidth lost as a 35-ps edge time step from the TDR system.

6 Volume 4 • Issue 3 • 1999 passes through a test fixture, so it is useful to remove the test fixture from the measurement. For this TDR measurement the test fixture was a differential launch adapter board with two SMA 3.5-mm female connectors on one side and a FireWire male connector on the other side. A 5-inch custom FireWire female-to-female cable was then connected to the FireWire transceiv- er. Special FireWire male termina- tions were constructed by mating an SMA 3.5-mm female launch to a Scope Can Display Cable Length Directly FireWire male connector. This allowed the 50-Ω termination and short to be easily connected and he 54750A Digitizing Oscillo- stant for the cable. You can read removed to complete the required scope with the 54754A Differ- the cable length directly on the reference plane calibration. With T ential Time Domain Reflec- scope display. this configuration, the reference tometer plug-in module can easily The scope can also be used to plane was set right at the input to measure the length of FireWire, or measure the dielectric constant of the transceiver, enabling repeatable, any other cable or trace. When the a cable with a known length. Once accurate TDR measurements. dielectric constant of the cable or the dielectric constant of a cable Why should the reference plane circuit trace is set, the instrument is known, then it can be used to be so close to the transceiver input? can directly display the length to measure the length of any of the The nature of TDR measurements the end of the cable or to interest- same type of cable. To measure dictates that a given step voltage is ing TDR reflections. the dielectric constant, select the launched into the DUT. When the Each leg of the differential pair dielectric softkey and vary the reflection returns, it is displayed as a of a FireWire cable can be mea- dielectric-constant numeric value. percentage of the original voltage sured separately using single- When the delta marker function amplitude. However, after the first ended TDR to ensure that they are displays the length corresponding discontinuity reflects some portion of equal length. To measure cable to the known cable length, the of the incident wave, there is now length, first calibrate the Time number being displayed in the less then 100 percent of the incident Domain Reflectometer and set the dielectric-constant softkey menu wave travelling to the second imped- reference plane at the beginning is the correct dielectric constant. ance discontinuity. This means that of the cable. Special markers can the second, third, and fourth discon- then be placed on the TDR wave- For more information, check 1 tinuity measurements are less accu- form at the reference plane. Next, on the reply card, or visit rate than the first. In fact, if the ini- scroll one of the two markers to http://www.hp.com/info/insight3. tial impedance discontinuity is too the unterminated cable end, and large, the resulting TDR waveforms input the known dielectric con- can only be used qualitatively, to determine if the discontinuity is inductive or capacitive. So setting the reference plane right in front of the input to the transceiver pro- duces the most accurate results.

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performance of the entire 1394 bus. The 1394 system clock is embedded in the data-transport signal lines, TPA and TPB. By using exclusive-OR logic on these Figure 3. The digitizing oscilloscope performs automatic measurements and dis- two differential signal pairs, a reli- plays the jitter in the left-hand corner of the screen. This is the jitter of a failing S400 PHY. able clock can be extracted. Either TPA or TPB will change in one bit cell, but not both. This Evaluating Jitter possible) rising and/or falling clock recovery scheme, called edge of TPB. The reason for look- The same TDR system used to data-strobe encoding, gives better ing at the next edge is that differ- measure input impedance and jitter budget than conventional ent clocks drive each of the 1394 input capacitance can also be clock/data recovery methods. devices. Each time data is trans- used to measure jitter, another To measure 1394 transmit mitted from one node to the next, performance parameter of high- short-term jitter, the transceiver the data is synchronized to the speed digital circuits. Jitter is the must be transmitting a changing local clocks. The longest data deviation of the significant occur- data packet. This is accomplished packet cannot exceed 83.3 µs, so rences of a signal from their ideal by having the transceiver send a there is no reason to measure jit- positions in time. It is usually Write Quadlet Request broadcast ter for longer than that. For 1394 measured as a peak-to-peak or packet addressed to a node that this is called short-term jitter. RMS value in units of nanosec- does not exist on the 1394 bus. (A There are many reasons that jit- onds or unit intervals. With the quadlet of data is four bytes.) For ter appears in the 1394 cable. The TDR step generators disabled, the example, in a two-node 1394 sys- most common reason is that the oscilloscope is used as standard tem, node 1 is the Root Node and Phase Locked Loop (PLL) design in electrical input channels and mea- node 0 is the Child Node. A com- the PHY chip is not designed to sures jitter on an eye diagram. mand for a Write Quadlet Request meet the 1394 transmit jitter The 1394 standard states that the transmitted to node 63 will never requirements. The 1394 device runs jitter transmitted between the two be acknowledged as received by off of a 49-MHz system clock that signal pairs, TPA and TPB, shall either of the two nodes on the is based on a crystal input of be no greater than 1.6-ns peak to 1394 bus because it was not 24.576 MHz. A PLL is commonly peak for S100, 0.5-ns peak to peak addressed to them. The absence used to achieve this synchroniza- for S200, and 0.3-ns peak to peak of Acknowledge packet transmis- tion. If the PLL of one transceiver for S400. The jitter is measured sion is important when trying to is bad, it could allow transmission from the rising and/or falling edge measure transmit jitter. This pro- of corrupt data and degrade the of TPA to the next (or as close as tocol sets up the communication

8 Volume 4 • Issue 23 • 1999 link between two nodes in such a way that a pseudo random binary sequence (PRBS) is transmitted. The result is a fully developed eye diagram. It is important to issue the packet from the Root Node, allow- Figure 4. This is the jitter of a passing S400 PHY. ing it to transmit data with no request for the bus, thus making the data easier to trigger with less and displays the jitter in the left- sate for the 22-ns delay associated arbitration. hand corner of the screen. Care with the TDR oscilloscope used in Along with this repeating Write must be taken to make sure that the the testing. Quadlet Request broadcast packet oscilloscope is triggering on the Signal integrity engineering is there are five quadlets of data. With- right transition and the appropriate becoming a very important aspect of in this data packet is a field called a voltage level. Proper triggering is high-speed digital design. Impedance transaction label field that incre- crucial because there is a 200-ns mismatch and the corresponding sig- ments 00h through 3Fh and back. It data prefix (which is not clocked nal reflections within the physical is used to generate an eye diagram data), and an improper trigger layer can be identified using Time on the digitizing oscilloscope that would erroneously include the Domain Reflectometry. Only after can then be analyzed. It is important 200 ns in the jitter measurement. these signal reflections are located to have an incrementing field Because the first logic transition of can the signal integrity be evaluated, because all possible logic-level tran- the first bit of data prefix is always thus improving the reliability of sition combinations are needed to of opposite polarity from the logic high-speed data transmission. build a good eye diagram. The eye transition of the first bit of real diagram is measured to get the data, the data prefix can be identi- peak-to-peak jitter measurement. For more information, check 1 fied and excluded. When triggering Other critical measurements of the on the reply card, or visit on TPA and looking at TPB for jit- transmitted data can be made such http://www.hp.com/info/insight3. ter, triggering must be done on a ris- as differential amplitude, bit cell ing edge. Conversely, when trigger- time, overshoot, and rise and fall ing on TPB and looking at TPA for time for signal pairs TPA and TPB. jitter, triggering must be done on a Once an eye diagram is obtained falling edge. The best jitter measure- (Figure 3 and Figure 4), the mea- ment is obtained when triggering on surement is a straightforward one edge of clocked data and look- process. The digitizing oscilloscope ing at the next edge of clocked data. performs automatic measurements A delay line was used to compen-

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