Evaluating Signal Integrity of IEEE 1394 Physical Layer with Time Domain Reflectometry, Part 2
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HIGH PERFORMANCE Measure specific parameters of an IEEE 1394 interface with Time Domain Reflectometry. Michael J. Resso, Hewlett-Packard and Michael Lee, Zayante Evaluating Signal Integrity of IEEE 1394 Physical Layer with Time Domain Reflectometry, Part 2 he data rates of today’s high- LED Display speed digital systems are T rapidly increasing. New seri- RAM al data communication standards 1394 Link Glue ROM ROM such as IEEE 1394 (FireWire) are logic being developed that push the Power gigabit per second limit and Analyzer beyond. Cables, interconnects, logic PCBs, and silicon behave much Phy PowerPC differently as rise times in the sub- nanosecond regime become com- JTAG monplace. Extreme challenges are presented to the digital designer as RS-232 Port various physical layer components IEEEE 1394 Logic Analyzer Interface create signal integrity problems Serial Bus under these extreme conditions. TDR Controlling the impedance environ- Computer TDR Launch Logic Control ment of the FireWire physical layer Fixture is now paramount to assuring that a design meets functional require- Figure 1. The basic components of the IEEE 1394 TDR test setup. ments. By using Time Domain Reflectometry (TDR), the maxi- mum amplitude of reflection can Focus on the Physical Layer specification. This ensures that a be measured directly to certify particular device does not load The IEEE 1394 compliance mea- compliance with the 1394 standard. down the bus excessively. surements described here focus on The basics of TDR were pre- The IEEE 1394-1995 standard is the physical layer silicon chip, sented in the first part of this written from the perspective of referred to as the PHY chip, and article (Insight, Volume 4, Issue 2, the cable looking into the trans- the transceiver board into which it 1999, page 22). This part describes ceiver. Two different input imped- is mounted. The 1394 transceiver methods of using TDR to measure ance measurements are made: one board has two differential signal the input impedance, input capaci- when the transceiver is in transmit pairs called TPA and TPB. To com- tance, and jitter of an IEEE 1394 mode and another when it is in ply with the standard, both TPA interface. receive mode. The transceiver is and TPB must conform to the spec- in transmit mode when it is in the ification while in transmit mode process of driving a 1b or 0b. It is and receive mode. They must also in receive mode when it is not dri- comply with an input capacitance ving and is in an idle state. Signal 4 Volume 4 • Issue 3 • 1999 pairs TPA and TPB are very differ- equal in magnitude and opposite in imbalance can occur in the FireWire ent and therefore both need to be polarity, thereby creating a differen- cable media are if the individual tested. The TPA pair on the trans- tial stimulus as normally seen by the legs are not symmetrically twisted ceiver drives TPBias and has a small transceiver data-transport pairs. The or if one line has a larger gauge current source called Icd. The TPB oscilloscope is set up to receive the wire. Three ways imbalance can pair has only the termination resis- differential response to the differen- occur on a printed circuit board tors and a 270-pF capacitor in paral- tial stimulus. It is also possible to are if there is a ground-plane dis- lel to ground. All of the external ter- configure the stimulus and/or continuity under one leg and not mination components on both TPA response as common mode instead the other, if one microstrip leg is and TPB exist common mode only, of differential. This equipment flexi- thicker than the other, or if the an important design feature that bility results in a test matrix that dielectric material in the board is enables the balanced differential cir- can lead to valuable insights into not homogeneous. cuit topology. This also allows the the Device Under Test (DUT). We chose the second method method of measuring a differential For the first method of measuring described in the standard to mea- circuit using the single-ended TDR input impedance, the oscilloscope is sure the input impedance of the test techniques discussed later. in a mode in which it measures dif- FireWire transceiver. In this case, ferential impedance directly by the requirement is measured in using its impedance extraction algo- terms of the maximum amplitude of Standard Dictates the Input rithm firmware. The vertical units reflection from the DUT. When the Impedance are changed from millivolts to vertical units are changed from mil- The 1394 standard dictates an input ohms, and the waveform markers livolts to percent reflection on the impedance specification for both are placed at the appropriate posi- oscilloscope, the amplitude of the TPA and TPB. It states that for all tion on the DUT. The differential reflection coefficient (Rho), is mea- devices the differential input imped- impedance is then read directly sured. If the waveform markers are ance should be between 109 and from the marker table on the oscil- put at the proper position, the mea- 111 Ω when in receive mode and loscope display. Two single-ended surement can be read numerically between 105 and 111Ω when in lines with a characteristic imped- from the oscilloscope display. The transmit mode. Two methods are ance of 50 Ω should yield a differ- 1394 standard states that for a trans- proposed by the standard to verify ential impedance of 100 Ω , assum- ceiver capable of S400 speeds, the the input impedance compliance of ing a perfectly balanced differential amplitude of reflection must be less TPA and TPB. Both methods use system. However, if the data trans- than 21.4 percent; for an S200-capa- Differential TDR to accomplish this port lines of the FireWire transceiv- ble transceiver, it must be less than measurement. With Differential er are not perfectly balanced, possi- 37.4 percent; and for an S100-capa- TDR, the TDR step generators bly due to impedance discontinuties ble transceiver, it must be less than inside the oscilloscope launch two on one line and not the other, the 48.0 percent. fast edges (one into each leg of the differential impedance would not be twisted pair). The two edges are the expected 100 Ω . Two ways Volume 4 • Issue 3 • 1999 5 HIGH PERFORMANCE CONTINUED Naturally, the fastest edge results in the largest reflection, so the waveform with the highest-ampli- tude reflections is the one with the 35-ps rise time. The 500-ps and 1-ns waveforms yield reflections with correspondingly smaller amplitudes. Measuring Input Capacitance A second compliance test is trans- ceiver input capacitance. As with the input impedance specification, different-speed transceivers have different performance require- ments. The maximum input capaci- tance for S400 is 4 pF; for S200, it is Figure 2. The measurements of input impedance of PHY #1 TPB Port were obtained using the amplitude of reflection method. 7 pF; and for S100, it is 9 pF. For this measurement, we used a TDR step with a 200-mV amplitude and a Rise Time Measurement connectors are characterized in 1-ns rise time, the fastest allowed the time domain. A gigabit The 1394-1995 standard dictates by the 1394-1995 standard. Using FireWire copper interconnect the worst-case rise time for a data this fastest allowable rise time would need to exhibit a low pulse to be 1 nanosecond. In order again provides the worst-case sce- reflection coefficient when a very to measure the 1394 transceiver’s nario for reflections from imped- fast rise-time edge is launched response to this worst-case rise ance discontinuities: The faster the into it. Even if the whole package time, a novel variable-rise-time rise time, the larger the amplitude passes the 1394 standard, its sig- test methodology was implement- of the reflection. This test shows nal integrity can be improved by ed. A bandwidth-limiting math what structure in the physical layer pinpointing discontinuities using function allows the transceiver’s causes the most problems for sig- the fastest edge speed. response to a faster or slower nal integrity. The input capacitance The measurement of input edge to be simulated in software specification is written to address impedance (of PHY #1 TPB Port in by the oscilloscope. This method the complete FireWire termination this case) is shown in Figure 2. has proven very useful because it network: not only the physical sili- The measurements were obtained indicates how much a specific con chip, but also the cable, con- using the amplitude of reflection discontinuity will contribute to nector, printed circuit board, and method. There are two simulated overall signal integrity at real- termination devices. waveforms and one real wave- world speeds. For example, if an Normalization is a TDR mea- form. The two simulated wave- S100 FireWire board is running at surement technique that allows forms represent signals into the 100 Mb/s, it is much more tolerant any test fixture to be electrically transceiver with two different rise of large impedance discontinuities removed from the measurement by times. These rise times are 1 ns than an S400 board running at calibration. The test fixture could and 500 ps, representing the 400 Mb/s. Increasing the TDR step be a cable assembly, a TDR probe, 1394-1995 standard and 1394b will emphasize the areas of inher- an SMA launch board, or a simple standard, respectively. The third ently lower signal integrity within connector. There is normally some waveform is the actual 35-ps rise the board. This is how high-speed bandwidth lost as a 35-ps edge time step from the TDR system.