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Exploiting Quantum Teleportation in Quantum Circuit Mapping

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Exploiting Quantum Teleportation in Quantum Circuit Mapping Exploiting antum Teleportation in antum Circuit Mapping Stefan Hillmich∗ Alwin Zulehner∗ Robert Wille∗† ∗Johannes Kepler University Linz, Austria †Software Competence Center Hagenberg GmbH (SCCH), Austria {stefan.hillmich,robert.wille}@jku.at https://iic.jku.at/eda/research/quantum/ ABSTRACT A particularly important restriction is given by the coupling Quantum computers are constantly growing in their number of constraint that only allows interactions between specific pairs of qubits, but continue to suffer from restrictions such as the lim- qubits. In all but the trivial cases, it is not possible to map the logi- ited pairs of qubits that may interact with each other. Thus far, cal qubits of a quantum circuit to the physical qubits of a quantum this problem is addressed by mapping and moving qubits to suit- computer in a way that the coupling constraints are satisfied for able positions for the interaction (known as quantum circuit map- the whole circuit. This is a problem solved through quantum cir- 1 ping). However, this movement requires additional gates to be in- cuit mapping , which moves logical qubits of the circuit diagram to corporated into the circuit, whose number should be kept as small physical qubit positions of the hardware that allow for the desired as possible since each gate increases the likelihood of errors and interactions. It has been shown that finding an optimal quantum decoherence. State-of-the-art mapping methods utilize swapping circuit mapping is an NP-complete problem [6, 7]. and bridging to move the qubits along the static paths of the cou- State-of-the-art approaches (such as introduced in [8–23]) em- pling map—solving this problem without exploiting all means the ploy swapping as well as bridging schemes to satisfy the coupling quantum domain has to offer. In this paper, we propose to addi- constraint for a given operation if required. While they are work- tionally exploit quantum teleportation as a possible complemen- ing reasonably well for smaller architectures, they lead to substan- tary method. Quantum teleportation conceptually allows to move tial additional costs when large distances in growing architectures the state of a qubit over arbitrary long distances with constant have to be covered. Moreover, swapping and bridging are rather overhead—providing the potential of determining cheaper map- classical approaches compared to the untapped potential of the pings. The potential is demonstrated by a case study on the IBM Q available quantum-mechanical phenomena. Tokyo architecture which already shows promising improvements. In this work, we are aiming to broaden the consideration of With the emergence of larger quantum computing architectures, solutions for quantum circuit mapping by additionally exploiting quantum teleportation will become more effective in generating quantum teleportation [1]—a quantum mechanical method which cheaper mappings. allows to teleport the state of a qubit over an arbitrary distance through a quantum transportation channel. Quantum teleporta- ACM Reference Format: Stefan Hillmich, Alwin Zulehner, and Robert Wille. 2021. Exploiting Quan- tion has been demonstrated for quantum networks [24–26] but this tum Teleportation in Quantum Circuit Mapping. In 26th Asia and South concept also allows to move logical qubits around inside a quan- Pacific Design Automation Conference (ASPDAC ’21), January 18–21, 2021, tum computer [27–29] and, by this, potentially helps to satisfy the Tokyo, Japan. ACM, New York, NY, USA, 6 pages. https://doi.org/10.1145/ coupling constraints. Moreover, moving logic qubits by teleporta- 3394885.3431604 tion via established transportation channels can be accomplished with constant costs, i.e., it does not depend at all on the distance to 1 INTRODUCTION be covered. Motivated by this, we propose to additionally exploit Quantum computing [1] enables significant improvements over quantum teleportation in quantum circuit mapping and also show classical computing for certain problems and is providing an ex- that this natively fits into currently developed NISQ devices. ponential speedup in the best case. Well known examples for such A case study conducted on the IBM Q Tokyo architecture demon- problems are integer factorization using Shor’s algorithm [2], quan- strates that this approach results in significant improvements for tum chemistry [3], and boson sampling [4]. The commonly used current state-of-the-art approaches. Moreover, the proposed idea description for quantum algorithms are quantum circuits which will have an amplified impact on larger quantum computing ar- arXiv:2011.07314v1 [quant-ph] 14 Nov 2020 represent a series of operations to be performed on the quantum chitectures (which already have been announced, e.g., by IBM and state. However, physical realizations of current quantum comput- Google), since larger distances between qubits have to be consid- ers are considered Noisy Intermediate Scale Quantum (NISQ [5]) ered on these architectures. By this, the proposed idea is going to devices and they impose restrictions that have to be explicitly ad- become more effective with growing architectures. dressed in the quantum circuit descriptions before they can be ex- The remainder of the paper is structured as follows: In Section 2, ecuted on a physical quantum computer. we motivate the problem including a brief recapitulation of the rel- evant basics of quantum computations as well as the architectural constraints. This section also reviews the state of the art regarding the mapping of quantum circuits. Afterwards, Section 3 reviews quantum teleportation and introduces the idea of incorporating this phenomenon into the mapping process. To this end, Section 4 provides a case study of the impact of quantum teleportation in 1The quantum circuit mapping is commonly performed as part of a compilation or synthesis procedure, that handles all restrictions of the targeted quantum computer. ASPDAC ’21, January 18–21, 2021, Tokyo, Japan Stefan Hillmich, Alwin Zulehner, and Robert Wille @0 = |0i - ) &0 &1 &2 &3 &4 @1 = |0i &5 &6 &7 &8 &9 @2 = |0i Figure 1: Quantum circuit diagram &10 &11 &12 &13 &14 the mapping process for the 20-qubit IBM Q Tokyo architecture. Finally, the paper is concluded in Section 5. &15 &16 &17 &18 &19 2 BACKGROUND & STATE OF THE ART Figure 2: Coupling map for the IBM Q Tokyo architecture In this section, we review the problem of quantum circuit mapping considered in this paper and discuss the state-of-the-art solutions which have been introduced thus far to tackle this problem. qubit NISQ device, where CNOT gates can only be applied between physical qubits &8 and & 9 that are connected by an edge in the cou- 2.1 Considered Problem pling map (e.g., &0 and &5). Quantum circuits are means of describing operations on qubits [1]. The restricted interactions lead to the problem of how to sat- These operations can act on single or multiple qubits—although isfy the coupling constraint for arbitrary circuits with an as small without loss of generality we restrict multi-qubit operations to the as possible number of additional gates, i.e., how to determine an controlled-NOT (CNOT) operation in this work. We further distin- efficient quantum circuit mapping. guish between control qubits and target qubits, where the opera- tion is performed on the target qubit if and only if the control qubit Example 3. Consider again the circuit in Figure 1 with the cou- assumes the state |1i.2 pling map of the IBM Q Tokyo architecture as shown in Figure 2. Fur- The graphical representation of quantum circuits uses horizon- thermore, assume the mapping puts the logical qubits on the physical tal lines to denote the qubits, which pass through gates (represent- ones with the same index, i.e., &8 ← @8. Inthis case, thesecondCNOT ing operations) that manipulate the qubits. This may seem similar gate in Figure 1 cannot be applied since the coupling constraints are to circuits in the classical realm, however, the circuit just describes not satisfied since there is no connection between &0 and &2. the order (from left to right) in which the gates/operations are ap- plied to the qubits. 2.2 State of the Art & Limitations Example 1. Figure 1 depicts the diagram of a quantum circuit. The architectural constraints in current NISQ quantum computers It is composed of three qubits and six gates. The gates marked with do not allow applying two-qubit gates, e.g., CNOT gates, between , - , and ) are single-qubit gates. For the multi-qubit CNOT gates, arbitrary qubits, but only for specific pairs of qubits as specified the control qubit is represented by whereas the target qubit is rep- by the corresponding coupling map of the architecture. Since de- resented by . In the presented diagram, and - are applied on termining a mapping of logical qubits to physical qubits satisfying the first two qubits, respectively, followed by three CNOT gates and, the constraint for all gates of the circuit is only possible in trivial finally, a single ) gate. cases, additional quantum operations need to be inserted into the circuit to satisfy the coupling constraint. This increases the gate Quantum circuit diagrams are commonly agnostic to physical count and, by this, the cost and unreliability of the circuit (quantum architectures, i.e., they focus on the functionality without address- computers employ error-rates for gate operations in the range of ing physical restrictions of physical quantum computers. In fact, −3 physical quantum architectures may only be able to apply cer- 10 [30]). The goal is to add as few additional quantum operations tain quantum operations or limit the possible interactions between as possible—an NP-complete problem for the exact solution [6, 7]. qubits. The restriction of interaction is referred to as coupling con- In the past, several methods have been developed that tackle this straint and is a main focus of this paper. problem [8–23].
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