RENESAS RL78 FAMILY MICROCONTROLLERS The True Low Power Microcontroller Platform
2021.05 RL78 – TRUE LOW POWER MICROCONTROLLER FAMILY It enables customers to build compact and energy-efficient systems at lower cost.
The Renesas RL78 contributes to greatly improve power efficiency, BOM cost reduction, and equipment miniaturization with industry-leading low power consumption and various built-in high-performance peripheral functions.
Comprehensive Development Tools Low Power Consumption Broad Scalability
Integrated development tools for more 44 µA/MHz operation*1 10 to 144 pins/1 to 768 KB efficient development 0.57 µA (RTC + LVD) Extensive product lineup to meet a broad Support for powerful tools from SNOOZE mode range of requirements Renesas partners Note: 1. Power supply current value during basic Pin compatibility RL78/G23 operation Ability to reassign peripheral function pins
Reliable Safety Functions High Performance
Memory with ECC High processing performance of 1.6 Compliant with Safety Standard for Reduced System Cost DMIPS/MHz Household Appliances (IEC 60730) Support for power supply voltages from Support for high operating temperatures 32 MHz ±1% high-precision on-chip oscillator 1.6 to 5.5 V (up to 150°C) On-chip power-on reset, low-voltage detection Max. 32 MHz operation Abnormal operation detection/ circuit, temperature sensor, data flash memory, etc. avoidance function True Random Number Generator (TRNG) RL: Renesas Low power * Specifications vary depending on the application. Please refer to each product page for details. RL products deliver reduced power consumption. RL78 ROADMAP
Under Mass New Production Planning
For Wireless Solutions RL78/G1A RL78/G1H Rich Analog Sub-GHz RL78/G1D RL78/G1P Bluetooth® RL78/G1C 12-bit ADC Low Energy 10-bit DAC USB General RL78/G14 RL78/G1F For Motor Systems RL78/G1M High Function Purpose High Function RL78/G1G Low Pin Count Sensor-less Motor RL78/ Small Motor Realtime Output RL78/G23 G2x RL78/G13 RL78/G13A Standard G13 Standard Low Ope. Current
For Small Systems RL78/G11 RL78/G1N RL78/G12 RL78/G10 Low Pin Count Low Pin Count Standard, Small Low Pin Count Rich Analog High Current Output
RL78/L13 RL78/L1C RL78/L1A Standard LCD USB Rich Analog LCD RL78/Lx RL78/L12 Next Small LCD
RL78/I1A RL78/I1E RL78/I1D RL78/H1D Lighting Rich Analog Detector, Sensor Healthcare ASSP ASSP Power Source RL78/I1B RL78/I1C RL78/I1C (512KB) Next Electricity Meter Electricity Meter Electricity Meter (AMR/AMI) (AMI)
RL78/F13 Standard RL78/F12 RL78/F14 RL78/F15 RL78/Fx Automotive Small High Function High Function Next RL78/D1A LCD
2019 2020 2021~ 02-03
RL78 FAMILY APPLICATIONS
The RL78 Family is utilized in a wide variety of applications. Industrial Automation Home Automation G23 G14 G11 I1A I1E G23 G13 G13A G1D G1H Lineup of microcontrollers for industrial Power efficiency among the best in the industry for applications requiring high reliability extended battery life Broad array of compact packages Support for low-voltage operation (1.6 V to (G1H: Operating temperature range of –40°C to +105°C, 1.8 V and above)) and support available for higher temperatures Standby function with newly added SNOOZE mode for low power consumption during intermittent Automotive operation F13 F14 F15 Lineup of highly reliable microcontrollers for Power Tools automotive applications G1F G14 G11 Support for high operating temperatures (up to Proven track record supplying consistently high- +150°C) quality microcontrollers over the long term CAN communication, safety functions, etc., for Ideal microcontroller platform for system automotive applications development with lineup covering wide range of memory capacities, pin counts, and package Consumer Electronics options G23 G13 G13A G12 G10 Calendar function (RTC) as standard feature Medical/Healthcare Serial communication, timers, and on-chip high- L1A L13 I1E G1D H1D speed oscillator as standard features ■ Lineup of compact packages ■ Proven track record supplying major medical White Goods equipment manufacturers ■ Active member of Continua Health Alliance G23 G13 G13A G12 L13 G1P G1N Hardware support for European safety standard for household appliances (IEC60730) Metering Standard temperature range of –40°C to +85°C, I1B I1C L13 L1C G11 G1H H1D and support available for higher temperatures Standby function that is ideal for low-power On-chip high-speed on-chip oscillator, power- applications such as meters and measuring devices on reset, etc., ideal for cost-sensitive electric On-chip analog functions for smartmeters household appliances Proven track record supplying the meter field for over 30 years Lighting, Power Supply I1A G11 Motor Control High-resolution PWM output for lighting and G14 G1F G1G G1M power supply control applications On-chip advanced-functionality timers for motor Easy-to-use Applilet software (free of charge) control supporting program development for lighting High-speed on-chip oscillator with accuracy of applications ±1%, ideal for low-cost, high-precision solutions Support for DALI, DMX512, PMBus, and SMBus communication
Detector I1D G11 Improved analog functions necessary for detecting very small sensor signals Support for power-efficient detection when returning to high-speed operation from STOP mode LOW POWER CONSUMPTION SNOOZE mode for more power savings In SNOOZE mode the CPU is halted while A/D conversion and data reception are enabled. By transitioning from STOP mode (clock stopped) to SNOOZE mode, it is possible to start the on-chip oscillator and operate peripheral functions while the CPU remains inactive.
MAIN RUN Condition match
CPU Clock Peripheral
HALT SNOOZE No Condition match CPU Clock Peripheral CPU Clock Peripheral
STOP
: Running CPU Clock Peripheral Snooze Mode reduces power consumption by over 30 % : Stand by SNOOZE mode It is not necessary to activate the CPU for data reception. Analog input ADC activated by timer Using the exclusive SNOOZE mode, peripheral functions such as the ADC, UART or CSI can operate when CPU is in standby mode. Upper Limit Power consumption is one-tenth of normal operation. SNOOZE mode: 0.5 mA, RUN mode (ADC): 5 mA Lower Limit HALT and STOP modes The standby function stops CPU operation, reducing overall Time microcontroller current consumption by 80%. ADC values out of range: CPU is activated to The STOP mode disables the microcontroller’s on-chip functions, process out-of-range values. reducing power consumption to the lowest level possible. SNOOZE mode sequencer RL78 is the first MCU family equipped with this function. Only RL78/23 has this function. (as of 2021) By this function, even lower power consumption than the conventional SNOOZE mode is possible. Details are described on page 09. Low-power, high-performance products for lower system power consumption overall In the most common operating modes, the RL78 Family delivers an operating current of 44 μA/MHz (while operating at 32 MHz) and a standby current of 0.57 μA (in SUB-HALT mode, with the RTC and LVD operating). Also, a developed SNOOZE mode has been added to the previously implemented HALT and STOP low-power operation modes. In SNOOZE mode the CPU is in the standby state while A/D conversion and serial communication are enabled, and the CPU is activated only when required. This mode is excellent for battery-powered systems as it greatly increases battery life. Operating current (µA/MHz) Clock operating current (32kHz, LVD) STOP mode current (standby, WDT + LVD)
223µA 10.4µA 9.51µA 1/3 to 1/5 1/4 to 1/18 1/4 to 1/18
129µA
Current 44µA Current 2.06µA Current 2.05µA 0.57µA 0.53µA
Company Company Renesas Company Company Renesas Company Company Renesas A B A B A B Source: Product data sheets and actual measurement 04-05
BROAD SCALABILITY Extensive memory size and package options Excellent pin compatibility The extensive lineup includes more than 1000 product versions, with Scalability is maintained because the general location of peripheral memory sizes from 1 KB to 768 KB and package pin counts from function pins and input/output pins remains the same even when 10 pins to 144 pins. This extensive selection provides support for a the pin count changes. Customers can continue to use the RL78 broad range of application fields, including consumer, automotive, Family of microcontrollers with confidence in the future. industrial, and communications. Customers can use standardized boards for product models ranging The wide range of options means a lot to developers if there from the low-end to the high-end and boost the efficiency of the are changes made to the specifications or more ROM capacity verification process. becomes necessary than originally estimated in the middle of the development process. Example of I/O port assignments on RL78/G1x Customers can rely on the same microcontroller series when developing product models ranging from the low-end to the high- end. Total development man-hours are reduced.
Flash(KB) 768 512 384 256 192 128
96 P0 64 P1 48 P2 P5 32 P7 16 System Pins 12 8 4 2 1
10 16 20 24 25 30 32 36 38 40 44 48 52 64 80 85 100 128 144 Pin
Ability to reassign pin functions with PIOR* register settings
Pin assignments can be changed for added board layout flexibility. The locations of peripheral function pins can be optimized. Note: * PIOR: Peripheral I/O Redirection Not all pins can be reassigned. Before change After change
PIOR PIOR Timer 05 I/O Timer 0 I/O Timer 0 I/O Analog I/O I2C_A0 Analog I/O I2C_A0 I2C_A0 INTPn INTPn
System I/O System I/O INTP10
I2C_A0 INTP10 Timer 05 I/O HIGH PERFORMANCE RL78 microcontrollers with CPU core employing three-stage pipeline and Harvard architecture
RL78 CPU processing performance is overwhelming other MCU vendors' CPU cores.
16-bit CPU Core with Pipelining Efficient Instruction Execution -> 86% in 1-2 Cycles Single Cycle Multiplication (HW Math Assist) DMA Engine (up to 4 channels)
RL78 Instruction Execution Cycles: • 1 cycle 56% • 2 cycles 30% • 3 cycles 9% • 4+ cycles 5%
HW Assist for Math Operation Clock Cycles
16bit Barrel Shifter for Shift and Rotate 16bit n Shift/Rotate (n = 1 to 15) 1
Multiply Signed & Unsigned 16 × 16 = 32 Bit Result 1
Multiply/Accumulate Signed & Unsigned 16 × 16 + 32 = 32 Bit Result 2
REDUCED SYSTEM COST
Helping customers reduce system size and cost • Power supply detection circuit Resonator • Temperature sensor Reset and WDT IC On-chip peripheral functions include a high precision (±1%) high-speed • Multiple power supply interface ports EEPROM on-chip oscillator, background operation data flash supporting 1 million erase/program cycles, a temperature sensor, and multiple power supply interface ports. The RL78 Family is fabricated that enables customers to achieve reduced system cost and smaller overall system size. Neat and compact design
Data flash with advanced functionality User program User program User program Previous operation operation operation product (background operation) for substantially example of Data programming/erase Data programming/erase reduced programming time 78K0R/Kx3
Data access unit: 1 byte User program User program User program operation operation operation Greatly reduced Data flash size: 4 KB (erasure unit: 1 KB) RL78 programming Data programming/erase Data programming/erase time Number of overwrites: 1 million (typ.) Dedicated library: Simplifies operations Simultaneous execution possible 06-07
Error RELIABLE SAFETY FUNCTIONS detection
Safety functions built into the microcontroller that enhance system reliability Memory guard Generally speaking a microcontroller is expected to operate normally even when exposed to noise. The RL78 Family of Fault detection microcontrollers have a number of safety functions that allow confirmation of normal operation. Customers can use these functions to easily perform self-diagnostics on microcontrollers. The self-diagnostic functions of the RL78 Family contribute to enhanced system reliability.
Error detection Fault detection These functions check to make sure that the microcontroller’s internal CPU and memory This function is for checking the operation of the microcontroller’s clock generator are operating properly. When an error is detected, measures such as an internal reset of circuit, A/D converter, and I/O pins. It simplifies the task of verifying microcontroller the microcontroller can help to prevent the system from malfunctioning. operation and makes it easier for customers to ensure safe and reliable operation of • Watchdog timer (WDT) as standard feature their systems. • Flash memory CRC calculation RAM parity error detection • Frequency detection A/D self-check test • RAM ECC function*1 CPU stack pointer monitoring function*1 • I/O port output level detection Clock monitoring function*1 • Illegal memory access detection function*1 Notes: Memory guard 1. Available on the RL78/F13, RL78/F14 and RL78/F15. This function disables writing to selected addresses in the RAM and SFRs*2. 2. SFR (special function register): Registers that store settings related to special It makes it possible to protect settings in RAM and the SFRs, contributing to functions such as clock control, the low-voltage detection circuit, port control, and improved reliability for the customer’s system. interrupts. • RAM write protection SFR write protection Security function RL78/G23 can prevent spoofing by the AES library. This function is installed only in RL78/G23. Details are described on page 09.
COMPREHENSIVE DEVELOPMENT TOOLS A full lineup of tools that provides powerful support for efficient development
Renesas provides support for all stages of RL78 application development. The Renesas (CS+, e2 studio) and IAR integrated development environments are easy to use and learn, helping shorten development cycles. A variety of debugging and programming environments are available to meet specific customer needs. Finally, Renesas partner vendors offer a rich array of tools and services covering a broad range of requirements.
Software development Debugging Programming
Debugging 2 Programming based on PC CS+, e studio on specifications Programmed Simple operation, CS+ Web simulator when ordering ROM easy-to-access support e2 studio Instruction simulator Programming service from Renesas Electronics Coding, building, device drivers Debugging Programming with basic under PC Integrated development functions E2 E2 Lite control E2 E2 Lite environment On-chip debugging emulator On-chip debugging emulator with programming functions with programming functions Debugging OSOS Programming OS Itron based with advanced IECUBE under PC control PG-FP6 functions or standalone Real-time OS Full-spec emulator Flash memory programmer GENERAL-PURPOSE, STANDARD RL78/G23
RL78/G23 specifications Memory RL78 CPU Core RL78 CPU Core 32 MHz 51.2 DMIPS • Three-stage pipeline CISC architecture Program Flash • up to 768KB CISC Harvard Architecture Max. operating frequency: 32 MHz 3-stage Pipeline Memory SRAM • Support for 1.6 V flash programming and boot swap up to 48KB Four-Register Banks • Program flash: 96 KB–768 KB Data Flash • SRAM: 12 KB–48 KB 8KB 16-bit Barrel Shifter • Data flash: 8 KB/None System System Safety Analog • High-speed on-chip oscillator: 32 MHz ±1% • Middle-speed on-chip oscillator: 4MHz ±12% Interrupt Controller RAM ADC • Library support for multiply/divide and multiply-accumulate operation unit 4 Levels Parity Check 12-bit, 26ch • SNOOZE mode sequencer(SMS) POR, LVD ADC DAC • Logic & Event link controller Self-Diagnostic 8-bit, 2ch Power management Clock Generation • (Internal, External) Clock Comparator, 2ch Operating current 44μA/MHz *1 Monitoring • HALT current 0.365μA (RTC+LVD) *1 Data Transfer Controller Internal Vref. • STOP current 210nA (only 4KB SRAM data retained) *1 Memory • Logic & Event link CRC Temp. Sensor Snooze current 700μA (UART), 1.2mA (ADC) Controller Safety Output Level • Compliant with European safety standard for household appliances (IEC/ Debug Detection Timers UL 60730) (Single Wire, Two Wires) Timer Array Unit • Illegal memory access detection Communication 16-bit, 16ch Security Power Management 2 Interval Timer • Unique ID I C Single-Master, 8ch HALT 32-bit, 1ch • Customer ID (ADC, DAC, RTC Enabled) I2C Multi- (8-bit, 4ch) • Random number generator Master/Slave, 2ch SNOOZE Timers WDT, 1ch (DTC, ADC Enabled) CSI/SPI, 8ch • Advanced-functionality timer array unit (TAU) SNOOZE mode sequencer RTC • 32-bit interval timer UART, 4ch Calendar • Watchdog timer, real-time clock STOP (RTC Enabled) Analog UART with sync clock, 2ch Security & Encryption • 1.6 V (VDD) operation • On-chip ADC, 12-bit × 26 channels, conversion time: 2.0 μs Human Machine Interface LIN, 1ch Flash Read Protection • On-chip DAC, 8-bit × 2 channels, comparator × 2 channels Capacitive Sensing Unit Remote Controller (CTSU2L), 32ch • Internal reference voltage (1.45 V) Receiver Flash Shield Protection Human Machine Interface 40-mA port, 4ch • Capacitive sensing unit × 32 channels Unique ID • Controlled current drive output × 8channels Output Current Communication Control Port, 8ch Customer ID • 2 2 CSI, UART, I C, Simple I C True Random • Remote control receiver Number Generator Package • 30-pin–128-pin Note: 1. Power supply current RL78/G23 Group product with 64 pins and 128 KB of ROM.
Memory/Pin lineup: RL78/G23 RL78/G23 has compatibility with conventional products. : G13 Lineup Pins Code Flash 30 32 36 40 44 48 52 64 80 100 128 768 KB 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 512 KB RAM [KB] / Data Flash [KB] 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 48 / 8 384 KB 32 / 8 32 / 8 32 / 8 32 / 8 32 / 8 32 / 8 32 / 8 256 KB 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 24 / 8 192 KB 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 20 / 8 128 KB 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 16 / 8 96 KB 12 / 8 12 / 8 12 / 8 12 / 8 12 / 8 12 / 8 12 / 8 12 / 8 08-09
SNOOZE mode sequencer Capacitive touch sensing unit The RL78/G23 has the new sequencer which can operate most of 2 to 32 touch sensor channels are available. peripheral functions while in SNOOZE mode. Compatible with self-capacitance and mutual capacitance methods. Up to 64 keys are supported when using mutual capacitance. The SNOOZE mode sequencer realizes even lower power consumption Supports keys such as switches, wheels, and sliders. Can also be used as a for applications. proximity sensor. Supports SNOOZE mode for low-power sensing. Operation in RL78/G13 SNOOZE mode Switch Example of CPU stops while in SNOOZE mode for low power consumption electrodes
• • • • CPU STOP SNOOZE STOP SNOOZE CPU • • •
· Analog settings · A/D conversion · A/D conversion · Threshold changes · Port settings · Value determination · Value determination · Port settings I [A] · UART transmission
Wheel Example of CPU CPU electrodes current current Snooze Snooze current current T
RL78/G23 SNOOZE mode sequencer Slider Example of SNOOZE mode sequencer allows further operation bypassing the CPU electrodes
• • • • SNOOZE STOP SNOOZE STOP SNOOZE • • •
· Analog settings · A/D conversion · A/D conversion · Threshold changes · Port settings · Value determination · Value determination · Port settings I [A] · UART transmission Proximity Unlock applications using 3D gestures
Snooze Snooze Snooze current current current T
Logic and event link controller
Event output Event reception Directly link event signals from up to 94 types of peripheral functions to a peripheral function peripheral function specified peripheral function PORT Link 8 outputs to peripheral functions, ports, interrupts, or the DTC INT Link connection processor Change the conditions for linking event signals from peripheral functions by TAU0,1 PORT SAU0,1 INT passing the signals through logic cells (AND, OR, or EX-OR circuits) UARTA Logic cell block 1 TAU0,1 Start a specified peripheral function by inputting event signals from other ADC : Logic cell block 2 : peripheral functions to a selector : : : Output controller Input signal selector Connect event signals from peripheral functions to a specified peripheral : Logic cell block 3 Output signal selector function in synchronization with a clock by inputting the signals to a flip- DTC CMP flop
S R
Secure update and secure boot The RL78/G23 can prevent spoofing by using an AES library. AES Library • Boot swap function • Flash Shield Window function Furthermore, the RL78/G23 enables safe flash programming using • Boot cluster 0 rewrite prohibition function a boot swap and flash shield window function, as well as program Customer Board startup from a secured area using a boot cluster 0 rewrite prohibition function. Main Controller of Connectivity Device This provides support for secure update and secure boot to prevent spoofing. Unauthorized access In addition, using the AES-GCM library also prevents eavesdropping on communications between the RL78/G23 and the main MCU. GENERAL-PURPOSE, LOW-PIN-COUNT RL78/G10
RL78/G10 features Pins ROM 10 16 Ultra-low power consumption High-speed on-chip oscillator CPU operation: 45.5 μA /MHz Max. 20 MHz, oscillation accuracy ±2% 4 KB 512 512 STOP mode: 560 nA 2 KB 256 256 Other on-chip functions Lineup of low-pin-count products ADC Comparator 1 KB 128 128 10 pin: LSSOP (4.4 × 3.6 mm) Timer Serial communication RAM size (B) 16 pin: SSOP (4.4 × 5 mm) Selectable power-on reset
RL78/G10 specifications Memory RL78 CPU Core 20 MHz Operation Program Flash RL78 CPU Core Safety up to 4 KB CISC Harvard Architecture 3-stage Pipeline • Three-stage pipeline CISC architecture • Internal reset at illegal instruction execution SRAM up to 512 B 20 [email protected] V to 5.5 V, • Max. operating frequency: 20 MHz Timers 5 [email protected] V to 5.5 V
Memory • Advanced-functionality timer array unit (TAU) System Voltage range: 2.0 V to 5.5 V Interrupt • Program flash: 1 KB–4 KB • Watchdog timer Controller 4 Levels, Safety Analog • SRAM: 128 B–512 B Analog up to 10 pins ADC Trap Function System • On-chip ADC, 10-bit × 7 channels, conversion Clock Generation 10-bit x up to 7 ch Internal, External • High-speed on-chip oscillator: 20 MHz ±2% time: 3.4 μs Comparator SPOR Timers 1 ch • • (Selectable Power Selectable POR On-chip comparator On Reset Timer Array Unit 16-bit, up to 4 ch Communication Power management Communication On-Chip Debugging Interval Timer l2C x 1 ch • Operating current: 45.5 μA/MHz • CSI, UART, I2C, Simple I2C 12-bit, 1 ch Multi-Master Power Management WDT up to 2 x CSI/ • HALT current: 290 μA Package 17-bit 1 x UART/ HALT 1 x Simple l2C • STOP current: 560 nA (SRAM data retained) • 10-pin/16-pin CPU STOP STOP (Reference) The power supply voltage range during flash memory programming is 4.5 V to 5.5 V. SRAM On A low-voltage OCD board is required for debugging at less than 4.5 V. ote The P etection olta e P mu t e etween an https://www.renesas.com/en-us/doc/products/tool/doc/003/r20ut2451ej0100_e510y16lvb.pdf eference L loc ia ram of rou in ro uct
Lower system cost: Replacement for general-purpose RL78/G10 vs. competing products: Operating voltage/ logic ICs frequency range Using general-purpose logic components complicates the design, Covers the voltage range required by compact electric household manufacturing, and testing processes and can lead to malfunctions. appliance applications.
Reducing the number of components is a key issue when developing Operating voltage Company A Company B Company C RL78/G10 RL78/G12 RL78/G13 new products. 5.5V
4.5V 3.6V
LED drive Flip-flop Built-in High current buffer Implementation of timer drive general-purpose functions in the RL78 microcontroller 2.7V Power ON Power ON RESET 2.4V General-purpose RESET General-purpose Selectable 2.0V* counter Reset IC ports power-on reset 1.8V 1.6V RL78 microcontrollers help simplify the design, manufacturing, and testing processes; reduce malfunctions; and provide numerous other 1MHz 4MHz 5MHz 8MHz 16MHz 20MHz 24MHz 32MHz Operating frequency advantages. More compact circuit board Note: The RL78/G10 includes a SPOR circuit detection voltage (VSPOR), so it should be Reduced system cost used within a voltage range of 2.25 V to 5.5 V. 10-11
GENERAL-PURPOSE, ADVANCED FUNCTIONALITY RL78/G11 RL78/G11 features Ultralow power consumption for extended battery life Analog functions connected to the microcontroller internally Continues the low power consumption of the RL78 Family. Organic internal connections eliminate the need for external analog wiring Current consumption can be minimized by using the appropriate operating (PGA + ADC + VBGR, PGA + CMP + DAC/VBGR, etc.). mode setting (HS, LS, LV, or LP). Analog functions operate at low voltages, supporting voltage monitoring at Fast wakeup makes intermittent operation more efficient. 1.8 V and above (ADC = 1.6 V and above, VBGR = 1.8 V and above, CMP1 = → Reduced current consumption contributes to extended battery life. 1.6 V and above, DAC = 1.6 V and above)
Advanced-functionality timers supporting PWM forced shutoff Pins ROM 10 16 20 24 25 Advanced-functionality timers (timer KB, TAU) Support for forced shutoff of PWM output (timer KB + external interrupts/ 16 KB 1.5 K 2 K 1.5 K 2 K 1.5 K 2 K 1.5 K 2 K 1.5 K 2 K CMP) RAM size (B) DATA flash size (B) Interval timer (8-/12-/16-bit) supporting intermittent operation with long periods
Ability to check battery voltage at low power Quantitative measurement of minute analog Detection of minute voltages using a single supply voltages (VDD = 1.8 V and above) and signals using only a single pin (PGAI) pin and setting of detection threshold using with no analog wiring microcontroller’s on-chip DAC ADC + internal constant voltage (1.45 V) PGA + ADC (+ internal constant voltage) PGA + CMP0 + DAC
VDD Analog signal Analog signal Internal constant voltage (1.45 V) Full-scale voltage=VDD + + 10 PGAI PGA + PGAI A/D conversion results Internal constant voltage 10 A/D conversion results PGA ADC (10-bit) − CMP0 B tt ADC − DAC − t (1.45 V) (10-bit) ×4 - ×32 (Ch0) ×4 - ×32
VSS Zero-scale voltage=VSS
VSS
RL78/G11 specifications Memory RL78 16-bit CPU 24 MHz 38.4 DMIPS RL78 CPU Core • Stop mode: 0.25 μA (data retained) Program Flash 16 KB MUL/DIV/MAC Instruction • Three-stage pipeline CISC architecture • SNOOZE mode: 0.7mA (UART), 0.67mA (ADC) SRAM • 1.5 KB Four Register Banks Support for multiply, divide, and multiply-and- Safety Data Flash accumulate instructions • Support for household safety standards (IEC/ 2 KB 16-bit Barrel Shifter
Memory UL 60730 and IEC 61508) System Safety Analog • Support for 1.8 V flash programming and boot Timers DTC RAM ADC • 24 sources Parity Check 10-bit, 11 ch swapping Timer array unit (TAU) × 4 channels ELC ADC DAC • Code Flash: 16KB • Timer KB × 1 channel (max. 48 MHz 18 Events Self-diagnostic 8-bit, 2 ch Interrupt Controller Clock Comparator • SRAM: 1.5KB operation), support for PWM forced stop 4 Levels Monitoring 2 ch • Data Flash: 2KB • Interval timer (8-bit, 12-bit, or 16-bit) Clock Generation Memory Internal, External CRC PGA • Support for shipment of pre-programmed • Watchdog timer (WDT) POR, LVD Internal Vref. microcontrollers Analog Timers Debug Timer Array Unit Temp. Sensor System • ADC 10-bit × 11 channels, conversion time: Single-Wire 16-bit, 4 ch • Operating voltage range: 1.6 V to 5.5 V 2.1 μs Timer KB Power Management 16-bit, 1 ch Communication • Operation state control (flash operating mode • DAC 8-bit × 2 channels HALT Interval Timer 2 x l2C transition) • Comparator ×2 channels DTC Enabled 8-bit, 2 ch Multi-Master SNOOZE Interval Timer CSI x 2 / UART x 1 • High-speed on-chip oscillator: 24 MHz ±1% • PGA × 1 channel Serial, ADC Enabled 12-bit, 1 ch / Simple I2C x 2 • • STOP WDT CSI x 2 / UART x 1 Medium-speed on-chip oscillator: 4 MHz Internal reference voltage VBGR (operation at SRAM On 17-bit, 1 ch / Simple I2C x 2 ±12% 1.8V ≤ VDD ≤ 5.5V) eference L loc ia ram of rou in ro uct • DTC, ELC, DOC, INTFO Communication • Support for POR, LVD, different-potential • CSI, UART, I2C, Simple I2C communication Package Power management • 10-pin/16-pin/20-pin/24-pin/25-pin • Normal operation: 58.3 μA/MHz Operating temperature range • Halt mode: 0.65 μA (LVD) • -40ºC to +85ºC / +105ºC GENERAL-PURPOSE, STANDARD RL78/G12, G13, G13A
RL78/G12, G13, G13A specifications Memory RL78 CPU Core RL78 CPU Core 32 MHz 43.2 DMIPS • Three-stage pipeline CISC architecture Program Flash up to 512 KB CISC Harvard Architecture • Max. operating frequency: 32 MHz 3-stage Pipeline Memory SRAM up to 32 KB • Support for 1.8 V flash programming and boot swap Four Register Banks • Program flash: 2 KB–512 KB Data Flash up to 8KB • SRAM: 256 B–32 KB 16-bit Barrel Shifter • Data flash: 2 KB/4 KB/8 KB/None System System Safety Analog • High-speed on-chip oscillator: 32 MHz ±1% DMA • Library support for multiply/divide and multiply-accumulate operation 4 ch RAM ADC Parity Check 10-bit, 26 ch unit Interrupt Controller 4 Levels, 20 pins ADC Power management Internal Vref. Self-diagnostic • Operating current: 66 μA/MHz*1 Clock Generation Clock • HALT current: 0.57 μA (RTC + LVD)*1 Internal, External Temp. Sensor Monitoring • STOP current: 230 nA (SRAM data retained)*1 POR, LVD • SNOOZE current: 700 μA (UART), 1.2 mA (ADC) Memory MUL/DIV/MAC CRC Communication Safety • Compliant with European safety standard for household appliances (IEC/ Debug 8 x l2C Timers Master UL 60730) Single-Wire • Illegal memory access detection Timer Array Unit 2 x l2C Power Management 16-bit, 16 ch Multi-Master Timers • Advanced-functionality timer array unit (TAU) HALT Interval Timer 8 x CSI/SPI • Watchdog timer, real-time clock RTC, DMA Enabled 12-bit, 1 ch 7-, 8-bit Analog SNOOZE WDT 4 x UART • 1.6 V (VDD) operation Serial, ADC Enabled 17-bit, 1 ch 7-, 8-, 9-bit • On-chip ADC, 10-bit × 26 channels, conversion time: 2.1 μs STOP RTC 1 x LIN • Internal reference voltage (1.45 V) SRAM On Calendar 1 ch Communication • CSI, UART, I2C, Simple I2C New Product: RL78/G13A lineup Package • Pins 20-pin–128-pin ROM 40 48 64 100 Note: 1. Power supply current RL78/G13 Group product with 64 pins and 64 KB of ROM. 512 KB 32 KB 8 KB 32 KB 8 KB 32 KB 8 KB 32 KB 8 KB Extensive lineup: RL78/G12, G13, G13A 384 KB 24 KB 8 KB 24 KB 8 KB 24 KB 8 KB 24 KB 8 KB RAM size DATA flash size Choose with confidence. Extensive lineup of 284 products.
Pins ROM 20 24 25 30 32 36 40 44 48 52 64 80 100 128 512 KB 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K 32 K RL78/G13A 384 KB 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 24 K 256 KB 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 20 K 192 KB 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 16 K 128 KB 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 12 K 96 KB 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 8 K 64 KB 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 4 K 48 KB 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 3 K 32 KB 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K RL78/G13 2 K 2 K 2 K 2 K 2 K 2 K 20K K 20K K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 2 K 16 KB 1.5 K 1.5 K 1.5 K 1.5 K 2 K 2 K 12 KB 1 K 1 K 1 K 1 K 1 K 1 K 8 KB 768 768 768 768 768 768 RAM No data flash RAM Equipped with data flash RL78/G12 or in ac a e the in acin of the L i mil an that of the L i mil 4 KB 512 512 512 512 512 512 or the in ac a e ro uct the M ca acit ran e from to 2 KB 256 256 12-13
Extensive lineup: Compact packages High performance: Low-voltage operation Available compact package options are ideal for miniaturized products. Expanded operating range compared with previous products and support for A/D conversion at voltages from 1.6 V
Earlier Renesas microcontrollers (R8C and 78K) RL78/G12 RL78/G13
5.5V
Operating frequency range extended to 32 MHz*1 Ultracompact Ultracompact 2.7V 2.4V Operating voltage Operation at 1.8 V Flash self-programming supported 1.8V at 1.8 V and above 25pin WFLGA 64pin VFBGA supported up to 8 MHz Thickness: 0.76 mm Thickness: 0.99 mm 1.6V Operation supported A/D converter operation supported 3×3mm 4×4mm 2 at 1.6 V and above* at 1.6 V and above*2 Picth: 0.5 mm Picth: 0.4 mm 1MHz 4MHz 8MHz 12MHz 16MHz 20MHz 24MHz 32MHz Frequency ote M ma on L eration u orte at an a o e on L High performance: Multiply and divide/multiply-accumulate operation unit On-chip multiply-accumulate operation unit for reduced operation load on CPU Completion interrupt generated for divide operations only. Multiply and divide circuit with support for multiply-accumulate operations Multiply-accumulate operation overflow/underflow interrupt generated when the cumulative result of multiply-accumulate operations causes an operation exec cycle overflow or underflow. Signed multiply Combined-use divide completion interrupt and multiply-accumulate 16 bits×16 bits=32 bits 1 clock operation overflow/underflow interrupt. Unsigned multiply Whether an overflow or underflow occurred can be determined by Unsigned divide 32 bits/32 bits=32 bits ... 32 bits 16 clock referencing a status flag. Since the C lacks multiply-accumulate operation instructions, library Signed multiply-accumulate 16 bits×16 bits+32 bits=32 bits 2 clock functions are provided. Unsigned multiply-accumulate
Reduced system cost: On-chip high-precision, high-speed oscillator On-chip high-precision, high-speed oscillator to support UART communication On-chip high-speed clock generator circuit with precision of ±1%*1 Selectable frequencies: 32 MHz*2, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz Oscillation accuracy correction register for even higher precision Notes: 1. ±5% on R5F103x 2. RL78/G13 only HOCO oscillation frequency accuracy
12MHz +5.5 High-precision oscillation + 8MHz CPU 5.0 Selectable among enabling UART communication 32MHz*2 6MHz TA= –20 to+85ºC 10 frequencies TA= –40 to–20ºC 24MHz 4MHz Accuracy(%) 16MHz 3MHz Other +1.5 UART IC 2MHz +1.0 Correction enabling 1MHz 0.0 even higher precision A/D –1.0 for reference Timer –1.5 frequencies of Oscillation accuracy subclock, etc. correction register
–5.0 –5.5 Voltage(V) 1.6 1.8 2.4 2.7 5.5 GENERAL-PURPOSE, ADVANCED FUNCTIONALITY RL78/G14
Timers Safety RL78 16-bit CPU RL78/G14 specifications 32 MHz 51.2 DMIPS RAM RL78 CPU Core • Timer array unit (TAU) × 8 channels Parity Check MUL/DIV/MAC Instruction ADC • Three-stage pipeline CISC architecture • Timer RJ × 1 channel Self-diagnostic Four-Register Banks Clock • 16-bit Barrel Shifter • Max. operating frequency: 32 MHz Timer RD × 2 channel Monitoring • Timer RG× 1 channel Memory Memory CRC Memory Power Management • Interval timer (12-bit) I/O Port Program Flash HALT • Code Flash: 16KB-512KB Read back up to 512KB RTC, DTC, Enabled • Watchdog timer (WDT) SRAM SNOOZE • SRAM: 2.5KB-48KB Timers up to 48KB Serial, ADC, Enabled Analog Timer Array Unit Data Flash STOP • Data Flash: 4KB, 8KB 16-bit, 8ch Up to 8KB SRAM On • ADC 10-bit/8-bit selectable × 20 channels Timer RD • Support for shipment of pre-programmed 16-bit, 2ch Communication Analog • DAC 8-bit × 2 channels Timer RG 8 x l2C ADC Microcontrollers 16-bit, 1ch Master 10-bit, 20ch • Comparator ×2 channels Timer RJ 2 x l2C System 16-bit, 1ch Multi-Master Internal Vref. Communication Interval Timer 8 x CSI / SPI • Operating voltage range: 1.6 V to 5.5 V 12-bit, 1ch 7-, 8-bit Temp. Sensor 2 2 • CSI, UART, I C, Simple I C WDT 4 x UART D/A • Operation state control (flash operating mode 17-bit, 1ch 7-, 8-, 9-bit 8-bit, 2ch Package RTC 1 x LIN Comparator Transition) Calender 1ch 2ch • • 30-pin/32-pin/36-pin/40-pin/44-pin High-speed on-chip oscillator: 64 MHz ±1% System • /48-pin/52-pin/64-pin /80-pin/100-pin DTC Clock Generation ELC Low-speed on-chip oscillator: 15 kHz±15% 24ch Internal, External 26 events • Operating temperature range:-40ºC to +85ºC • DTC, ELC, POR, LVD, different-potential Interrupt Controller POR, LVD Debug w/ trace 4 Levels Single-Wire Communication / +105ºC eference L loc ia ram of rou in ro uct
CPU core supporting multiply and divide/multiply- Featured function: Timer RD (complementary PWM mode) accumulate instructions High-resolution three-phase complementary PWM output ideal for driving DC Added multiply, divide, and multiply-accumulate instructions that enable high-speed brushless motors operation by direct execution without needing to utilize library functions Ability to output three sets of PWM waveforms with no overlap between the forward and reverse phases Overview of multiply, divide, and multiply-accumulate instructions Use of on-chip high-speed oscillator (64 MHz or 48 MHz) as count source supported operation exec cycle → Ability to operate using multiples of the CPU clock frequency for reduced power 8 bits×8 bits=16 bits 1 clock consumption Multiply 16 bits×16 bits=32 bits 2 clock Complementary PWM mode operation example 16 bits / 16 bits=16 bits ... 16 bits 9 clock Divide Register value Compare-match with TRDGRA0 32 bits / 32 bits=32 bits ... 32 bits 17 clock TRDGRA0 TRD0 TRDGRB0 TRD1 Multiply-accumulate 16 bits×16 bits+32 bits=32 bits 3 clock TRDGRA1 TRDGRB1 Points of difference from multiply and divide/multiply-accumulate operation H’0000 Time TRDIOB0 unit on RL78/G12 and RL78/G13 TRDIOD0 No interrupts are generated. TRDIOA1 A carry flag is set when the cumulative result of multiply-accumulate operations TRDIOC1 TRDIOB1 causes an overflow or underflow. TRDIOD1 Timer output
Featured function: Timer RG (phase counting mode) Featured function: Data transfer controller (DTC) This function counts (increments or decrements a counter) at both edges The DTC provides functionality to transfer data from one memory location to when two pulse signals with different phases are input to pins TRGCLKA and another, bypassing the CPU. TRGCLKB. It is ideal for counting in a two-phase encoder. Increased number of transfer channels and activation sources for improved flexibility Support for data transfers among SFRs, on-chip RAM, and flash memory*1 TRGCLKB pin Note: 1. The DTC can only read data from flash memory. DTC disabled DTC enabled TRGCLKA pin Address bus Peripheral Address bus Peripheral CPU function CPU function Bits CNTEN7 to CNTEN0 in CNTEN CNTEN CNTEN CNTEN CNTEN CNTEN CNTEN CNTEN memory memory TRGCNTC register 7 6 5 4 3 2 1 0 Data bus Data bus Setting value of TRGCNT register 1 1 1 1 1 1 1 1 DTC DTC Increment/decrement counter +1 +1 +1 +1 –1 –1 –1 –1 Comparison of DMA and DTC DMA(G13 100pin) DTC(G14 100pin) In combination with the TRGCNTC TRGCLKB pin Number of channels 4 channels 24 channels register value, this function performs Transfer address space 4 KB 64 KB phase counting by incrementing Max. transfer TRGCLKA pin 1024/1024 bytes 256/512 bytes or decrementing a counter when a count/block size Increment Decrement SFR RAM Counter value user-defined input state occurs. Transfer target SFR RAM Flash memory SFR, RAM Number of 21 39 activation sources Repeat and chain Other —— 0000h Time transfers supported 14-15
Featured function: Event link controller (ELC) Direct links between hardware modules No CPU operation needed CPU in sleep state Interrupt Interrupt CPU CPU controller controller Zzzz… Event ELC A/D Event ELC A/D External interrupt, converter External interrupt, converter timer interrupt, timer timer interrupt, timer count-match, count-match,
capture-match,… ... capture-match,… ... Direct and immediate activation Activation occurs even with CPU in sleep state. Interrupt RET instruction, PC store Interrupt handling ELC Link handling Quicker activation (Number of cycles) The ELC function bypasses the interrupt controller, The ELC function enables activation of modules by allowing direct activation of modules by events. events even when the CPU is in the sleep (halted) state.
High-speed module activation Lower power consumption
Featured function: D/A converter (products with ROM capacity of 96 KB or more only) DACS0 register ELC On-chip 8-bit D/A converter (2 channels) that simplifies control of analog 0 output for applications such as audio playback or power supply control R-2R ladder resistor DA0 D/A converter operation 1 DACE0 bit 1. Normal mode Data bus D/A conversion is started by a write operation to the DACSn (n = 0 DACS1 register ELC or 1) register. 0 2. Real-time output mode R-2R ladder resistor DA1
D/A conversion is started using the real-time output signal input by 1 the ELC as the activation trigger. DACE1 bit Featured function: Comparator (products with ROM capacity of 96 KB or more only)
Comparator with two channels and support for switching between high-speed and low-speed modes (one channel on 30-pin SOP products) High-speed mode: Support for high-speed operation for motor control feedback, etc. Low-speed mode: Support for low power consumption during battery monitoring, etc. Ability to use as a window function by combining channels
Comparator block diagram Normal Analog input voltage operation [IVCmp 1:0] IVCMP0 + − Comparator Reference input voltage[IVref 1:0] IVref0 interrupt Interrupt generation IVCMP1 + − IVref1 Window operation Analog input voltage Comparator block diagram IVCMP0 Reference voltage (H:0.76×VDD) + 0.24×Vdd − Comparator IVref0 interrupt Reference voltage (L:0.24×VDD) + Interrupt B: Outside window 0.76×Vdd − Interrupt A: Inside window GENERAL-PURPOSE, ANALOG RL78/G1A RL78/G1A features High-precision A/D converter Low power consumption/standby mode Compact package/extensive peripheral functions 12-bit A/D converter Low power consumption Compact package • Total error: ±1.7 LSB (typ.) • Carries on the low power consumption of the • 3 × 3 mm square : 25-pin LGA package • Conversion time: 3.375 μs RL78 Family • 4 × 4 mm square : 64-pin BGA package Multi-channel analog input • Operating current: 66 μA/MHz Extensive peripheral functions • 28 analog input channels (max.) to support • STOP current: 0.23 μA • Timer (16-bit × 8 channels) input from multiple sensors Standby mode • Data flash (nonvolatile memory for data) • Three modes: HALT, SNOOZE, and STOP • Serial communication (CSI, UART, I2C, etc.) • Reduced average current during intermittent • Fault detection (safety functions) operation
RL78/G1A specifications Memory RL78 16-bit CPU 32 MHz 43.2 DMIPS Program Flash RL78 CPU Core Safety up to 64 KB CISC Harvard Architecture 3-stage Pipeline • Three-stage pipeline CISC architecture • Compliant with European safety standard for SRAM up to 4 KB • Four Register Banks Max. operating frequency: 32 MHz household appliances (IEC/UL 60730) Data Flash 4 KB Memory • Illegal memory access detection 16-bit Barrel Shifter
• Support for 1.8 V flash programming and boot Timers System Safety Analog swap • Advanced-functionality timer array unit (TAU) DMA • • 2 ch RAM ADC Program flash: 16 KB–64 KB Watchdog timer, real-time clock Interrupt Controller Parity Check 12-bit, 28 ch 4 Levels, 18 pins ADC • SRAM: 2 KB–4 KB Analog Internal Vref. Clock Generation Self-diagnostic • Data flash: 4 KB • 1.6 V (VDD) operation Internal, External Clock Monitoring Temp. Sensor System • On-chip ADC, 12-bit × 28 channels, POR, LVD Memory • High-speed on-chip oscillator: 32 MHz ±1% conversion time: 3.375 μs CRC Communication MUL/DIV/MAC • Library support for multiply/divide and • Internal reference voltage (1.45 V) 6 x l2C Debug Timers Master multiply-accumulate operation unit Communication Single-Wire Timer Array Unit 1 x l2C 16-bit, 8 ch Multi-Master • 2 2 Power management CSI, UART(LIN) I C, Simple I C Power Management Interval Timer 6 x CSI • Operating current: 66 μA/MHz Package HALT 12-bit, 1 ch 7-, 8-bit • HALT current: 0.57 μA (SUB + RTC + LVD) • RTC, DMA Enabled WDT 3 x UART 25-pin LGA (3 × 3 mm square) SNOOZE 17-bit, 1 ch 7-, 8-, 9-bit • STOP current: 0.23 μA (SRAM data retained) • 32-pin QFN (5 × 5 mm square) Serial, ADC Enabled RTC 1 x LIN STOP Calendar 1 ch • SNOOZE current: 700 μA (UART), 1020 μA • 48-pin QFP (7 × 7 mm square) SRAM On (ADC) QFN (7 × 7 mm square) eference L loc ia ram of rou in ro uct • 64-pin QFP (10 × 10 mm square) BGA (4 × 4 mm square)
RL78/G1A overview Memory lineup Lineup of RL78 Family products with enhanced analog functions Compact packages and extensive memory capacity options Features Pins ROM 25 32 48 64 RL78 CPU core High performance peripheral • High-performance 16-bit CPU functions 64K 4K 4K 4K 4K 4K 4K 4K 4K • High-speed 32 MHz operation High-resolution 12-bit A/D 48K 3K 4K 3K 4K 3K 4K 3K 4K • Low power consumption converter Improved sensing 66 μA/MHz when running precision, max. 28 channels 32K 2K 4K 2K 4K 2K 4K 2K 4K 0.57 μA/MHz during standby • On-chip high-precision high- 16K 2K 4K 2K 4K 2K 4K (SUB + RTC + LVD) speed clock generator circuit Precision: ±1% RAM size (B) DATA flash size (B) • Data flash: 4 KB Support for multiple sensors of Support for background RL78/G1A operation various types • Multiply and divide/multi- Multi-channel analog input support Infrared sensors, ultrasonic ply-accumulate operation unit sensors, acceleration sensors, among the best in the industry with Reduced CPU load gyro sensors, pressure sensors, 12-bit A/D converter thermistors, etc. 16-17
GENERAL-PURPOSE, WIRELESS RL78/G1H RL78/G1H features Power-efficient microcontroller with sub-GHz band transceiver compliant with IEEE 802.15.4g standard Integration of RF peripheral circuits Ultralow current consumption during reception, among the lowest in RF peripheral balun and filter functions are integrated into the chip. This the industry contributes to a substantial reduction in the design workload and system RF reception: 6.3 mA*1, RF reception standby: 5.8 mA*1 cost. Reception sensitivity: −105 dBm*2 Notes: 1. Typ., VDD = 3.3 V 2. 2GFSK, 100 kbps, BER < 0.1%
Pins IEEE 802.15.4e/g–compliant hardware for reduced CPU load ROM 64 Generates in hardware wireless frames compliant with IEEE 802.15.4g. Provides integrated functionality to automatically distinguish two systems of communication addresses. 512 KB 48 KB 8 KB This reduces the development load, since software it not needed for this processing. 384 KB 32 KB 8 KB Supports ACK reply/receive functionality, including the enhanced format required under the Wi-SUN specification, and CSMA-CA functionality in hardware. This reduces the need to implement complicated 256 KB 24 KB 8 KB
timing control processing in software. RAM size DATA flash size
RL78/G1H specifications Safety RL78 16-bit CPU Core 32 MHz 51.2 DMIPS • Data transfer controller RAM RL78 CPU Core Parity Check MUL/DIV/MAC Instruction • Three-stage pipeline CISC architecture • Event link controller ADC Self-diagnostic • Max. operating frequency: 32MHz Power management Four Register Banks Clock • • Monitoring Support for multiply, divide, and multiply-and- Power-on reset 16-bit Barrel Shifter Memory accumulate instructions • Voltage detection circuit CRC Memory Safety I/O Port Memory Power Management Read back Program Flash HALT • Support for 1.8 V flash programming and boot • Compliant with European household safety up to 512 KB RTC, DTC Enabled swapping standard (IEC/UL 60730) Timers SRAM SNOOZE • Timer Array Unit up to 48 KB Serial, ADC Enabled Program Flash: 256 KB, 384 KB, 512 KB Timers 16-bit, 4 ch + 4 ch Data Flash STOP • SRAM: 24 KB, 32 KB, 48 KB • Advanced-functionality timer array unit (TAU) Timer RJ 8 KB SRAM On • 16-bit, 1 ch Data Flash: 8 KB • Interval timer Interval Timer Communication Analog 12-bit, 1 ch IEEE802.15.4e/g • Watchdog timer, real-time clock 2 x l2C ADC WDT Multi-Master 10-bit, 6 ch • 17-bit, 1 ch IEEE 802.15.4g compliant sub-GHz band Analog 3 x CSI transceiver • RTC 7-, 8-bit IEEE802.15.4e/g On-chip ADC, 10-bit × 6 channels Calendar 2 x UART MAC System Communication 7-, 8-bit PHY/RF • High-speed on-chip oscillator: 32 MHz/24 • CSI×3, UART×2, I2C×2 863 to 928 MHz MHz/16 MHz/12 MHz/8 MHz/6 MHz/4 MHz/3 Package System MHz/2 MHz/1 MHz • HVQFN 9×9mm 64pin, 0.5mm pitch DTC Clock Generation ELC 19 sources Internal, External 12 events Interrupt Controller Debug w/ trace 4 levels POR, LVD Single-Wire
Sub-GHz band transceiver Pass-through data can be selected conditionally based of the following Compliant with IEEE 802.15.4g specification information in receive frames: transmission destination PAN identifier RF frequency range: 863 to 928 MHz (PAN ID), transmission destination short address, or transmission extended Modulation method: 2FSK/GFSK, 4FSK/GFSK address. Data rate: 10 to 300 kbps for 2FSK/GFSK, 200/400 kbps for 4FSK/GFSK
RF reception current: 6.9 mA (typ.) at 3.0 V, 100 Kbps, 2FSK/MCU block stop 920 MHz band 920 MHz band mode Smart meter HEMS HAN RF transmission current: 21 mA (typ.) at 3.0 V, 100 Kbps, 2FSK, +10 dBm/ Application ECHONET Lite MCU block stop mode; 36 mA (typ.) at 3.0 V, 100 Kbps, 2FSK, +13 dBm/ User API Interface B route HAN NWK task#0 NWK task#1 MCU block stop mode Provided MAC task#0 MAC task#1 by Renesas (B route) (HAN) 2-system address filtering RF driver Processing for B route Processing for HAN Provides integrated hardware functionality to automatically distinguish Yes Yes PAN ID PAN ID No No two systems of communication addresses. This makes it simple to use a Short address Short address Discarded Extended address Extended address single chip to process communications for two networks. It also reduces the Filter A Filter B development load, since software it not needed for this processing. Automatic address discrimination function (hardware implementation) GENERAL-PURPOSE, WIRELESS RL78/G1D RL78/G1D features RL78/G1D lineup Pins Power-efficient low-end microcontrollers with Bluetooth® low energy ROM 48 RF with ultra-low current consumption 256 KB 20 K 8 K • 4.3 mA during RF transmission, 3.5 mA during RF reception (using on- chip DC-DC converter, 3 V operation) 192 KB 16 K 8 K • Average current: 9.1 µA (1-second intervals, connection maintained CC-RL compiler) 128 KB 12 K 8 K Contributes to reduced system cost and more compact mounting board • Integrates circuit components necessary for antenna connection. RAM size DATA flash size • Simplifies circuit design and reduces number of external components required. Contributes to smaller mounting area and reduced product cost. 2.4 GHz RF transceiver Adaptable RF technology Compliant with Bluetooth® v4.2 low energy (Master/Slave) specification • Automatic adjustment of transmission output (transmission operating Reception sensitivity: –90 dBm current) to match the communication distance Max. transmission output power: 0 dBm • Optimization that prioritizes low current consumption at short distances Support for wireless updates and prioritizes the communication distance at long distances Software protocol stack provided at no charge
Applications employing Bluetooth® low energy RF transmit and receive currents among the world’s smallest (mA) Applications utilizing Bluetooth® low energy to connect wirelessly with 12 devices such as smartphones while using little power are proliferating 10 rapidly, and include products incorporating wireless tags, such as healthcare and fitness devices, home appliances, and beacons. Renesas provides 8 solutions that support Bluetooth® low energy and enable reliable connections 6 10.9 GOOD 9 with current consumption levels among the lowest in the industry. 4 6.1 5.9 5.5 5.5 4.3 2 3.5
0 A B C RL78/G1D Tx Rx
RL78/G1D specifications
RL78 CPU Core Safety Memory RL78 16-bit CPU 32 MHz 43.2 DMIPS • Three-stage pipeline CISC architecture • Compliant with European safety standard for Program Flash 128 KB to 256 KB CISC Harvard Architecture • 3-stage Pipeline Max. operating frequency: 32MHz household appliances (IEC/UL 60730) SRAM 12 KB to 20 KB Memory • Illegal memory access detection Four Register Banks Data Flash • Support for 1.8 V flash programming and boot swap Timers 8 KB 16-bit Barrel Shifter • Program Flash: 128 KB, 192 KB, 256 KB • Advanced-functionality timer array unit (TAU) • • System SRAM: 2 KB, 6 KB, 20 KB Watchdog timer, real-time clock DMA Safety Communication • 4 ch RAM CSI/UART Data Flash: 8 KB Analog 2 Interrupt Controller Parity Check /Simplified l C x 1 ch System • On-chip ADC, 10-bit × 8 channels, conversion 4 Levels ADC CSI/ 2 • High-speed on-chip oscillator: 32 MHz time: 2.1 μs Clock Generation Self-diagnostic /Simplified l C x 1 ch OCO, External • Library support for multiply/divide and • Internal reference voltage (1.45 V) Clock Monitoring UART x 1 ch POR, LVD Memory CRC 1 x l2C multiply-accumulate operation unit Communication Multi-Master RF • CSI × 2, UART × 2, I2C × 1, Simple I2C × 2 MUL/DIV/MAC Timers Debug Timer Array Unit RF • Bluetooth® v4.2 low energy Master/Slave 16-bit, 8 ch Package Single-Wire Bluetooth 4.2 • RF unit power management • WQFN 6 × 6 mm 48-pin, 0.4 mm pitch Interval Timer Single mode 12-bit, 1 ch Master/Slave • On-chip oscillator circuit for RF: 32.768 kHz Power Management HALT WDT 17-bit AES Engine Power management RTC, DMA Enabled RTC Calendar RF unit Power SNOOZE Management • Transmission current (MCU: STOP): 4.3 mA at 3 V Serial, ADC Enabled Analog Resonator clock: • Reception current (MCU: STOP): 3.5 mA at 3 V STOP 32 MHz SRAM On ADC 10-bit, 8 ch • Sleep current (MCU: STOP, RF: DEEP_SLEEP): 1.4 µA Sub clock OCO: Internal Vref. 32.768 kHz • Stop current (MCU: STOP, RF: POWER_ Temp. Sensor DOWN): 0.3 µA 18-19
RL78/G1D usage configuration examples Modem Configuration
It is possible to develop a modem configuration in which the RL78/G1D is controlled by the host microcontroller loo Pre ure RL78/G1D via a serial connection. This provides flexible support for adding wireless capabilities to applications. UART or SPI Application microcontroller Renesas microcontroller host samples are available. By making use of a host sample, the customer can reduce ei ht cale
the development workload. Flexible adaptation of modem configuration to match application changes art rate Monitor It is possible to develop a combined configuration that makes use of the many peripheral functions of the RL78/ luco e meter G1D. Power-efficient applications can be realized using the RL78/G1D alone. Pe ometer
Embedded Configuration A/D,I2C,SPI Sensor RL78/G1D PORT Switch PORT Porta le acce or LED display a et
Embedded configuration allowing implementation of application using single microcontroller RL78/G1D module RL78/G1D module features Retains the many function pins of the RL78/G1D. Module is compliant with radio laws and Bluetooth® SIG. RL78/G1D (ROM: 256 KB, RAM: 20 KB) RL78/G1D module lineup Convenient compact size (8.95 × 13.35 × 1.7 Pins 24 GPIO output pins can be used as ROM 48 microcontroller peripheral function pins. 20 K 8 K Current consumption among the lowest in the 256 KB industry RAM size DATA flash size Certified compliant with radio laws of Japan (MIC), Europe (CE), and North America (FCC/IC) Bluetooth® SIG certified*1 QD ID: 82194 Operating voltage: 1.6 to 3.6 V*2 Operating temperature: −25 to +75°C Pin count: 42 pins Notes: 1. It is only necessary to register the final product. 2. 1.8 to 3.6 V when using on-chip DC/DC converter.
Block diagram of RL78/G1D module functions Software for checking operation On-chip antenna, LC for DC/DC converter, and 32 MHz crystal oscillator are Software is provided to check the operation of the modem configuration used for ready for immediate use. control by the host microcontroller via the UART. Multiple profiles are supported. 32.768 kHz supplied as default by on-chip oscillator. Customers can also use Renesas custom profiles. Lower power consumption can be achieved by using an external 32.768 kHz The RL78/G1D module can be used in a combined configuration that makes use clock. of the many peripheral functions of the RL78/G1D. The module provides a good • Supplied by host microcontroller balance between size and the number of function pins, making it easy to use in a • Supplied by an external crystal resonator (XT1 or XT2) combined configuration.
VDD Supported profiles Bluetooth® SIG standard profiles LC filter for • Proximity • FInd Me DC-DC converter • Heart Rate • Time Pattern • Alert Notification • Running Speed and Cadence 22 antenna GPIO • Health Thermometer • Blood Pressure • Glucose • Phone Alert Status TxD0 Custom profiles RxD0 UART • General-purpose bidirectional communication RL78/G1D TxD1 • Firmware Update RxD1 PCLBUZ0 EXSLK_RF Host MCU or PC RL78/G1D module 7 P130 RxD TxD(P12/TxD0) 8 RFCTLEN TxD RxD(P11/RxD0) RESET 2 WAKE UP(30/INTP3) GND GND XTAL 32 MHz 4 11 Connections to the host microcontroller use UART 2-wire branch connection.
Exposed GND XT1 XT2 GNDs GENERAL-PURPOSE, MOTOR
Safety RL78 16-bit CPU Core 32 MHz 51.2 DMIPS RL78/G1F RAM Parity Check MUL/DIV/MAC Instruction ADC Self-diagnostic RL78/G1F features Four Register Banks Clock Monitoring Peripheral functions and flexibility have been improved while retaining the same ROM sizes as 16-bit Barrel Shifter Memory CRC the RL78/G14. In particular, analog functions have been strengthened, and the on-chip functions I/O Port Memory Power Management Read back Program Flash HALT are ideal for motor control. up to 64 KB RTC, DTC Enabled Main improvements to peripheral functions compared with RL78/G14 Timers SRAM SNOOZE • Timer Array Unit 5.5 KB Serial, ADC Enabled Rotor position detection for high torque 16-bit, 4 ch Data Flash STOP • Programmable-gain amplifier (PGA) Timer RD 4 KB SRAM On High slew rate of 3.0 V/µs (min.) (VDD ≥ 4.0 V) 16-bit, 2 ch Timer RG Communication Analog 16-bit, 1 ch • 2-channel comparator (CMP0 and CMP1) 6 x l2C Master ADC 10-bit, 17 ch Timer RJ 2 Fast response time of 70 ns (typ.) (1/8 that of RL78/G14) 16-bit, 1 ch 1 x l C Multi-Master Internal Vref • D/A converter (1 or 2 channels) Interval Timer 12-bit, 1 ch 6 x CSI/SPI Temp. Sensor • 7-, 8-bit IrDA communication function WDT DAC 17-bit, 1 ch 3 x UART 8-bit, 2 ch • Debug functions including real-time trace 7-, 8-, 9-bit RTC Comparator Calendar 1 x LIN 1 ch Input Selectable Timer RX Comparator 16-bit, 1 ch IrDA PGA
System DTC Clock Generation ELC Internal, External 33 sources Sub-clock 22 events Interrupt Controller Debug w/ trace 4 levels POR, LVD Single-Wire Motor control functions of the RL78/G1F 120-degree conducting control for sensor-less brushless DC motors Overcurrent detection and forced cutoff of PWM output • On-chip 4-input-selectable high-speed comparator (CMP1) and timer RX • On-chip high-speed PGA for overcurrent detection + high-speed compar- for rotor position detection without the use of sensors ator (CMP0) and control output signal forced cutoff function (PWMOPA) Enables detection of the rotor position when stopped and during high- Supports quick detection of overcurrent conditions and immediate cutoff speed rotation. of PWM output.
PWM control
Sensor-less RL78/G1F Timer RD I/O Inverter (max. 64 MHz) Port brushless DC motor PWMOPA Overcurrent detection Position detection Output forced cutoff CMP0 (stopped state and PGAPGA S during high-speed + − rotation) DAC N ADC CMP1 Timer RX + Detection of the (max. 64 MHz) − rotor’s rotation (Input capture) DAC Position detection position is essential. (during low-speed rotation)
: Functions added to RL78/G1G Programmable-gain amplifier (PGA) for boosting sensor signals 36-pin LGA package (4 × 4 mm) suitable for mobile devices The amplification factor for boosting very small signals is selectable among ×4, • Some functions support separate power supplies on 36-pin and 64-pin ×8, ×16, and ×32. The slew rate ranges from a minimum of 3.0 V/µsec. (3.5 products. By providing separate power supplies (VDD and EVDD) it is V/µsec. (min.) at other than ×32 V (VDD ≥ 4.0 V)). The dedicated GND input possible to perform communication with an SoC, etc., at low voltage with (PGAGND pin) ensures that amplification is not affected by internal noise. running the CPU at high speed. • The 36-pin products allow use of a 32.768 kHz subsystem clock oscillator External (Other than GND PGA Selectable amplification factor (XT1) despite low pin count. 24-pin products) PGAGND 36-pin WFLGA system configuration example • Processed by CPU Internal Vss VDD=2.7V ×4 as A/D conversion X1/X2 System block PGA Amplification is or Resonator/oscillator CPU operating frequency ×8 DD
Selector driven by V unaffected by noise • Compared with main clock XT1/XT2 DAC 1 to 32 MHz : 2.7 to 5.5 V Noise ×16 1 to 16 MHz : 2.4 to 5.5 V
internal to the Selector specified voltage Resonator/oscillator CMP 1 to 8 MHz : 1.8 to 5.5 V microcontroller. ×32 by comparator 1 to 4 MHz : 1.6 to 5.5 V Vss 32.768 kHz GPIO ADC Very small Amplification RL78/G1F EVDD=1.8V IC signal ADC, UART/ AMP IrDA PGAI CMP0 (+) System block CSI driven by EVDD Timer High slew rate of SoC (SPI) 3.0 V/µsec. (min.) Sensor I2C (VDD ≥ 4.0 V) 20-21
RL78/G1G Consumer applications only Ideal for DC brushless motor applications Support for power-efficient maintenance-free motor operation
RL78/G1G Motor control timer Three-phase 6 channels (48 MHz operation supported) complementary PWM Forced shutoff Supported (Hi-Z, H/L output settings supported) Overcurrent detection Programmable-gain amplifier 1 channel (on-chip amplifying resistor) Comparator 2 channels (response time: 0.15 μs [max.]) Comparator reference voltage 8-bit DAC or internal reference voltage of 1.45 V
Application example: Three-phase synchronous PWM support and overcurrent detection circuit for reduced system cost
Three-phase synchronous PWM RL78/G1G PWM output
Three-phase complementary PWM Pin mode Inverter DC brushless motor 6 channels (timer RD) control
Timer output forced stop circuit
10bit A/D measurement also supported ADC + PGA − ×4 to ×16 using on-chip circuit Comparator slew rate: 8-bit DAC or 1.45 V 0.15 µs [max.] On-chip reference voltage
Overcurrent detection
Lineup of products with low pin count and small ROM capacity Memory RL78 16-bit CPU 24 MHz 38.4 DMIPS Program Flash LQFP with 0.8 mm pin pitch for easy mounting using flow soldering 8 KB / 16 KB CISC Harvard Architecture 3-stage Pipeline SRAM 1.5 KB Pins Four Register Banks ROM 30 32 44 System 16-bit Barrel Shifter 16 K 1.5 KB 1.5 KB 1.5 KB Event Link Controller Safety Analog 1.5 KB 1.5 KB 1.5 KB Interrupt Controller 8 K 4 Levels RAM ADC Clock Generation Parity Check 10-bit, 8 ch/12 ch RAM size Note: The RL/G1G is not equipped with data flash. Internal, External ADC Self-diagnostic Internal Vref. POR, LVD Clock Comparator Other functions Debug Monitoring 2 ch Operating current : 75 μA/MHz Single-Wire Memory PGA CRC 1 ch STOP current : 240 nA (SRAM contents retained) Power Management On-chip oscillator : 24 MHz ±2% (Ta = –40 to +85˚C) Timers Communication HALT (48 MHz supply by timer RD for motor control supported) Timer Array Unit 16-bit, 4 ch 2 x UART Compliant with European safety standard for household appliances (IEC/UL SNOOZE Serial, ADC Enabled Timer RD 1 x CSI 16-bit, 2 ch (slave select) 60730) STOP SRAM On Timer RJ 2 16-bit, 1 ch 1 x Simple l C Interval Timer 12-bit, 1 ch WDT 17-bit, 1 ch GENERAL-PURPOSE, USB Common to RL78/G1C and RL78/L1C RL78/G1Cxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx Low-end USB microcontroller roadmap RL78/G1C (USB) RL78 Series next-generation low-end USB microcontrollers World’s first low-end microcontroller with support for USB Battery Charging Specification, Revision 1.2 (BC1.2) Function Support for fast charging and power supply control in addition to USB USB battery charging, USB Host support communication Ability to charge up to 1.5 A using BC1.2 (0.5 A for USB 2.0)
Host Low power consumption during USB operation RL78/G1C Approx. 65% reduction compared with 78K0R, approx. 20% reduction Host compared with R8C Host × 2 channels, Function × 1 channel Flash 32KB Suitable for a broad range of applications 32/48pin QFN/LQFP Peri Host x 2 or RL78/L1C (USB) Function x 1 Function Necessary Functions Target Applications BC1.2 support Mobile batteries BC function Peri Flash 64-256KB USB chargers RL78/G1C 80/100pin LQFP Function x 1 Vending machines Function LCD Driver Printer Flash 32KB Host functionality DVD player 32/48pin QFN/LQFP Smartphone peripheral Function x 1 accessories BC1.2 support Health devices Measuring devices USB memory Function 2012 2013 Mouse / keyboard functionality Handheld terminals Product lineup Barcode readers Pins UPS ROM 32 48 80 100 256 KB 16 K 16 K RL78/L1Cxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx 192 KB 16 K 16 K 128 KB 12 K 12 K RL78/L1C features 100-pin LCD microcontroller with large-capacity ROM 96 KB 10 K 10 K • ROM: 256 KB, RAM: 16 KB (max.) → Suitable for applications with advanced functionality 64 KB 8 K 8 K • Low-power LCD microcontroller retaining the features of the RL78 32 KB 5.5 K 5.5 K 5.5 K 5.5 K microcontroller family
RL78/G1C : 1 x only Function 2 x Host or 1 x Function High-performance 16-bit CPU Low power consumption (particularly low LCD drive current due to RL78/L1C : 1 x only Function divided allocation of LCD capacity) Safety functions (compliant with European safety standard for household USB features (low power consumption) appliances) Operating current among world’s lowest High-resolution ADC • 12-bit ADC to support high-precision sensing Comparison of current consumption (mA) during USB operation → Suitable for sensor measuring devices for consumer and industrial 40 applications Full complement of communication functions 30 • Compliant with Battery Charging Specification, Revision 1.2 (BC1.2) for USB peripherals → Ability to rapidly charge secondary batteries 20 40mA BEST • Variety of serial interface functions CSI/UART/Simple I2C × 4 10 8mA I2C(Multi-Master) × 1 4mA*1 USB Peripheral × 1 10mA 0 Company A Company B RL78/G1C 22-23
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxRL78/G1C Overview of USB controller specifications USB sample firmware USB Host and USB BC1.2 support USB sample firmware is available free of charge. This simplifies system development and reduces the amount of time required. RL78/G1C Reference System User application USB2.0 Function 1 channel
Host device class Function device class Host 2 channels Host version only HID CDC MSC HID CDC USB basic firmware (Host and Function support) Transfer LS(1.5Mbps) Host/Function speed RL78/G1C (USB BC1.2 support)
FS(12Mbps) Host/Function ree am le oftware firmware ote etection control functionalit i im lemente for all e ice cla e HS(480Mbps) Not supported All application notes are available for download on the Renesas website Transfer Control FIFO 64 bytes USB sample firmware mode Bulk FIFO 64 × 2 bytes, double buffering Memory size[kByte] USB function Title Rev ROM*1 RAM*2 Interrupt FIFO 64 bytes Basic firmware 15.0 KB 2.7 KB Host HID (Human Interface Device Class) 14.7 KB 1.9 KB Isochronous CDC (Communication Device Class) 16.1 KB 1.8 KB Basic firmware 10.9 KB 1.4 KB D+ and D– lines, pull-up and HID (Human Interface Device Class) 2.15 10.5 KB 0.8 KB On-chip resistors Peripheral pull-down resistors CDC (Communication Device Class) 10.5 KB 1.0 KB MSC (Mass Storage Class)*2 13.7 KB 2.4 KB Supported battery charging classes Support for Host and Function AOA USB Host Android Open Accesory 15.7 KB 1.6 KB External resonator 48 MHz Downloader USB Peripheral Firmware Update 5.8 KB 0.5 KB On-chip PLL generation Notes: 1. ROM and RAM sizes for CC-RL (V2.05) environment, and ROM and RAM sizes for all Device Classes include size of Basic driver. 2. EEPROM devices used as media.
xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxRL78/L1C Overview of USB battery charging standards USB sample firmware Standards designed to enable rapid battery charging USB sample firmware is available free of charge. This simplifies system Current max. value development and reduces the amount of time required. USB 2.0 standard 500mA System One-third the User application BC1.2 standard 1500mA charging time Function device class MSC HID CDC
USB2.0 0% 100% USB basic firmware (Host and Function support)
RL78/G1C (USB BC1.2 support) BC1.2 0% 100% ree am le oftware firmware ote etection control functionalit i im lemente for all e ice cla e Note: Calculated value USB battery charging application example All application notes are available for download on the Renesas website USB2.0 USB sample firmware
Memory size[kByte] RL78/L1C USB function Title Rev Main BC1.2 ROM*1 RAM*2 CPU Basic firmware 10.9 KB 1.4 KB HID (Human Interface Device Class) 10.5 KB 0.8 KB Peripheral Charging IC CDC (Communication Device Class) 2.15 10.5 KB 1.0 KB MSC (Mass Storage Class)*2 13.7 KB 2.4 KB Data communication possible during USB battery charging Downloader USB Peripheral Firmware Update 5.8 KB 0.5 KB Notes: 1. ROM and RAM sizes for CC-RL (V2.05) environment, and ROM and RAM sizes for all Device Classes include size of Basic driver. 2. EEPROM devices used as media. Memory RL78 CPU 20 MHz Operation Program Flash GENERAL-PURPOSE, 8-bit 4 KB, 8 KB CISC Harvard Architecture 3-stage Pipeline SRAM 512 B, 1 KB 20 [email protected] V to 5.5 V, RL78/G1M 5 [email protected] V* to 5.5 V System Voltage range: 2.0 V* to 5.5 V Interrupt Controller RL78/G1M features 4 Levels Clock Generation Safety Analog Internal ADC e8-bit Cor TRAP function SPOR 8/10-bit, 8 ch Max. Operating Freq. 5 [email protected]~5.5 V/ 20 [email protected]~5.5 V (Selectable Power On Reset) Small Pin Count (20pin TSSOP), Small ROM(4 KB or 8 KB) On-Chip Timers Communication Debugging Timer Array Unit UART Realtime Output for Motor Control 16-bit, 4 ch 1 ch 120-degree energization control (can drive BLDC Motor) Power Management Interval Timer CSI 12-bit, 1 ch 1 ch HALT RL78/G1M lineup WDT STOP Pins SRAM On Real Time Output ROM 20 8 ch e thi ro uct within the olta e ran e from to ecau e the etection 8 K 1 KB olta e P of the electa le ower on re et P circuit houl al o e con i ere 4 K 512 B
RAM size
Memory RL78 CPU 20 MHz Operation GENERAL-PURPOSE, 8-bit Program Flash 4 KB, 8 KB CISC Harvard Architecture 3-stage Pipeline SRAM 512 B, 1 KB 20 [email protected] V to 5.5 V, RL78/G1N 5 [email protected] V* to 5.5 V System Voltage range: 2.0 V* to 5.5 V Interrupt Controller RL78/G1N features 4 Levels Clock Generation Safety Analog Internal ADC e8-bit Cor TRAP function SPOR 8/10-bit, 8 ch Max. Operating Freq. 5 [email protected]~5.5 V/ 20 [email protected]~5.5 V (Selectable Power On Reset) High Current Output Timers Small Pin Count (20pin TSSOP), Small ROM(4 KB or 8 KB) On-Chip for LED Display Debugging Timer Array Unit High Current Output for LED Display 16-bit, 4 ch COM: 6 ch SEG: 8 ch (COM 6 ch; 120 mA (duty; 45%), SEG 8 ch; 15 mA) Power Management Interval Timer 12-bit, 1 ch (can directly drive super luminosity LED, 8-seg × 6-digit) HALT Communication WDT UART STOP 1 ch RL78/G1N lineup SRAM On CSI Pins 1 ch 20 ROM e thi ro uct within the olta e ran e from to ecau e the etection olta e P of the electa le ower on re et P circuit houl al o e 8 K 1 KB con i ere
4 K 512 B
RAM size
Memory RL78 16-bit CPU 32 MHz 43.2DMIPS LOW-PIN-COUNT, ANALOG Program Flash 16 KB CISC Harvard Architecture 3-stage Pipeline SRAM 1.5 KB Four Register Banks RL78/G1P Data Flash 2 KB 16-bit Barrel Shifter RL78/G1P features System DMA Safety Analog Max. Operation Freq. 32 [email protected]~3.6 V 2 ch RAM ADC Small Pin Count (24pin QFN, 32pin QFP) Interrupt Controller Parity Check 12-bit, 6 ch/8 ch 4 Levels ADC Internal Vref. Small ROM (16 KB) Clock Generation Self-diagnostic Internal, External Clock DAC High-Function Analog (12-bit A/D, 10-bit D/A*) Monitoring 10-bit, 2 ch POR, LVD * Only among General RL78 Memory CRC Communication MUL / DIV / MAC RL78/G1P lineup UART Debug Timers 1 ch Pins Single-Wire 24 32 Timer Array Unit CSI ROM 16-bit, 16 ch 1 ch Power Management WDT IIC 16 K 1.5 K 2 KB 1.5 K 2 KB HALT 17-bit, 1 ch 1 ch (2 slave address) DMA Enabled RAM size DATA flash size SNOOZE Serial, ADC Enabled STOP SRAM On 24-25
MEMO LCD RL78/L12, L13, L1C LCD microcontroller product roadmap New successor products combining the features of earlier LCD microcontrollers
~ 2011 2012 2012 2013 1H 2H 1H
78KOR/Lx3 RL78/L1C USB Analog 80-pin to 128-pin
R8C/L3x RL78/L13 LCD Standard
52-pin to 100-pin R8C/LAx RL78/L12 Low Pin Count 32-pin to 80-pin 78KO/Lx3
48-pin to 80-pin Ultra-low-power LCD microcontrollers
RL78/L12, RL78/L13, and RL78/L1C product concept Low-power LCD driver L12 L13 L1C Capacitor split type for generating LCD drive voltage Blood pressure meters 89% reduction in current consumption Composition meters compared with previous product Healthcare Blood glucose meter Particularly large reduction in LCD drive current Pedometers Thermometers Support for many segment LCD panel types Rice cookers Resistance division type suitable for large panels Electric Voltage boost type suitable for battery powered household Microwave ovens appliances systems Hot water pots Capacitor split type suitable for very small currents LCD remote controls Compact electric Hot water heaters Return of panels with very large segment counts household Telephones Max. display segment count: 416 appliances Kitchen tools Temperature controllers Measuring Sensor modules devices Flow meter
RL78/L12, L13, L1C Product lineup Pins ROM 32 44 48 52 64 80 100 256 KB RL78/L13 16 K 16 K 192 KB 16 K 16 K 128 KB 8 K 8 K 12 K 12 K 96 KB 6 K 6 K 10 K 10 K 64 KB RL78/L12 4 K 4 K 8 K 8 K 48 KB 2 K 2 K RL78/L1C 32 KB 1.5 K 1.5 K 1.5 K 1.5 K 1.5 K 1.5 K 1.5 K 16 KB 1 K 1 K 1 K 1 K 1 K 1 K 1 K 8 K 1 K 1 K 1 K 1 K
RAM RL78/L12 : 32-pin - 64-pin RAM RL78/L13 : 64-pin - 80-pin RAM RL78/L1C : 80-pin - 100-pin 26-27
LCD display seg × com lineup Ultra-low standby current consumption (clock counter + LCD display) At each pin count the new products support higher segment counts Capacitor split provides extremely low current consumption when than earlier products. driving LCD panels.
Seg count Pins Company Company Company Company (4 com) 32 48 52 64 80 100 128 Renesas RL78/L1x A B C D
51 56 56 54 1 50 or more * Resistance 11.7 μA 12.0 μA 11.6 μA (typ.) Not Not 45 - 49 48 division method*2 (@2.2 V) implemented (@1.8 V) implemented 40 - 44 40 40 Capacitor split Not Not Not Not 7.35 μA (typ.) implemented implemented implemented implemented 35 - 39 39 40 method Voltage boost Not 30 - 34 30 32 32 32 31 32 21.19 μA (typ.) 24.5 μA 22.9 μA 23.7 μA method implemented 25 - 29 26 24 Current during LCD drive during LCD Current Notes: 1. Current value including sub-oscillator, RTC operation, LCD operation and current flow to LCD panel. 20 - 24 22 24 24 The calculation assumes an LCD panel drive current of 10 μA when using the resistance division 15 - 19 method. (The value differs depending on the drive method.)
9 - 14 13 9 2. Calculated using an external resistance value of 1,000 kΩ for the external resistance division method. RL78/L1x 78K0R/Lx3 78K0/Lx3 R8C/L3xx R8C/LAxx
Supports the three typically used LCD drive methods. Enables LCD circuits with ultra-low power consumption.
Features/anticipated applications
For heavy-duty LCD/AC power supply applications Using resistance division to generate the drive voltage achieves high LCD drive capacity at low cost. External resistors are used for voltage division to generate the LCD drive voltage. The ability to input an external voltage means that external resistors and capacitors can be used to adjust the operating current and drive capacity. Resistance Microwave ovens division method High Good Standard Dependent on VDD Washing machines
Display dims as power supply Suitable for large LCD panels 10.4 µA[typ.]*1 voltage drops. Rice cookers
For battery-powered applications The operating current is small and the drive voltage remains constant even when the battery voltage drops, so there is no dimming of the LCD display. The reference voltage is generated internally, and external capacitors are used to boost the voltage. The reference voltage can be adjusted by software in order to modify the LCD contrast. (On Internal the RL78/L12, 18 setting steps are supported.) voltage boost Kitchen tools method Small Constant Good Standard Good current No change when power supply voltage from battery, etc., drops, 0.63µA[typ.]* so no dimming of display. Composition meters LCD remote controls For battery-powered applications This method uses the smallest operating current. The LCD display dims when the battery voltage drops. It can be used without modification in cases where the aim is to dim the display according to the remaining battery capacity. To prevent the display from dimming as the battery voltage drops, the system can switch to the internal voltage boost method Capacitor when the battery voltage is low. It is also possible to use the internal voltage boost method with the capacitor split method implemented in an external circuit. split method
Very Thermometers Very Dependent on VDD Activity meters High Good small current Good Display dims as power supply 0.12µA[typ.]*1 voltage drops.
Note: 1. Drive voltage: 3 V, 1/3 bias, external resistance value: 1,000 kΩ, no LCD panel connected LCD, ANALOG RL78/L1A RL78/L1A features RL78/L1A lineup Pins On-chip analog functions, low current consumption, low-voltage analog, on-chip LCD driver ROM 80 100 This power-efficient 16-bit LCD microcontroller is ideal for use in portable healthcare devices 128 K 5.5 K 8 KB such as blood glucose meter. 96 K 5.5 K 8 KB 5.5 K 8 KB World-top-class power efficiency Current consumption during operation: 66 μA/MHz 64 K 5.5 K 8 KB 5.5 K 8 KB In RTC mode: 1 μA or less 48 K 5.5 K 8 KB Notable analog functions RAM size DATA flash size On-chip 12-bit ADC and 12-bit DAC that maintain consistent accuracy up to 2.0 V
Rail-to-rail op-amp with analog switch Memory RL78 16-bit CPU 24 MHz 38.4 DMIPS Program Flash up to 128 KB CISC Harvard Architecture 3-stage Pipeline RL78/L1A specifications SRAM RL78 CPU Core • RAM parity error detection function 5.5 KB MUL/DIV/MAC instruction Data Flash • Three-stage pipeline CISC architecture • Illegal memory access detection 8 KB Four Register Banks • • ADC test function 16-bit Barrel Shifter Max. operating frequency: 24MHz System Memory Timers Safety Analog DTC/ELC • Support for 1.8 V flash programming and boot swap • Advanced-functionality timer array unit (TAU) RAM ADC Interrupt Controller Parity Check 12-bit, 14 ch • Program Flash: 48 KB–128 KB • Watchdog timer, real-time clock 4 Levels ADC DAC • SRAM: 5.5 KB Analog Clock Generation Self-diagnostic 12-bit, 2 ch Internal, External Clock Op-Amp • • Monitoring 3 ch Data Flash: 8 KB 12-bit ADC × 14 channels POR, LVD • Memory Comparator System 12-bit DAC × 2 channels Debug CRC 1 ch Single-Wire • High-speed on-chip oscillator: 24 MHz Communication Internal Vref. Timers • Low-speed on-chip oscillator: 15 kHz • 3 × SCI: Simple SPI/simple I2C/UART Temp. Sensor Power Management Timer Array Unit Power management LCD HALT 16-bit, 8 ch Communication RTC, DTC Enabled Interval Timer • Power-on reset (POR) • 32 seg × 4 com (80-pin) SNOOZE 16-bit/8-bit, 1 ch/2 ch l2C Multi-Master • Low-voltage detection circuit (LVD) • 45 seg × 4 com (100-pin) Serial Enabled Interval Timer STOP 12-bit, 1 ch CSI/UART/ • Simplified I2C RTC output (1 Hz) × 1 Package SRAM On RTC 4 ch Safety • LFQFP 12 × 12 mm 80-pin, 0.5 mm pitch Calendar
• Compliant with European safety standard for • LFQFP 14 × 14 mm 100-pin, 0.5 mm pitch 45 seg x 4 com LCD Internal Boost Split Cap. household appliances (IEC/UL 60730) 41 seg x 8 com
Analog frontend function configuration Features of analog functions In blood glucose meter use case I/V conversion with transimpedance amplifier
ANALOG RL78 16-bit CPU BGR REF VREF AD_VREFM AD_VREFP 24 MHz VREF 38.4 DMIPS 12-bit - + OPA3 Charge SW AVdd 1.8 – 3.6 V SAR TEST STRIP Pump control -40 to +85 °C ADC
OPA1 - VREF + OPA Rail to Rail DAC0 VREF 12bit - 12bit SAR ADC + Rail to Rail DAC0 VREF 12-bit
- OPA2 + AVdd Rail to Rail DAC0 VREF 12bit Using analog switches, you can switch among the external feedback resistors. It can be accomplished by means of software. So they helps you to create a common board design for use with multiple product types. 28-29
Low-voltage operation of analog functions Analog functions maintain accuracy while operating at 2.0 V. Low-voltage operation contributes to extended battery life.
Example discharge characteristics of lithium-ion coin battery* 3.6V
Company RL78/ A L1A 2.7V
2.2V Example discharge characteristics of alkaline batteries (× 2)** References 2.0V * : Maxcell CR2032 ADC and DAC operate even at less than 2.0 V. 1.8V ** :Toshiba LR6
Time
Enhanced on-chip microcontroller functions to reduce the number of system components Peripheral functions such as AFE, main clock, and EEPROM are incorporated into the microcontroller. This reduces the number of additional components required.
Main clock SW
32.768 kHz 32.768 kHz LCD LCD - Diode Diode + Detect Detect Test reverse Test S reverse strip W battery strip On-chip OSC battery SW - LCD LCD + Reset Reset driver - driver IC + IC Temp RTC RTC sensor 12-bit Bat. Temp SW Bat. Buzzer Buzzer Buzzer DAC sensor Buzzer MCU - MCU + 12-bit CSI BLE CSI BLE ADC 12-bit 2 ADC 2 I C EEPROM I C 12-bit UART I/O ADC UART I/O
Calibration Calibration
RL78/L1A RPB (Renesas promotion board) Blood glucose meter reference solution is coming soon RL78/L1A RPB is available to evaluate an RL78/L1A for your products. We plan to expand its range of reference solutions and application notes for blood glucose meter. It utilizes analog functions of RL78/L1A, Features such as 12-bit A/D and 12-bit D/A converters and op-amps. Operates on USB power supply. Outputs trace data via USB. Supports connection of an LCD display. Includes a 128 × 128 color dot matrix PMOD display. ASSP, LIGHTING/POWER SUPPLY RL78/I1A RL78/I1A features RL78/I1A lineup Basic peripheral functions for lighting and power supply applications Pins 20 30 38 • Timers for LED control and PFC control ROM 64 MHz source clock, zero current detection, forced output stop function 64 KB 4 K 4 K • Analog functions for feedback 10-bit A/D converter (2.125 μs. conversion), PGA, comparator 32 KB 2 K 2 K • Support for high temperatures up to 105°C or 125°C Current consumption RAM size • LED power supply control: 3.3 mA (main operation), CPU clock: 16 MHz, Operating temperature ranges up to 105°C or 125°C supported timer KB clock: 64 MHz, PLL: on • UART (DALI) receive standby: 0.23 μA (STOP current) Main applications Full complement of connectivity functions • LED Lighting, Lighting switches • 2 Communication functions (DALI, PMBus, SMBus, DMX512, UART, I C, • Digital power supplies CSI) • Illumination fixtures Special peripheral functions for “intelligent” operation and improved • Laser printers efficiency • Microwave ovens • Dithering function (0.98 ns pseudo-resolution), software start function, • Vacuum cleaners max. frequency limit function, interleaved PFC, standby communication • Communication devices wait
Advantages of RL78/I1A Dithering function Linked operation of 16-bit timer KB and INTP comparator Support for multiple power supply control methods Delivers min. average resolution of 0.98 ns. Timer restart function Forced output stop function AC/DC (PFC) control circuit PFC control mode (Hi-Z/Hi/Lo) Boost converter CRM-PFC control (DCM or (CRn1-CRn0) +1 (CRn3-CRn2) +1 Flyback converter CCM also supported) FFFFh CR3 Counter TKBOxx DC/DC control circuit Constant-current control mode CR1 Buck converter Average-current control CR2 TKBOxx TKBOxx Boost converter Peak-current control CR0 Flyback converter 0000h INTP2x INTCMPx Half-bridge PFC control Protection function Full-bridge TKBOn1 DALI master/slave communication functions TKBOn1 Manchester coding Fine-grained lighting and voltage control Transmit/receive data: 8-, 16-, 17-, or 24-bit
DALIRxD4
DALITxD4
Implementation in hardware of System configuration example: PFC control + LED constant current control communication functions for lighting PFC control LED control×4ch
LED current feedback/ AC power 4 over current protection supply LED current control/ 4 dimming control High-resolution PFC control Hi-Z Timer KB2 Hi-Z Timer KB0 Soft-start/Dithering Over current Control Restart control protection Gate CMP control Hi-Z Zero current PFC Timer KB1 Soft-start/Dithering detection control INTP PFC output voltage feedback Timer KC 4 CMP AC input voltage feedback CPU process Interrupt -PFC feedback -Communication Color mixing CMP AC input detection -LED feedback -AC input detection CMP/ -Dimming control PGA CMP CMPCOM DALI/DMX512/IR communication A/D Converter PI Low-sense CMP DALI/UART calculation resistor Communication INTP/TI00 Protection RL78/I1A 30-31
ASSP, ELECTRICITY METER
RL78/I1B Europe China U.S.A. Standard: IEC Standard: GB/T Standard: ANSI Voltage: 220 V Voltage: 220 V Voltage: 110 V Target electricity meter markets of RL78/I1B Anti-tampering
Electricity meter types Source Meter Load Source Meter Load Source Meter Load
I1 I1 I1 Wiring Type Main Applications Main Regions V1 V1 V1 India Japan Single-phase, two-wire Home Europe, China, India Standard: CESC V2 Standard: Voltage: 220 V I2 JIS standard Single-phase, three-wire Home Japan, U.S.A I2 I2 V2 Anti-tampering Voltage: 100 V Three-phase, three-wire Commercial/industrial Worldwide Single-phase, two-wire Single-phase, three-wire Three-phase, three-wire Bird’s eye view of electricity meter standards
RL78/I1B lineup and concept Product lineup to accommodate various meter types Pins 80 100 ROM Four products 128 KB 8 K 8 K 64 KB 6 K 6 K
RAM size
Aiming for low power consumption Low power consumption among the best in its class: Power efficient during both calculations and backup operation Low power consumption Lowest power consumption at all operating frequencies • Operating current: 96 μA/MHz mA • Standby current: 0.69 μA (during RTC or LVD operation) 12 24-bit ΔΣ ADC 10 • Current during ADC operation: 0.53 mA/channel 8 6 B t 25% lower power consumption than competing products*1 4 2 7 RL78/I1B C B A CPU@6MHz & ADC 0 6 3ch operation 0 5 10 15 20 25 30 MHz 5 4 MCU RL78/I1B A B C 6.6mA 25% Over 7mA CPU Frequency 3 (MHz) 64/128 KB Up to 32 KB Up to 120 KB Up to 128 KB 2 4.5mA 3.3mA 3 2.8 4.35 5.1 3.525 ADC 3-channel operation 1 6 3.3 5.55 6.6 4.595 at each CPU operating 0 12 4.2 — 9.6 6.695 B C RL78/I1B D frequency (MHz) ote a e on re earch ene a 24 6 — — 10.725
ΔΣ ADC with improved functionality for electricity meters High-speed on-chip oscillator with accuracy of ±0.05% Implementation in hardware of functions essential for power measurement Subclock resonator single-crystal system Phase correction circuit, high-pass filter Exclusive Renesas system is more robust than conventional PLL designs.
RL78/I1B system Clock calibration + RL78/I1B Temp.sensor RL78 ∆Σ ADC ch0 Digital AFE CPU core with temperature − (Current channel) Phase filter High distortion pass RTC GND control Sub-Clk Sub-Clk + ∆Σ ADC ch1 (PHC) Digital filter compensate clock Conventional clock system (HPF) oscillator circuit 1 − (Voltage channel) filter 32.768 kHz Error detection with comparing Current system 2 3 4 Trouble Load GND GND High-speed Error detection to sub-clock Temp.sensor CPU core OCO RTC 1 Original waveform 2 Before phase compensation 3 After phase compensation 4 Reduced DC noise Sub-Clk Sub-Clk compensate clock System oscillator circuit DC Noise Frequency 32.768 kHz SW Clock trimming Trouble PLL High-speed High-speed oscillator OCO 20 MHz 16 MHz 24-bit ADC (option) The microcontroller can continue operating using • Designed for low power consumption the on-chip oscillator if the external resonator stops. Clock instability due to PLL self-oscillation • Reduced CPU operating frequency that contributes to lower power High-precision clock: ±0.05% (high-speed on-chip oscillator with correction circuit) consumption (on-chip PHC and HPF) • Correction of on-chip oscillator by subclock (exclusive Renesas circuit) To further cut power consumption ... Safety functions: Clock system • Support for multiple sampling frequencies (3.906 kHz and 1.953 kHz) • High-speed on-chip oscillator maintains oscillation at ±1% accuracy even if external resonator stops operating. ASSP, ELECTRICITY METER
RL78/I1C Wiring Type Main Applications Main Regions Single-phase, two-wire Home Europe, China, India RL78/I1C target markets Single-phase, three-wire Home Japan, U.S.A Ideal for smart meters, including those using DLMS communication. Three-phase, three-wire Commercial/industrial Worldwide Suitable for a wide variety of power platforms, from single-phase two-wire Commercial/industrial to three-phase four-wire. Worldwide Three-phase, four-wire Agriculture/urban housing
RL78/I1C lineup Pins 64 80 100 Available flash memory configurations are 512 KB or 256 KB for high-end ROM single-phase and three-phase meters, and 128 KB or 64 KB for low-end 512 KB 32 K 32 K single-phase meters. (256KB × 2 bank) Available package pin counts are 64, 80, and 100 pins to accommodate a 256 KB 16 K 16 K variety of requirements regarding peripheral functions and mounting space. 128 KB 8 K 8 K 8 K 64 KB 6 K 6 K
RAM size RL78/I1C features World’s first Continuous Metrology FOTA* solution that solves the problem of power meter operation stopping during firmware updates • The RL78/I1C’s bank programming and bank swapping functions and improved 32-bit multiply-accumulator enable continuous power meter operation during firmware updates. *: Firmware update Over The Air
Meter F/W Running (Bank0) execution Firmware Download & Programming Running (Bank1)
Bank program Bank swap
In operation Update request In operation In operation Program Erase Updated App. B App. C App. B App. A App. B Erasing / area Programming (Old) (New)
Metrology F/W Metrology F/W Metrology F/W Metrology F/W Metrology F/W Metrology F/W Fixed FOTA F/W FOTA F/W FOTA F/W FOTA F/W FOTA F/W FOTA F/W area Boot Boot Boot Boot Boot Boot
Bank0 Bank1 Bank0 Bank1 Bank0 Bank1 App. C Firmware First in the industry to implement AES GCM mode in hardware, as required Approx. 30% improvement in arithmetic capacity required for power calculation. by the DLMS standard. • On-chip PLL boosts the maximum operating frequency from 24 MHz to 32 MHz. • Encryption and decryption are over 20 times faster than the software • 32-bit multiply-and accumulate unit dramatically reduce the software processing used on previous Renesas products. burden when performing calculations on 24-bit data converted by the Power measurement processing and DLMS processing on a single chip. 24-bit ΔΣ A/D converter. • Ability to handle DLMS communication while power measurement Independent power supply real-time clock processing is taking place. • Current consumption of 0.7 μA (typ.) during operation • Approx. 30% reduction in power consumption compared with two-chip Enhanced power supply monitoring function solutions combining an earlier meter microcontroller and a dedicated • Low-voltage monitoring of power supply pins using LVD and improved microcontroller for DLMS processing. battery backup function to deliver power to the CPU and peripheral • Contributes to the system cost reduction. functions when power is interrupted.
EVDD1 Neutral-IN Main supply I/O power supply (EVDD) EVDD0
ΣADC I/O power supply (VDD) VDD Flash/RAM CPU Regulator AC/DC LVD Tamper Voltage detection circuits Super 10bit ADC detect Cap 2.2 V EXLVD for power supply pins Peripherals LVD Energy-efficient power Discrete power supplies Register VBAT outage/recovery detection
Extra LVD VRTC SubOSC RTC Battery (CR2032) VRTC Power domain Independent power LVD RTC Battery supply RTC domain (CR2032) 32-33
ASSP, DETECTOR/SENSOR RL78/I1D RL78/I1D features RL78/I1D lineup Low power consumption for extended battery life Pins 20 24 30 32 48 • High-speed recovery from STOP mode in just 3.4 μs, and supply of ROM operating current in 124 μA when operating at 1 MHz. 32 KB 3 K 3 K 3 K • Ability to operate peripheral circuits (sensor activation, signal amplification, obtaining A/D conversion results) without CPU 16 KB 2 K 2 K 2 K 2 K 2 K intervention. Ability to determine whether it is necessary to activate the CPU based on A/D conversion results. 8 KB 0.7 K 0.7 K 0.7 K On-chip analog functions needed for security and emergency applications • On-chip general-purpose op-amp, 12-bit A/D converter, and comparator RAM size
Memory RL78 16-bit CPU RL78/I1D specifications 24 MHz 38.4 DMIPS Program Flash RL78 CPU Core Safety up to 32 KB 34 MHz: 2.7 V to 3.6 V 4 MHz: 1.6 V to 3.6 V • • SRAM Three-stage pipeline CISC architecture Compliant with European safety standard for up to 3 KB MUL/DIV/MAC Instruction 16-bit Barrel Shifter • Max. operating frequency: 24 MHz household appliances (IEC/UL 60730) Data Flash 2 KB • Support for multiply, divide, and multiply- Timers -40 to 105°C operation accumulate instructions • Advanced-functionality timer array unit (TAU) System Safety Analog • DOC (Data Operation Memory 8-bit interval timer (can be used as 16-bit Circuit) RAM ADC • Support for 1.8 V flash programming and boot interval timer) ELC (Event Link Parity Check 12-bit, up to 17 ch swap • Watchdog timer, real-time clock Controller) ADC Comparator DTC (Data Transfer Self-diagnostic 2 ch • Program flash: 8 KB–32 KB Analog Controller) Clock Op-Amp • OCD (Single-wire Monitoring up to 4 ch SRAM: 0.7 KB–3 KB • 1.6 V (VDD) operation On-chip debugger) Memory Internal Vref. • Data flash: 2 KB • On-chip ADC, 12-bit × 17 channels, POR CRC (Power On Reset) I/O port Temp. Sensor System conversion time: 3.375 μs LVD (Low Voltage Read Back • High-speed on-chip oscillator: 24 MHz ±1% • Internal reference voltage (1.8 V) Detector) • • Interrupt Controller Timers Communication Middle-speed on-chip oscillator: 4 MHz ±12% Op-amp × 4 channels (high-speed and low- 4 Levels Timer Array Unit CSI 16-bit, 4 ch up to 2 ch (support for high-speed wakeup in 3.4 μs) power modes) (1 ch: 2 x 8-bit) Power Management UART Power management • Comparator × 2 channels (window mode Interval Timer 1 ch Fast wake up 12-bit, 1 ch • support) 4 µs l2C Operating current: 58.3 μA/MHz Interval Timers up to 2 ch, Master HALT 8-bit, 4 ch • HALT current: 0.64 μA (RTC + LVD) Communication RTC, DTC Enabled Window WDT 2 • STOP current: 220 nA (SRAM data retained) • CSI, UART, Simple I C SNOOZE 17-bit, 1 ch Serial, ADC Enabled • SNOOZE current: 700 μA (UART), 500 μA RTC Package STOP Calendar (ADC) • 20-pin, 24-pin, 30-pin, 32-pin, 48-pin SRAM On
SNOOZE mode operation example
DTC activation 8-bit timer Sub clock 1 Switch 4 RAM Op-amp Sensor DTC Op-amp activation Data 3 Sensor transfer Amplification signal controller 2 12-bit timer ADC activation GND Sub clock ADC 5 Determination DOC of need for CPU activation
Operation procedure ➀sensor activation, ➁ADC activation, ➂obtaining A/D conversion results, ➃storing A/D conversion results in RAM, ➄transmission of A/D conversion results to DOC (determination of need for CPU activation) ASSP, ANALOG
Memory RL78 16-bit CPU RL78/I1E 32 MHz 51.2 DMIPS Program Flash 32 KB CISC Harvard Architecture 3-stage Pipeline RL78/I1E features SRAM 8 KB High-precision analog functions Four Register Banks Data Flash • 24-bit ΔΣ A/D converter × 4 channels 4 KB 16-bit Barrel Shifter • 10-bit SAR A/D converter × 10 channels • Configurable amplifier × 3 channels System DTC Timers Analog • 12-bit D/A converter × 1 channel 23 sources Timer Array Unit Delta-Sigma ADC • Sensor power supply × 1 channel ELC 16-bit, 6 ch with Instrumentation AMP 16 sources Timer RG Compact package 24-bit, 4 ch Interrupt Controller 16-bit, 1 ch SAR ADC • 4 mm square: 36-pin FBGA 4 Levels Timer RJ 10-bit, 10 ch • 5 mm square: 32-pin VQFN 16-bit, 1 ch POR, LVD Op-Amp Support for high temperatures WDT 3 ch On-chip Debug • −40 to 105°C Single-Wire DAC • −40 to 125°C RTC 12-bit, 1 ch Temperature Interval Timer Power Management sensor 12-bit, 1 ch Main OSC RL78/I1E lineup 1-20 MHz Sensor Bias Communication Pins HOCO ROM 32 36 32 MHz/24 MHz 2 x CSI /2 x UART Safety LOCO 2 15 kHz /2 x Simplified I C CMOS In/Out 32 KB 8 KB 8 KB (exclusive) 11 ch PLL 32 MHz/24 MHz CMOS Input RAM Size 3 ch
On-chip 24-bit ΔΣ A/D converter Sensor AFE* circuits for many types of sensor measurements, including using power Reference voltage source supply pressure sensors, load cells, and thermocouples, integrated on a single chip. Ability to use common sensor power supply and ADC reference voltage, Instrumentation 24-bit Digital Filter minimizing ratiometric error. amplifier ∆ΣADC CPU *AFE: Analog Front End (SINC3)
Integrated temperature sensor
Common power supply for single-end input
On-chip configurable amplifier Code generation tool for RL78/I1E General-purpose analog I/O ports and configurable switches enable This GUI-based tool lets you specify a variety of information and configuration of a variety of op-amp circuits. Integrated peripheral analog functions automatically generates code for analog circuit control programs. PGA + ΔΣ A/D converter settings As a general-purpose As a DAC output amplifier amplifier Configuration examples – – + + Sensor As a programmable-gain IV VREF LDO2 LDO1 12-bit bias DAC amplifier* Memory To 10-bitA/D Code converter flash Input 24-bitDS Digital RAM Mux1 PGIA ADC Filter Iin (SINC3) Data – flash Configurable amplifier settings Temperature + sensor CPU 12-bit DAC Config AMP Timer OSC To 10-bitA/D Config Input 10bit converter AMP Mux2 SAR-ADC Serial I/F As a programmable-gain UART Config AMP non-inverting amplifier* SPI 12bit – 2 DAC I C + Vin