RZ Embedded Microprocessors

Next Generation High Performance Solutions RZ Embedded Microprocessors

www.renesas.eu 2015.05 The RZ Family

Embedded Microprocessors

The RZ is a new family of embedded microprocessors fusing control and information technology (IT) to that retains the ease-of-use of Renesas micro- provide the solutions necessary for the smart society processors (MPUs) while combining Renesas’ of the future. proprietary technologies with the ARM® ecosystem,

RZ Family Roadmap

RZ/N Series

Connectivity

RZ/T Series Page 9

High-Speed Real-Time with Industrial Ethernet

RZ/A Series Page 3

Human Machine Interface

All aspects of everyday life, such as home appliances, to have IT networking capability, human machine interface industrial equipment, building management, power grid, display capability, faster data processing capability, and so and transportation, are becoming more technologically on in addition to providing high performance and power advanced, and the emergence of a smart society saving control for devices. It was in this environment that interconnected through the cloud is nigh. To meet the the RZ Family was developed as a new lineup of high-end demands of this smart society, microprocessors are required embedded microprocessors that employ an ARM® core.

2 www.renesas.eu The RZ/A Series

Introduction

The RZ/A family extends the SuperH (SH726x) based lowest performance SH2A based devices up to the family including the peripheral functions for driving a 400 MHz ARM® Cortex-A9 solutions. display and providing a scalable solution from the

RZ/A Roadmap

RZ/A1-H @400 MHz 10 MB SRAM USB, Ether, LCDC RZ/A1-M @400 MHz 5 MB SRAM RZ/A1-L USB, Ether, LCDC @400 MHz 3 MB SRAM USB, Ether, LCDC >266 MHz Cortex A9® Core <266 MHz SH2A Core 7268/9 @266 MHz 2.5 MB SRAM USB, LCDC

Performance MHz 726A/B @216 MHz 1.25 MB SRAM USB 7262/4 7266/7 @144 MHz @144 MHz 1 MB SRAM 1.5 MB SRAM USB, LCDC USB, LCDC

Key Features of the RZ/A Family

Up to 10 MB on-chip large-capacity RAM for low Up to WXGA screen size supported with OpenVG system cost and higher performance hardware acceleration • The 10 MB on-chip RAM enables image data for two • The device features a dedicated LCD controller able to screens of WXGA size image display to be saved as a support 4 layer overlay and drive up to two WXGA frame buffer. It also makes this the device with the screens concurrently. largest SRAM in the world. • An OpenVG 2D graphics engine is also included in order • The 10 MB of SRAM allows designers to build a system to support vector graphics operations. without any external RAM, and offers a significantly decreased system cost. Boot and Execute from QSPI • No need for NOR flash, which can be replaced by 400 MHz MCU core with advanced bus structure to cheaper QSPI flash increase performance • Execute in place supports running code directly from • RAM block is split into 5 separate blocks with a multilayer the external serial flash. bus to ensure the CPU can fetch code and write data as well as the LCD controller accessing the RAM concurrently. • This removes the significant bottleneck of current day HMI systems

3 RZ/A System Diagram

RZ/A SPI-Multi IO Serial Flash ® USB 2.0 ARM Cortex A9 (Store F/W) 400 MHz External USB Large-capacity RAM 10 MB Bus NO Flash Reduce Memory HDD external SD/MMC 2D Graphic SDRAM memory I/F Accelerator

Various Video Reduce Interfaces Out display Display controller Ethernet Video In LAN PHY Camera

RZ/A Product Table

Device Memory Interfaces Timers & other Peripherals Miscellaneous Information C 2 Core Nickname Number Part [KB] Size RAM [Byte] Pins SPI/UARTs / I CAN USB Ethernet Timer Channels (8-bit/16-bit/32bit) TimersSpecial PWMs [MHz] Speed Clock Int. Osc. Subclock 32.768 kHz TFT Control A/D D/A-Converter / FeaturesAnalog DMA Supply Voltage [V] Packages Qualification Others Features* Kit Starter

21ch + 8ch x R7S721000VLFP – QFP256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V QFP256 Automotive 16ch 12-bit / –

21ch + 8ch x R7S721000VCFP – QFP256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V QFP256 Industrial 16ch 12-bit / –

21ch + 8ch x RZ/A-H R7S721001VLBG – BGA324 5ch/8ch/4ch 5ch 2ch 1ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA324 Automotive 16ch 12-bit / –

10 MB SRAM 21ch + 8ch x R7S721001VCBG – BGA324 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA324 Industrial 16ch 12-bit / – OpenVG, 21ch + 8ch x R7S721000VCBG – BGA256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA256 Industrial PAL/NTSC, 16ch 12-bit / – RTC;SDHC; optional 21ch + 8ch x R7S721010VLFP – QFP256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V QFP256 Automotive security 16ch 12-bit / – module 21ch + 8ch x R7S721010VCFP – QFP256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V QFP256 Industrial 16ch 12-bit / –

21ch + 8ch x RZ/A-M R7S721011VLBG – BGA324 5ch/8ch/4ch 5ch 2ch 1ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA324 Automotive Yes 16ch 12-bit / – 400 MHz Cortex A9 5 MB SRAM 21ch + 8ch x R7S721011VCBG – BGA324 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA324 Industrial 16ch Up to XGA (1024 x 768) 12-bit / –

21ch + 8ch x R7S721010VCBG – BGA256 5ch/8ch/4ch 1ch/5ch/2ch – – – – 16ch 3.3 V + 1.18 V BGA256 Industrial 16ch 12-bit / –

8ch x R7S721020VLFP – QFP176 4ch/5ch/4ch 1ch/5ch/2ch – 21ch – – – 16ch 3.3 V + 1.18 V QFP176 Automotive 12-bit / –

8ch x R7S721020VCFP – QFP176 4ch/5ch/4ch 1ch/5ch/2ch – 21ch – – – 16ch 3.3 V + 1.18 V QFP176 Industrial 12-bit / – PAL/NTSC, RTC;SDHC; 8ch x RZ/A-L R7S721021VLFP – QFP208 4ch/5ch/4ch 2ch 2ch 1ch 1ch/5ch/2ch – 21ch – – – 16ch 3.3 V + 1.18 V QFP208 Automotive optional 12-bit / – security 3 MB SRAM 8ch x module R7S721021VCFP – QFP208 4ch/5ch/4ch 1ch/5ch/2ch – 21ch – – – 16ch 3.3 V + 1.18 V QFP208 Industrial 12-bit / –

8ch x R7S721020VCBG – BGA176 4ch/5ch/4ch 1ch/5ch/2ch – 21ch – – – 16ch 3.3 V + 1.18 V BGA176 Industrial 12-bit / –

4 www.renesas.eu The RZ/A1-H Series

RZ/A1-H in Detail

High Efficient 32-bit CPU Core (Cortex A9®) • 400 MHz CPU Clock Frequency

Single and Double Floating Point Unit Compliant with IEEE754 • Accelerates e.g. trigonometric operations like rotation

High-Density up to 10 MByte Internal RAM • Parallel bus structure dedicated to SRAM

2D-Graphics Engine OpenVG 1.1 • Full support for Khronos OpenVG 1.1 API • Rendering, Animation and Acceleration OpenVG w/o CPU Memory Timers Communications Support for Booting from QSPI Flash Memory and SRAM MTU2 10/100 NAND Flash Memory 10 MB 16-bit x 5ch Ether MAC SRAM L2 Cache CAN • New Approach lot of SRAM instead of FLASH 128 KB WDT 8-bit 1ch 5ch • External SPI serial flash is extremely cheap compared Cache USB2.0 32 KB + 32 KB OS Timer HS 2ch h/f to on-chip flash 32-bit 2ch NAND Flash • Execute in place System PWM Timer I/F 16ch Data Management External Bus 32-bit DMAC 16ch ROM, SRAM, LCD Controller WXGA (1024 x 768) with 24-bit interface Real-Time CLK SDRAM, PCMCIA Interrupt Controller • 4 layer overlay SPI Multi 2ch Clock Generation Sound Generator • 2ch video input, 2ch display out with 1ch LVDS with SSCG SCIF RSPI 8ch 3ch • Dot and window Alpha Blending JTAG Debug Graphics I2C IEBus • Chroma Keying Encryption Video Display 4ch 1ch Engine Controller w/ LVDS 2ch SSI(I2S) SPDIF Customer OpenVG 1.1 6ch 1ch Bus Interface Controller for glueless Connection of Unique ID Enhanced eng. SDHI MMC • SRAM, SDRAM, NOR, NAND, eMMC, Flash Memory PAL/NTSC 2ch 1ch Audio dec. 2ch • 128 KB L2 cache MOST50 SCUX CMOS Camera I/F 1ch 4ch ASRC 1ch Smart Card I/F 10/100 EtherMAC 1ch Fish Eye Correction 2ch Analog 2ch 2ch USB 2.0 Host and Function Controller with ADC IrDA LIN Master JPEG Engine 1ch 2ch integrated USB Transceiver 12-bit 8ch 1ch

Up to 5 CAN Channels Block Diagram RZ/A1-H

Package • 256-pin BGA (0.5 mm)/256-pin QFP (0.4mm)/ 324-pin BGA (0.8 mm)

5 The RZ/A1-M Series

RZ/A1-M in Detail

High Efficient 32-Bit CPU Core (Cortex A9®) • 400 MHz CPU Clock Frequency

Single and Double Floating Point Unit Compliant with IEEE754 • Accelerates e.g. trigonometric operations like rotation

High-Density up to 5 MByte Internal RAM Parallel bus structure dedicated to SRAM

2D-Graphics Engine OpenVG 1.1 • Full support for Khronos OpenVG 1.1 API • Rendering, Animation and Acceleration OpenVG w/o CPU

Memory Timers Communications Support for Booting from QSPI Flash Memory and SRAM MTU2 10/100 NAND Flash Memory 5 MB 16-bit x 5ch Ether MAC • New Approach lot of SRAM instead of FLASH SRAM L2 Cache CAN 128 KB WDT 8-bit 1ch 5ch • External SPI serial flash is extremely cheap compared Cache USB2.0 32 KB + 32 KB OS Timer HS 2ch h/f to on-chip flash 32-bit 2ch NAND Flash • Execute in place System PWM Timer I/F 16 ch Data Management External Bus 32-bit LCD Controller WXGA (1024 x 768) with 24-bit Interface DMAC 16ch ROM, SRAM, Real-Time CLK SDRAM, PCMCIA Interrupt Controller • 4 layer overlay SPI Multi 2ch • 2ch video input, 2ch display out with 1ch LVDS Clock Generation Sound Generator with SSCG SCIF RSPI • Dot and window Alpha Blending 8ch 3ch JTAG Debug Graphics 2 • Chroma Keying I C IEBus Encryption Video Display 4ch 1ch Engine Controller w/ LVDS 2ch SSI(I2S) SPDIF Bus Interface Controller for glueless Connection of Customer OpenVG 1.1 6ch 1ch Unique ID Enhanced eng. • SRAM, SDRAM, NOR, NAND, eMMC, Flash Memory SDHI MMC PAL/NTSC 2ch 1ch Audio dec. 2ch • 128 KB L2 cache MOST50 SCUX CMOS Camera I/F 1ch 4ch ASRC 10/100 EtherMAC 1ch 1ch Smart Card I/F Fish Eye Correction 2ch Analog 2ch 2ch USB 2.0 Host and Function Controller with ADC IrDA LIN Master JPEG Engine 1ch 2ch integrated USB Transceiver 12-bit 8ch 1ch

Up to 5 CAN Channels Block Diagram RZ/A1-M

Package • 256-pin BGA (0.5 mm)/256-pin QFP (0.4 mm)/ 324-pin BGA (0.8 mm)

6 www.renesas.eu The RZ/A1-L Series

RZ/A1-L in Detail

High Efficient 32-bit CPU Core (Cortex A9®) • 400 MHz CPU Clock Frequency

Single and Double Floating Point Unit Compliant with IEEE754 • Accelerates e.g. trigonometric operations like rotation

High-Density up to 3 MByte Internal RAM • Parallel bus structure dedicated to SRAM

Support for Booting from QSPI Flash Memory • New Approach lot of SRAM instead of FLASH • External SPI serial flash is extremely cheap compared Memory SRAM to on-chip flash 3 MB Communications • Execute in place SRAM Cache 128 KB 10/100 Ether MAC LCD Controller WXGA (1024 x 768) with 24-bit Interface Cache 32 KB + 32 KB CAN • 3 layer overlay 2ch System USB2.0 • 1ch video input, 1ch display out HS 2ch h/f Data Management • Dot and window Alpha Blending DMAC 16ch Timers External Bus 32-bit ROM, SRAM, • Chroma Keying Interrupt Controller MTU2 SDRAM, PCMCIA 16-bit x 5ch SPI Multi Clock Generation WDT 1ch Bus Interface Controller for glueless Connection of with SSCG 8-bit 1ch SCIF RSPI • SRAM, SDRAM, NOR, eMMC, Flash Memory JTAG Debug 5ch 3ch OS Timer • 128 KB L2 cache Encryption 32-bit 2ch I2C IEBus Engine 4ch 1ch Customer Real-Time CLK SSI(I2S) SPDIF 10/100 EtherMAC 1ch Unique ID 4ch 1ch Sound Generator SDHI MMC 2ch USB 2.0 Host and Function Controller with Audio 2ch 1ch integrated USB Transceiver SCUX MOST50 4ch ASRC Graphics 1ch Up to 2 CAN Channels Video Display Smart Card I/F Analog Controller 1ch 2ch ADC CMOS Camera I/F IrDa LIN Master Package 12-bit 8ch 1ch 1ch 2ch • 176-pin QFP (0.5 mm)/176-pin BGA (0.5 mm)/ 208-pin QFP (0.5 mm) Block Diagram RZ/A1-L

RZ/A1-H/-M/-L Package Selection

RZ/A1-H ✔ ✔ ✔ RZ/A1-M ✔ ✔ ✔ RZ/A1-L ✔ ✔ ✔ 176-pin BGA 176-pin QFP 208-pin QFP 256-pin BGA 256-pin QFP 324-pin BGA 0.5 mm pitch 0.5 mm pitch 0.5 mm pitch 0.5 mm pitch 0.4 mm pitch 0.8 mm pitch 8 mm x 8 mm 24 mm x 24 mm 28 mm x 28 mm 11 mm x 11 mm 28 mm x 28 mm 19 mm x 19 mm (Non Auto Grade) (Non Auto Grade)

7 RSK & Eco-System

Renesas Starter Kit (RSK)

Speed your time to market with the Renesas Starter Kit. The kit includes everything you will need to start your development.

The kit includes: • WVGA touch panel for HMI development • Segger JTAG-lite debugger • Embedded IDE and compiler with evaluation licence • Sample code peripheral drivers

Part Number TFT Display Debugger YR0K77210S001BE No Yes YR0K77210S002BE Yes No YR0K77210S003BE Yes Yes

RZ Eco-System

A wide range of operating systems, tools, IDEs and software are available for the RZ/A from both Renesas and partners.

Tools & IDE HMI-GUI Partners RTOS Partners Renesas Partners and

8 www.renesas.eu The RZ/T Series

Introduction

The RZ/T Family complements the already strong and RX family of products to provide a migration path portfolio aimed at the factory automation market. for motor control solutions from the low end up to a The family includes a peripheral set taken from the SH 600 MHz ARM Cortex-R4® solution.

RZ/T Roadmap

RZ/T1-R R4 (600 MHz) R-IN32M3 Engine EtherCAT Encoder IF RZ/T1-R R4 (600 MHz) R-IN32M3 Engine EtherCAT RZ/T1-R R4 (600/450 MHz) EtherCAT RZ/T1-R Encoder IF R4 (600/450 MHz) Industrial Network ASSP EtherCAT

RZ/T1 R4 (600 MHz)

General Purpose MCU RZ/T1 Standard Ethernet Support R4 (450 MHz)

Key Features of the RZ/T Family

High-Speed Realtime Performance Industrial Standard Support • Cortex R4F® @ 450 MHz or 600 MHz • Several Industrial Ethernet standards including EtherCAT • Single/Double precision FPU • Safety Control (ECC RAM, CRC, Clock Monitor, etc) • Tightly Coupled Memory (TMC) : 512 K + 32 K allowing for fast single-cycle operation • Scalable options ––Single Core –– R-IN32 engine

Highly Integrated Peripherals • Compatible peripherals with SuperH and RX MCUs • Supports SPI flash for reduced board area • External SDRAM interface • CAN 2ch, IIC 2ch • USB2.0 (HS) Host/Peripheral 1ch • 100 Mbps EtherMAC with 2-port switch

9 RZ/T System Diagram

Ethernet Serial Flash

RZ/T1 CAN 3 Φ PWM ARM Cortex-R4®

USB ADC

RZ/T Product Table TM Part Number Main CPU Sub CPU / R-IN Engine TCM for Cortex-R4F Extended internal RAM EtherCAT Slave I/FEncoder Security Module Package

R7S910001 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – – – No 176QFP

R7S910101 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – – – Yes 176QFP

R7S910002 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – – – No 320BGA

R7S910102 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – --- – Yes 320BGA

R7S910006 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1 MB – – No 320GBA

R7S910106 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1 MB – – Yes 320GBA

R7S910007 600 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1 MB – – No 320BGA

R7S910107 600 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1 MB – – Yes 320BGA

R7S910011 ® 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – – EnDat2.2, BiSS-B, BiSS-C No 320BGA

R7S910111 450 MHz – 512 KB (ATCM) + 32 KB (BTCM) – – EnDat2.2, BiSS-B, BiSS-C Yes 320BGA

R7S910013 600 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1MB – EnDat2.2, BiSS-B, BiSS-C No 320BGA

R7S910113 ARM Cortex-R4F 600 MHz – 512 KB (ATCM) + 32 KB (BTCM) 1MB – EnDat2.2, BiSS-B, BiSS-C Yes 320BGA

R7S910015 450 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes – No 320BGA

R7S910115 45 0MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes – Yes 320BGA

R7S910016 450 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes EnDat2.2, BiSS-B, BiSS-C No 320BGA

R7S910116 450 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes EnDat2.2, BiSS-B, BiSS-C Yes 320BGA

R7S910017 600 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes – No 320BGA

R7S910117 600 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes – Yes 320BGA

R7S910018 600 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes EnDat2.2, BiSS-B, BiSS-C No 320BGA

R7S910118 600 MHz R-IN Engine 150 MHz 512 KB (ATCM) + 32 KB (BTCM) 1 MB for R-IN Engine Yes EnDat2.2, BiSS-B, BiSS-C Yes 320BGA

10 www.renesas.eu RZ/T1-R Features & Block Diagram

High Performance CPU Cortex-R4F® R-IN32 System Timers Communication ® 600 MHz 150 MHz (ARM Cortex-R4F ) DMA MTU3a 2 ch 10/100 Floating Point Unit HW-RTOS (2 x 16 ch) 16-bit x 8 ch Ether MAC • Max. operating frequency: 600 MHz 32-bit x 1ch IEEE1588 Double Precision Accelerator Secure Boot GPT • High-speed real-time response Ethernet AES enc h/w EtherCAT Slave MPU 16-bit 4 ch • Single/Double precision FPU Accelerator Safety Control USB 2.0 HS POE3 DOC, CLMA 1 ch Host/Function Network Controller (R-IN Engine) Memory Shared Memory JTAG Debug TPUa External Bus 32-bit • HW-RTOS : High-speed operation I/D Cache 0 KB + 1 MB ROM, SRAM 16-bit 12 ch 8 KB + 8 KB (optional) SDRAM, MPX with the basic function of the RTOS A/B TCM Analog CMT SCIF RSPI (ITRON) in hardware 512 KB/32 KB ADC 16-bit 4 ch 5 ch 4 ch 12-bit (8 ch + 16 ch) CMT2 • Ethernet based communication 2 ch RS-CAN 32-bit 2 ch accelerator ∆Σ I/F-a WDT 1 x QSPI Temperature 8-bit 1 ch Power Supply Voltage Sensor SSI RIIC I-WDT • 1.2 V, 3.3 V 2 ch 2 x PPG On-chip Memory : 4-bit 4 gp ® • Tightly Coupled RAM 512 KB + 32KB /w/ECC (Cortex-R4F ) ELC • Optional additional RAM 1 MB w/ECC Features • Safety Control • EtherCAT slave controller ––ECC RAM supported • Ethernet Accelerator ––CRC(32bit) • Encoder I/F (Endat2.2/BiSS-B/BiSS-C) ––Independent WDT with dedicated on-chip oscillator • PWM timer : MTU3a, GPT • DS Interface • High-speed USB Package • Secure boot • FBGA 320-pin (17 x 17 mm, 0.8 mm pitch)

RZ/T1 Single Core Features & Block Diagram

® High Performance CPU (ARM Cortex-R4F ) Cortex-R4F® System Timers Communication 450/600 MHz • Max. operating freq: 450/600 MHz DMA MTU3a 2 ch 10/100 (2 x 16 ch) 16-bit x 8 ch Ether MAC Floating Point Unit 32-bit x 1ch IEEE1588 • High-speed real-time response Double Precision Secure Boot GPT USB 2.0 HS • Single/Double precision FPU AES enc h/w MPU 16-bit 4 ch 1 ch Host/Function Power Supply Voltage Safety Control External Bus 32-bit DOC, CLMA POE3 ROM, SRAM • 1.2 V, 3.3 V Memory SDRAM, MPX JTAG Debug TPUa SCIF RSPI I/D Cache On-chip Memory : 8 KB + 8 KB 16-bit 12 ch 5 ch 4 ch • Tightly Coupled RAM 512 KB + 32KB /w/ECC A/B TCM Analog CMT 2 ch RS-CAN 512 KB/32 KB 16-bit 4 ch (Cortex-R4F®) ADC 12-bit (8 ch + 16 ch) CMT2 1 x QSPI • Optional additional RAM 1 MB w/ECC Extended Memory ∆Σ I/F-a 32-bit 2 ch WDT SSI RIIC 0 KB + 1 MB Features Temperature 8-bit 1 ch 2 ch (optional) Sensor • Ethernet Accelerator I-WDT • PWM timer: MTU3a, GPT 2 x PPG • High-speed USB 4-bit 4 gp • Secure boot ELC • Safety Control ––ECC RAM supported ––CRC (32-bit) Package ––Independent WDT with dedicated on-chip oscillator • FBGA 320-pin (17 x 17 mm, 0.8 mm pitch) • DS Interface • QFP 176-pin (20 x 20 mm, 0.4 mm pitch)

11 RZ/T Tools Renesas Starter Kit (RSK) The RZ/T Family will be supported by the industry leading tool chain our RSK (Renesas Starter Kit) giving access to all pins, peripherals and including. • RSK board • Segger JTAG-lite debugger • Embedded IDE and compiler with evaluation licence • Sample code peripheral drivers This is the ideal starting point for any development for your motor control. Order Code: RTK7910017S00000BE

Before purchasing or using any Renesas Electronics products listed herein, please refer to the latest product manual and/or data sheet in advance.