Obfuscation with Mixed Boolean-Arithmetic Expressions : Reconstruction, Analysis and Simplification Tools Ninon Eyrolles
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Handbook Vatican 2014
HANDBOOK OF THE WORLD CONGRESS ON THE SQUARE OF OPPOSITION IV Pontifical Lateran University, Vatican May 5-9, 2014 Edited by Jean-Yves Béziau and Katarzyna Gan-Krzywoszyńska www.square-of-opposition.org 1 2 Contents 1. Fourth World Congress on the Square of Opposition ..................................................... 7 1.1. The Square : a Central Object for Thought ..................................................................................7 1.2. Aim of the Congress.....................................................................................................................8 1.3. Scientific Committee ...................................................................................................................9 1.4. Organizing Committee .............................................................................................................. 10 2. Plenary Lectures ................................................................................................... 11 Gianfranco Basti "Scientia una contrariorum": Paraconsistency, Induction, and Formal Ontology ..... 11 Jean-Yves Béziau Square of Opposition: Past, Present and Future ....................................................... 12 Manuel Correia Machuca The Didactic and Theoretical Expositions of the Square of Opposition in Aristotelian logic ....................................................................................................................... 13 Rusty Jones Bivalence and Contradictory Pairs in Aristotle’s De Interpretatione ................................ -
Hamming Weight Attacks on Cryptographic Hardware – Breaking Masking Defense?
Hamming Weight Attacks on Cryptographic Hardware { Breaking Masking Defense? Marcin Gomu lkiewicz1 and Miros law Kuty lowski12 1 Cryptology Centre, Poznan´ University 2 Institute of Mathematics, Wroc law University of Technology, ul. Wybrzeze_ Wyspianskiego´ 27 50-370 Wroc law, Poland Abstract. It is believed that masking is an effective countermeasure against power analysis attacks: before a certain operation involving a key is performed in a cryptographic chip, the input to this operation is com- bined with a random value. This has to prevent leaking information since the input to the operation is random. We show that this belief might be wrong. We present a Hamming weight attack on an addition operation. It works with random inputs to the addition circuit, hence masking even helps in the case when we cannot control the plaintext. It can be applied to any round of the encryption. Even with moderate accuracy of measuring power consumption it de- termines explicitly subkey bits. The attack combines the classical power analysis (over Hamming weight) with the strategy of the saturation at- tack performed using a random sample. We conclude that implementing addition in cryptographic devices must be done very carefully as it might leak secret keys used for encryption. In particular, the simple key schedule of certain algorithms (such as IDEA and Twofish) combined with the usage of addition might be a serious danger. Keywords: cryptographic hardware, side channel cryptanalysis, Ham- ming weight, power analysis 1 Introduction Symmetric encryption algorithms are often used to protect data stored in inse- cure locations such as hard disks, archive copies, and so on. -
Designing PCI Cards and Drivers for Power Macintosh Computers
Designing PCI Cards and Drivers for Power Macintosh Computers Revised Edition Revised 3/26/99 Technical Publications © Apple Computer, Inc. 1999 Apple Computer, Inc. Adobe, Acrobat, and PostScript are Even though Apple has reviewed this © 1995, 1996 , 1999 Apple Computer, trademarks of Adobe Systems manual, APPLE MAKES NO Inc. All rights reserved. Incorporated or its subsidiaries and WARRANTY OR REPRESENTATION, EITHER EXPRESS OR IMPLIED, WITH No part of this publication may be may be registered in certain RESPECT TO THIS MANUAL, ITS reproduced, stored in a retrieval jurisdictions. QUALITY, ACCURACY, system, or transmitted, in any form America Online is a service mark of MERCHANTABILITY, OR FITNESS or by any means, mechanical, Quantum Computer Services, Inc. FOR A PARTICULAR PURPOSE. AS A electronic, photocopying, recording, Code Warrior is a trademark of RESULT, THIS MANUAL IS SOLD “AS or otherwise, without prior written Metrowerks. IS,” AND YOU, THE PURCHASER, ARE permission of Apple Computer, Inc., CompuServe is a registered ASSUMING THE ENTIRE RISK AS TO except to make a backup copy of any trademark of CompuServe, Inc. ITS QUALITY AND ACCURACY. documentation provided on Ethernet is a registered trademark of CD-ROM. IN NO EVENT WILL APPLE BE LIABLE Xerox Corporation. The Apple logo is a trademark of FOR DIRECT, INDIRECT, SPECIAL, FrameMaker is a registered Apple Computer, Inc. INCIDENTAL, OR CONSEQUENTIAL trademark of Frame Technology Use of the “keyboard” Apple logo DAMAGES RESULTING FROM ANY Corporation. (Option-Shift-K) for commercial DEFECT OR INACCURACY IN THIS purposes without the prior written Helvetica and Palatino are registered MANUAL, even if advised of the consent of Apple may constitute trademarks of Linotype-Hell AG possibility of such damages. -
Type I Codes Over GF(4)
Type I Codes over GF(4) Hyun Kwang Kim¤ San 31, Hyoja Dong Department of Mathematics Pohang University of Science and Technology Pohang, 790-784, Korea e-mail: [email protected] Dae Kyu Kim School of Electronics & Information Engineering Chonbuk National University Chonju, Chonbuk 561-756, Korea e-mail: [email protected] Jon-Lark Kimy Department of Mathematics University of Louisville Louisville, KY 40292, USA e-mail: [email protected] Abstract It was shown by Gaborit el al. [10] that a Euclidean self-dual code over GF (4) with the property that there is a codeword whose Lee weight ´ 2 (mod 4) is of interest because of its connection to a binary singly-even self-dual code. Such a self-dual code over GF (4) is called Type I. The purpose of this paper is to classify all Type I codes of lengths up to 10 and extremal Type I codes of length 12, and to construct many new extremal Type I codes over GF (4) of ¤The present study was supported by Com2MaC-KOSEF, POSTECH BSRI research fund, and grant No. R01-2006-000-11176-0 from the Basic Research Program of the Korea Science & Engineering Foundation. ycorresponding author, supported in part by a Project Completion Grant from the University of Louisville. 1 lengths from 14 to 22 and 34. As a byproduct, we construct a new extremal singly-even self-dual binary [36; 18; 8] code, and a new ex- tremal singly-even self-dual binary [68; 34; 12] code with a previously unknown weight enumerator W2 for ¯ = 95 and γ = 1. -
Arxiv:1311.6244V1 [Physics.Comp-Ph] 25 Nov 2013
An efficient implementation of Slater-Condon rules Anthony Scemama,∗ Emmanuel Giner November 26, 2013 Abstract Slater-Condon rules are at the heart of any quantum chemistry method as they allow to simplify 3N- dimensional integrals as sums of 3- or 6-dimensional integrals. In this paper, we propose an efficient implementation of those rules in order to identify very rapidly which integrals are involved in a matrix ele- ment expressed in the determinant basis set. This implementation takes advantage of the bit manipulation instructions on x86 architectures that were introduced in 2008 with the SSE4.2 instruction set. Finding which spin-orbitals are involved in the calculation of a matrix element doesn't depend on the number of electrons of the system. In this work we consider wave functions Ψ ex- For two determinants which differ by two spin- pressed as linear combinations of Slater determinants orbitals: D of orthonormal spin-orbitals φ(r): jl hDjO1jDiki = 0 (4) X Ψ = c D (1) jl i i hDjO2jDiki = hφiφkjO2jφjφli − hφiφkjO2jφlφji i All other matrix elements involving determinants Using the Slater-Condon rules,[1, 2] the matrix ele- with more than two substitutions are zero. ments of any one-body (O1) or two-body (O2) oper- An efficient implementation of those rules requires: ator expressed in the determinant space have simple expressions involving one- and two-electron integrals 1. to find the number of spin-orbital substitutions in the spin-orbital space. The diagonal elements are between two determinants given by: 2. to find which spin-orbitals are involved in the X substitution hDjO1jDi = hφijO1jφii (2) i2D 3. -
Proceedings of the 30 Nordic Workshop on Programming Theory
Proceedings of the 30th Nordic Workshop on Programming Theory Daniel S. Fava Einar B. Johnsen Olaf Owe Editors Report Nr. 485 ISBN 978-82-7368-450-9 Department of Informatics Faculty of Mathematics and Natural Sciences UNIVERSITY OF OSLO October 24, 2018 NWPT'18 Preface Preface This volume contains the extended abstracts of the talks presented at the 30th Nordic Workshop on Programming Theory held on October 24-26, 2018 in Oslo, Norway. The objective of Nordic Workshop on Programming Theory is to bring together researchers from the Nordic and Baltic countries interested in programming theory, in order to improve mutual contacts and co-operation. However, the workshop also attracts researchers outside this geographical area. In particular, it is targeted at early- stage researchers as a friendly meeting where one can present work in progress. Typical topics of the workshop include: • semantics of programming languages, • programming language design and programming methodology, • programming logics, • formal specification of programs, • program verification, • program construction, • tools for program verification and construction, • program transformation and refinement, • real-time and hybrid systems, • models of concurrency and distributed computing, • language-based security. This volume contains 29 extended abstracts of the presentations at the workshop including the abstracts of the three distinguished invited speakers. Prof. Andrei Sabelfeld, Chalmers University, Sweden Prof. Erika Abrah´am,RWTH´ Aachen University, Germany Prof. Peter Olveczky,¨ University of Oslo, Norway After the workshop selected papers will be invited, based on the quality and topic of their presentation at the workshop, for submission to a special issue of The Journal of Logic and Algebraic Methods in Programming. -
Faster Base64 Encoding and Decoding Using AVX2 Instructions
Faster Base64 Encoding and Decoding using AVX2 Instructions WOJCIECH MUŁA, DANIEL LEMIRE, Universite´ du Quebec´ (TELUQ) Web developers use base64 formats to include images, fonts, sounds and other resources directly inside HTML, JavaScript, JSON and XML files. We estimate that billions of base64 messages are decoded every day. We are motivated to improve the efficiency of base64 encoding and decoding. Compared to state-of-the-art implementations, we multiply the speeds of both the encoding (≈ 10×) and the decoding (≈ 7×). We achieve these good results by using the single-instruction-multiple-data (SIMD) instructions available on recent Intel processors (AVX2). Our accelerated software abides by the specification and reports errors when encountering characters outside of the base64 set. It is available online as free software under a liberal license. CCS Concepts: •Theory of computation ! Vector / streaming algorithms; General Terms: Algorithms, Performance Additional Key Words and Phrases: Binary-to-text encoding, Vectorization, Data URI, Web Performance 1. INTRODUCTION We use base64 formats to represent arbitrary binary data as text. Base64 is part of the MIME email protocol [Linn 1993; Freed and Borenstein 1996], used to encode binary attachments. Base64 is included in the standard libraries of popular programming languages such as Java, C#, Swift, PHP, Python, Rust, JavaScript and Go. Major database systems such as Oracle and MySQL include base64 functions. On the Web, we often combine binary resources (images, videos, sounds) with text- only documents (XML, JavaScript, HTML). Before a Web page can be displayed, it is often necessary to retrieve not only the HTML document but also all of the separate binary resources it needs. -
Faster Population Counts Using AVX2 Instructions
Faster Population Counts Using AVX2 Instructions Wojciech Mula,Nathan Kurz and Daniel Lemire∗ ?Universit´edu Qu´ebec (TELUQ), Canada Email: [email protected] Counting the number of ones in a binary stream is a common operation in database, information-retrieval, cryptographic and machine-learning applications. Most processors have dedicated instructions to count the number of ones in a word (e.g., popcnt on x64 processors). Maybe surprisingly, we show that a vectorized approach using SIMD instructions can be twice as fast as using the dedicated instructions on recent Intel processors. The benefits can be even greater for applications such as similarity measures (e.g., the Jaccard index) that require additional Boolean operations. Our approach has been adopted by LLVM: it is used by its popular C compiler (Clang). Keywords: Software Performance; SIMD Instructions; Vectorization; Bitset; Jaccard Index 1. INTRODUCTION phy [5], e.g., as part of randomness tests [6] or to generate pseudo-random permutations [7]. They can help find We can represent all sets of integers in f0; 1;:::; 63g duplicated web pages [8]. They are frequently used in using a single 64-bit word. For example, the word 0xAA bioinformatics [9, 10, 11], ecology [12], chemistry [13], (0b10101010) represents the set f1; 3; 5; 7g. Intersections and so forth. Gueron and Krasnov use population-count and unions between such sets can be computed using instructions as part of a fast sorting algorithm [14]. a single bitwise logical operation on each pair of words The computation of the population count is so (AND, OR). We can generalize this idea to sets of important that commodity processors have dedicated integers in f0; 1; : : : ; n − 1g using dn=64e 64-bit words. -
Bit-Mask Based Compression of FPGA Bitstreams
International Journal of Soft Computing and Engineering (IJSCE) ISSN: 2231-2307, Volume-3 Issue-1, March 2013 Bit-Mask Based Compression of FPGA Bitstreams S.Vigneshwaran, S.Sreekanth The efficiency of bitstream compression is measured using Abstract— In this paper, bitmask based compression of FPGA Compression Ratio (CR). It is defined as the ratio between the bit-streams has been implemented. Reconfiguration system uses compressed bitstream size (CS) and the original bitstream bitstream compression to reduce bitstream size and memory size (OS) (ie CR=CS/OS). A smaller compression ratio requirement. It also improves communication bandwidth and implies a better compression technique. Among various thereby decreases reconfiguration time. The three major compression techniques that has been proposed compression contributions of this paper are; i) Efficient bitmask selection [5] seems to be attractive for bitstream compression, because technique that can create a large set of matching patterns; ii) Proposes a bitmask based compression using the bitmask and of its good compression ratio and relatively simple dictionary selection technique that can significantly reduce the decompression scheme. This approach combines the memory requirement iii) Efficient combination of bitmask-based advantages of previous compression techniques with good compression and G o l o m b coding of repetitive patterns. compression ratio and those with fast decompression. Index Terms—Bitmask-based compression, Decompression II. RELATED WORK engine, Golomb coding, Field Programmable Gate Array (FPGA). The existing bitstream compression techniques can be classified into two categories based on whether they need I. INTRODUCTION special hardware support during decompression. Some Field-Programmable Gate Arrays (Fpga) is widely used in approaches require special hardware features to access the reconfigurable systems. -
Chapter 17: Filters to Detect, Filters to Protect Page 1 of 11
Chapter 17: Filters to Detect, Filters to Protect Page 1 of 11 Chapter 17: Filters to Detect, Filters to Protect You learned about the concepts of discovering events of interest by configuring filters in Chapter 8, "Introduction to Filters and Signatures." That chapter showed you various different products with unique filtering languages to assist you in discovering malicious types of traffic. What if you are a do- it-yourself type, inclined to watch Bob Vila or "Men in Tool Belts?" The time-honored TCPdump program comes with an extensive filter language that you can use to look at any field, combination of fields, or bits found in an IP datagram. If you like puzzles and don’t mind a bit of tinkering, you can use TCPdump filters to extract different anomalous traffic. Mind you, this is not the tool for the faint of heart or for those of you who shy away from getting your brain a bit frazzled. Those who prefer a packaged solution might be better off using the commercial products and their GUIs or filters. This chapter introduces the concept of using TCPdump and TCPdump filters to detect events of interest. TCPdump and TCPdump filters are the backbone of Shadow, and so the recommended suggestion is to download the current version of Shadow at http://www.nswc.navy.mil/ISSEC/CID/ to examine and enhance its native filters. This takes care of automating the collection and processing of traffic, freeing you to concentrate on improving the TCPdump filters for better detects. Specifically, this chapter discusses the mechanics of creating TCPdump filters. -
Coding Theory and Applications Solved Exercises and Problems Of
Coding Theory and Applications Solved Exercises and Problems of Linear Codes Enes Pasalic University of Primorska Koper, 2013 Contents 1 Preface 3 2 Problems 4 2 1 Preface This is a collection of solved exercises and problems of linear codes for students who have a working knowledge of coding theory. Its aim is to achieve a balance among the computational skills, theory, and applications of cyclic codes, while keeping the level suitable for beginning students. The contents are arranged to permit enough flexibility to allow the presentation of a traditional introduction to the subject, or to allow a more applied course. Enes Pasalic [email protected] 3 2 Problems In these exercises we consider some basic concepts of coding theory, that is we introduce the redundancy in the information bits and consider the possible improvements in terms of improved error probability of correct decoding. 1. (Error probability): Consider a code of length six n = 6 defined as, (a1; a2; a3; a2 + a3; a1 + a3; a1 + a2) where ai 2 f0; 1g. Here a1; a2; a3 are information bits and the remaining bits are redundancy (parity) bits. Compute the probability that the decoder makes an incorrect decision if the bit error probability is p = 0:001. The decoder computes the following entities b1 + b3 + b4 = s1 b1 + b3 + b5 == s2 b1 + b2 + b6 = s3 where b = (b1; b2; : : : ; b6) is a received vector. We represent the error vector as e = (e1; e2; : : : ; e6) and clearly if a vector (a1; a2; a3; a2+ a3; a1 + a3; a1 + a2) was transmitted then b = a + e, where '+' denotes bitwise mod 2 addition. -
Web Corrections-Vector Logic and Counterfactuals-Rev 2
This article was published in: "Logic Journal of IGPL" Online version: doi:10.1093/jigpal/jzaa026, 2020 Vector logic allows counterfactual virtualization by The Square Root of NOT Eduardo Mizraji Group of Cognitive Systems Modeling, Biophysics and Systems Biology Section, Facultad de Ciencias, Universidad de la República Montevideo, Uruguay Abstract In this work we investigate the representation of counterfactual conditionals using the vector logic, a matrix-vectors formalism for logical functions and truth values. Inside this formalism, the counterfactuals can be transformed in complex matrices preprocessing an implication matrix with one of the square roots of NOT, a complex matrix. This mathematical approach puts in evidence the virtual character of the counterfactuals. This happens because this representation produces a valuation of a counterfactual that is the superposition of the two opposite truth values weighted, respectively, by two complex conjugated coefficients. This result shows that this procedure gives an uncertain evaluation projected on the complex domain. After this basic representation, the judgment of the plausibility of a given counterfactual allows us to shift the decision towards an acceptance or a refusal. This shift is the result of applying for a second time one of the two square roots of NOT. Keywords : Vector logic; Conditionals; Counterfactuals; Square Roots of NOT. Address: Dr. Eduardo Mizraji Sección Biofísica y Biología de Sistemas, Facultad de Ciencias, UdelaR Iguá 4225, Montevideo 11400, Uruguay e-mails: 1) [email protected], 2) [email protected] Phone-Fax: +598 25258629 1 1. Introduction The comprehension and further formalization of the conditionals have a long and complex history, full of controversies, famously described in an article of Lukasiewicz [20].