Power Dense Converters for Future Transport Systems

POWER DENSE CONVERTERS FOR FUTURE TRANSPORT SYSTEMS

A thesis submitted to the University of Manchester for the degree of

Master of Philosophy

in the Faculty of Engineering and Physical Sciences

2020

CARLOS RUEDA-PANCHANO

DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING

Table of Contents

List of Figures ...... 4 List of Tables ...... 7 List of Abbreviations ...... 8 Abstract ...... 10 Declaration ...... 11 Copyright ...... 11 Acknowledgement ...... 12 Chapter 1: Introduction ...... 13 1.1 Motivation for the Project, Aim and Specific Objectives ...... 13 Chapter 2: Literature Review ...... 15 2.1 Power Electronic Converters for Future Transport Systems ...... 15 2.1.1 DC-DC Converters for Electrified Vehicles...... 15 2.1.2 Electric Specifications of DC-DC Converters for Electrified Vehicles ...... 17 2.1.3 High-Power High-Voltage Power Electronic Converters of Electrified Vehicles ...... 18 2.1.3.1 Specifications of the Traction Inverter (& Boost Converter) ...... 18 2.1.3.2 Specifications of the On-Board Charger (OBC) ...... 20 2.1.3.2.1 Power Factor Correction ...... 20 2.1.3.2.2 Classification and Standards of Battery Chargers for Electric Vehicles ...... 24 2.1.3.2.3 Popular PFC Topologies for On-Board Chargers and Their Specifications ...... 31 2.1.3.2.4 Electric Vehicles On-Board Chargers Outlook...... 38 2.2 Wide-bandgap Power Devices ...... 40 2.3 High-Power High-Voltage DC-DC Converters ...... 42 2.3.1 Flying-Capacitor Multilevel DC-DC Converters ...... 42 2.3.2 The Three-Level Flying Capacitor Boost Converter ...... 46 2.3.3 Conventional Switched Capacitor Converters ...... 49 2.3.4 The Resonant Switched Capacitor Boost Converter ...... 50 Chapter 3: Analysis of Three Level Capacitor Boost Converters ...... 53 3.1 Introduction ...... 53 3.2 Analysis of the Three-Level Flying Capacitor Boost Converter ...... 54 3.3 Analysis of the Resonant Switched Capacitor Boost Converter ...... 60 3.3.1 Mathematical Models of the Resonant Switched Capacitor Boost Converter ...... 60 3.3.2 Performance Analysis of the RSCC Boost Converter ...... 77 3.4 Analysis of the Asymmetric Three-Level Flying Capacitor Boost Converter ...... 82 3.5 Efficiency of the Three-Level Flying Capacitor Boost Converter and the Resonant Switched Capacitor Boost Converter ...... 90 3.5.1 MOSFET Electrical Model ...... 94 3.5.2 MOSFET Thermal Model...... 95 3.5.3 Thermal Impedances ...... 97 3.5.4 Electrical Simulation of the Three-Level Flying Capacitor Boost Converter ...... 98 2

3.5.5 Simulation of the Efficiency of the Three-Level Flying Capacitor Boost Converter ...... 100 3.5.6 Electrical Simulation of the Resonant Switched Capacitor Boost Converter ...... 107 3.5.7 Simulation of the Efficiency of the Resonant Switched Capacitor Boost Converter ...... 109 3.6 Summary ...... 113 Chapter 4: Comparison between the Three-Level Flying Capacitor Converter, the Resonant Switched Capacitor Converter and the Asymmetric Three-Level Flying Capacitor Boost Converter ...... 114 4.1 Comparison of Converters ...... 114 4.2 Summary ...... 116 Chapter 5: Conclusions and Future Work ...... 118 5.1 Summary of Achievements ...... 118 5.2 Conclusions on the Comparison between the Three-level FCBC converter, the RSCC Boost Converter and the Asymmetric Converter ...... 118 5.3 Contribution ...... 119 5.4 Future Work ...... 119 Appendix A: Popular PFC Topologies ...... 121 Appendix B: Theoretical and Simulation Values ...... 123 Appendix C: Data of Thermal Descriptions and I-V Characteristics of MOSFET C3M0016120K .... 126 Appendix D: Converters’ Losses and Efficiency Values ...... 129 References ...... 130

Final word count: 31907

List of Figures

Fig. 2.1 Typical power electronic system of a typical power train of an electrified vehicle [9]...... 15 Fig. 2.2 DC-DC converters applied in electrical vehicles [6]...... 16 Fig. 2.3 Overview of an electrified vehicle powertrain...... 19 Fig. 2.4 Power, voltage and current in a single-phase linear electrical system with resistive load...... 21 Fig. 2.5 Waveforms of voltage, current and power in a single-phase linear circuit with inductance...... 21 Fig. 2.6 Non-linear electrical system and distorted input current [20]...... 22 Fig. 2.7 An AC-DC converter with PFC [31]...... 24 Fig. 2.8 Energy balance in an AC-DC converter with PFC [31]...... 24 Fig. 2.9 On/Off board charging system for EVs [38]...... 26 Fig. 2.10 Voltage (red) and line (blue) current: (a) Original line current, (b) line current with passive PFC, (c) line current with active PFC [44]...... 28 Fig. 2.11 Charging configurations of electric vehicles: (a) on-board dedicated charger, (b) on-board dedicated integrated charger [47]...... 31 Fig. 2.12 Common configurations of AC-DC converters with PFC: a) two-stage, b) one-stage. [20]...... 32 Fig. 2.13 Block diagram of an on-board two-stage battery charger with universal input (adapted from [33])...... 32 Fig. 2.14 Driving ranges and charging times of recent EVs: (a) driving ranges, (b) charging time to add 200 miles to the vehicle’s driving range [56]...... 39 Fig. 2.15 Summary of Si, SiC, and GaN relevant material properties [76]...... 41 Fig. 2.16 Relative size and on-state resistance of WBG and Si devices [77-79]...... 41 Fig. 2.17 Elementary commutation cell with (a) one switch and (b) with three switches connected in series [85]...... 43 Fig. 2.18 The multilevel commutation cell...... 43 Fig. 2.19 Generalization to n switches of a multilevel commutation cell [85]...... 44 Fig. 2.20 The three-level flying capacitor boost DC-DC converter...... 46 Fig. 2.21 PS-PWM control signals for buck mode and boost mode [14]...... 47 Fig. 2.22 The flying-capacitor current of the three-level FCBC...... 48 Fig. 2.23 Flying capacitor voltage control method proposed by [94]...... 48 Fig. 2.24 Conventional switched capacitor converter (double boost type)...... 49 Fig. 2.25 The resonant switched capacitor (RSCC) boost converter...... 50 Fig. 2.26 Flying capacitor currents of the RSCC topology and the SCC topology [96]...... 50 Fig. 2.27 Half-buck type RSCC and double-boost type RSCC [96]...... 51 Fig. 2.28 Conventional and phase-shift control for the RSCC topology [100]...... 51

Fig. 3.1 Open-loop, large-signal simulation [104]...... 54 Fig. 3.2 Circuit of the three-level FCBC with same grounding...... 54 Fig. 3.3 Ideal waveforms of the three-level FCBC for: (a) D ≥ 0.5, (b) D ≤ 0.5...... 57 Fig. 3.4 Operating modes of the three-level FCBC...... 58 Fig. 3.5 Comparison of theoretical and simulation results for the three-level FCBC...... 59 Fig. 3.6 RSCC boost converter: double-boost type circuit and control signals...... 61 Fig. 3.7 Operating modes of the RSCC boost converter...... 62 Fig. 3.8 Approximated waveforms of the RSCC boost converter when a constant Vo/2 voltage source substitutes the flying capacitor...... 63 Fig. 3.9 Voltage waveform of the LC tank and second order circuits formed during the operation of the RSCC boost converter...... 64 Fig. 3.10 Inductor current at T1 = 58.32° ...... 76

Fig. 3.11 Inductor current at T1 = 65° ...... 76 Fig. 3.12 Inductor current at T1 = 80° ...... 76

Fig. 3.13 Locus of a constant voltage ratio M = 2.67 at T1 = 90° and different values of R/Z r...... 78

Fig. 3.14 Best operating point at fsw = 1.4.(f r) = 19299.5 Hz, T1 = 52.03° ...... 81 Fig. 3.15 Comparison of theoretical and simulation results for the RSCC boost converter...... 82 Fig. 3.16 The Asymmetric Three-Level FCBC Boost Converter with auxiliary circuit (snubber) to obtain soft switching in switches S1 and S4...... 83 Fig. 3.17 Flying capacitor voltage reduction due to the asymmetric control signals...... 84 Fig. 3.18 Soft-switching simulated waveforms of the converter proposed in [105]...... 85 Fig. 3.19 PLECS thermal description for switching losses [117]...... 91 Fig. 3.20 PLECS thermal description for conduction losses [107]...... 91 Fig. 3.21 MOSFET electrical model...... 94 Fig. 3.22 Implementation in PLECS of the MOSFET electrical model...... 95 Fig. 3.23 Reverse recovery characteristic of the Body Diode of a SiC-MOSFET [121]...... 95 Fig. 3.24 MOSFET C3M0016120K thermal description for switching losses: (a) Turn-on, (b) Turn-off ...... 96 Fig. 3.25 Thermal description for conduction losses of MOSFET C3M0016120K (a) MOSFET, (b) intrinsic body diode...... 96 Fig. 3.26 MOSFET electro-thermal model in PLECS ...... 97 Fig. 3.27 Fourth order (n=4) Cauer Thermal Model [125]...... 98 Fig. 3.28 Circuit for electrical simulation of the Three-Level FCBC...... 99 Fig. 3.29 Subsystem "Three-Level FCBC" of Fig. 3.28...... 99 Fig. 3.30 Electro-thermal circuit of the Three-Level FCBC without heatsink thermal resistance...... 101 Fig. 3.31 Block diagram to obtain switching losses and conduction losses in PLECS simulations [126]. .. 101 Fig. 3.32 PLECS block diagram to calculate conduction and switching losses in MOSFET and body diode...... 102 Fig. 3.33 PLECS block diagram to calculate losses in ESR's...... 102 Fig. 3.34 Electro-thermal circuit of the Three-Level FCBC without heatsink thermal resistance but with subsystems to determine switching conduction losses...... 103 Fig. 3.35 Switching and conduction losses of MOSFET S1 and its body diode for the worst operating condition of the Three-Level FCBC...... 104 Fig. 3.36 Switching and conduction losses of MOSFET S3 and its body diode for the worst operating condition of the Three-Level FCBC...... 104 Fig. 3.37 Total loss calculation in PLECS ...... 105 Fig. 3.38 Electro-thermal circuit of the Three-Level FCBC with heatsink thermal resistance and subsystems to determine switching, conduction losses and efficiency...... 106 Fig. 3.39 PLECS block diagram to find the efficiency of the converter...... 106 Fig. 3.40 Three-Level FCBC: Efficiency vs. Voltage Conversion Ratio...... 107 Fig. 3.41 Circuit for electrical simulation of the RSCC boost converter...... 108 Fig. 3.42 Subsystem "RSCC" of Fig. 3.41...... 108 Fig. 3.43 Electro-thermal circuit of the RSCC boost converter without heatsink thermal resistance...... 109 Fig. 3.44 Electro-thermal circuit of the RSCC boost converter without heatsink thermal resistance but with subsystems to determine switching and conduction losses...... 110 Fig. 3.45 Switching and conduction losses of MOSFET S1 and its body diode for the worst operating condition of the RSCC boost converter...... 110 Fig. 3.46 Switching and conduction losses of MOSFET S3 and its body diode for the worst operating condition of the RSCC boost converter...... 111

Fig. 3.47 Electro-thermal circuit of the RSCC boost converter with heatsink thermal resistance and subsystems to determine switching, conduction losses and efficiency...... 112 Fig. 3.48 RSCC Boost Converter: Efficiency vs. Voltage Conversion Ratio...... 112 Fig. 3.49 Comparison of efficiencies of the Three-Level FCBC and RSCC boost converter at different voltage conversion ratios...... 113

Fig. 4.1 The voltage ratio of the RSCC also depends on the load R and the control variable T1...... 115 Fig. 4.2 RMS currents of passive components...... 115 Fig. 4.3 Control variable values and RMS currents of switching devices...... 116 Fig. 4.4 Drain-to-source voltages for different power conditions (from 127 W to 1.52 kW) and voltage ratio constant at 2.67...... 116

Fig. A.1 Classic Boost PFC ...... 121 Fig. A.2 Interleaved Boost PFC ...... 121 Fig. A.3 Dual Boost Bridgeless PFC ...... 121 Fig. A.4 Bidirectional Bridgeless PFC ...... 122 Fig. A.5 ZVS Totem-Pole Bridgeless PFC ...... 122 Fig. A.6 Interleaved Totem Pole Bridgeless PFC ...... 122

List of Tables

Table 2.1 Types of hybridization [17, 18]...... 18 Table 2.2 Semiconductor devices power ratings in vehicular applications [3]...... 18 Table 2.3 Electric power and voltage levels of different powertrains of hybrid electric vehicles [9]...... 18 Table 2.4 HV battery charger specifications [9]...... 20 Table 2.5 PHEV/EV battery charger specifications [9, 33]...... 25 Table 2.6 Electrical ratings of different EVs charge methods in Europe [40]...... 26 Table 2.7 EV charging modes [40] [41] ...... 27 Table 2.8 Advantages and disadvantages of PFC techniques [44]...... 29 Table 2.9 PHEV/EV battery charger regulatory standards [33]...... 29 Table 2.10 Published Standards and Regulations of EVs Infrastructure in the UK [41] ...... 30 Table 2.11 Popular PFC Topologies and Their Specifications...... 35 Table 2.12 Parameters and Figure of Merit (FOM) for Si, SiC and GaN devices [84]...... 42

Table 3.1 Main equations of the three-level FCBC...... 55 Table 3.2 Ripple equations...... 56 Table 3.3 Three-level FCBC specifications and circuit parameters...... 56 Table 3.4 RSCC boost converter equations...... 72 Table 3.5 Operating points for M = 2.67 ...... 79 Table 3.6 Best operating point for M = 2.67 from the point of view of the lowest ratio of peak inductor current to average output current...... 80 Table 3.7 Analysis of the operation of the lossless snubber proposed in [105]...... 88 Table 3.8 Three-Level FCBC specifications and circuit parameters for efficiency analysis...... 92 Table 3.9 RSCC Boost Converter specifications and circuit parameters for efficiency analysis...... 93

Table 3.10 Ranges of voltage conversion ratios ( M = V o/V in )...... 94 Table 3.11 Information that can be obtained from the MOSFET C3M0016120K datasheet...... 96 Table 3.12 Cauer-network elements of MOSFET C3M0016120K & body diode...... 98 Table 3.13 Maximum current and voltage ratings of MOSFETs of the Three-Level FCBC @ Vo/Vin=5 ...... 99 Table 3.14 Parameters of MOSFET C3M0016120K ...... 100

Table 3.15 Maximum current and voltage ratings of MOSFETs of the RSCC boost converter @ Vo/V in = 5 ...... 107

Table B.1 Theoretical and simulation results of the Three-Level Flying-Capacitor Boost Converter...... 123 Table B.2 Theoretical and simulation results of the RSCC boost converter...... 125

Table C.1 Thermal description for turn on energy calculation of MOSFET C3M0016120K at 25°C, 125°C, 175°C, and 900°C...... 126 Table C.2 Thermal description for turn-off energy calculation of MOSFET C3M0016120K at 25°C, 125°C, 175°C, and 900°C...... 127 Table C.3 I-V characteristic of MOSFET C3M0016120K at -40°C, 25°C, 175°C, and 900°C for calculation of conduction losses...... 128 Table C.4 I-V characteristic of intrinsic body diode of MOSFET C3M0016120K at -40°C, 25°C, 175°C, and 900°C for calculation of conduction losses...... 128

Table D.1 Three-Level FCBC: losses and efficiencies at different voltage conversion ratios...... 129 Table D.2 RSCC boost converter: losses and efficiencies at different voltage conversion ratios...... 129

List of Abbreviations

AC Alternating current

BCM Boundary Conduction Mode

BEV Battery Electric Vehicle

CCM Continuous conduction mode

CLFOM Conduction Losses Figure of Merit.

CO 2 Carbon Dioxide

CrCM Critical conduction mode

DC Direct current

DCM Discontinuous conduction mode

DCR DC Resistance

DSP Digital Signal Processor

ECU Electronic Control Unit.

EMC Electromagnetic Compatibility.

EMI Electromagnetic Interferences

EPS Electric Propulsion Systems

EREV Extended Range Electric Vehicle

EV Electric Vehicle

FCBC Flying Capacitor Boost Converter

FCV Fuel-cell Vehicle

GaN Gallium Nitride

HEV Hybrid Electric Vehicle

HV High voltage

ICE Internal Combustion Engine

ICS Input Current Shaping

KVL Kirchhoff Voltage Law.

LV Low voltage

OBC On-board charger

PEC Power Electronics Converter

PEV Plug-in Electric Vehicle

PF Power Factor

PFC Power Factor Correction

PHEV Plug-in Hybrid Electric Vehicle

RCD Residual-current device

RSCC Resonant Switched Capacitor Converter

SAE Society of Automotive Engineering

SCC Switched Capacitor Converter

SiC Silicon Carbide

SLFOM Switching Losses Figure of Merit.

SMPS Switch-mode power supply

THD Total Harmonic Distortion

WBG Wide-bandgap

Abstract

Name of the University: The University of Manchester

Candidate’s Name: Carlos Ivan Rueda Panchano

Degree Title: Master of Philosophy (MPhil)

Thesis Title: Power Dense Converters for Future Transport Systems

Over the last decades, diverse debates based on scientific judgments have concluded that the consumption of fossil fuel does not provide, either economically or environmentally, a sustainable development to the countries of the world. Moreover, due to the heavy dependence of industrial economies on fossil fuels, the rapid depletion of the earth’s petroleum resources has become a serious problem, particularly because most of the current transportation systems still rely on fossil-fuel-based technologies. In this regard, nowadays there are many efforts on reducing the consumption of fossil fuel in the transportation sectors around the world. At present, these efforts are beginning to create a competition between renewable energy technologies versus well-established fossil-fuel-based technologies.

In the same direction, the continuous development of power electronics technology and the arrival of wide band-gap devices has created new possibilities for improving fuel economy (& lower CO 2 emissions) of transportation systems in general. One priority is obtaining weight reduction of on-board electrical power trains of electrified vehicles by using highly efficient power-dense powertrain components, such as DC- DC converters or inverters. Furthermore, nowadays, the excessive currents needed by very fast battery charging methods preferred by EV customers, have become one of the main motivations that is pushing to the EV industry to raise the electric power train DC bus voltage from 400 V to 800 V.

In order to have information to make conclusions on relevant aspects such as reliability, affordability, efficiency, power density and so on, this work has studied analytically and by simulations, three DC-DC multilevel converters under demanding specifications as expected by DC-DC converters that are connected to a high-voltage DC bus. To perform the aforementioned, it has been necessary to derive a new set of mathematical expressions for one of these converters, and for the others mathematical expressions from the available literature have been utilized.

This investigation has also determined the potential that these DC-DC multilevel converters have to maintain the highest levels of efficiency when using actual SiC MOSFETs (Wolfspeed), under a wide variation of the voltage ratio, as desired in on-board battery chargers.

Declaration

No portion of the work referred to in the thesis has been submitted in support of an application for another degree or qualification of this or any other university or other institute of learning.

The author of this thesis (including any appendices and/or schedules to this thesis) owns certain copyright or related rights in it (the “Copyright”) and s/he has given The University of Manchester certain rights to use such Copyright, including for administrative purposes.

Copies of this thesis, either in full or in extracts and whether in hard or electronic copy, may be made only in accordance with the Copyright, Designs and Patents Act 1988 (as amended) and regulations issued under it or, where appropriate, in accordance with licensing agreements which the University has from time to time. This page must form part of any such copies made.

The ownership of certain Copyright, patents, designs, trademarks and other intellectual property (the “Intellectual Property”) and any reproductions of copyright works in the thesis, for example graphs and tables (“Reproductions”), which may be described in this thesis, may not be owned by the author and may be owned by third parties. Such Intellectual Property and Reproductions cannot and must not be made available for use without the prior written permission of the owner(s) of the relevant Intellectual Property and/or Reproductions.

Further information on the conditions under which disclosure, publication and commercialisation of this thesis, the Copyright and any Intellectual Property University IP Policy (see http://documents.manchester.ac.uk/DocuInfo.aspx?DocID=24420), in any relevant Thesis restriction declarations deposited in the University Library, The University Library’s regulations (see http://www.library.manchester.ac.uk/about/regulations/) and in The University’s policy on Presentation of Theses.

Acknowledgement

I would firstly like to express my sincere gratitude to Dr. Judith Apsley and Dr. Cheng Zhang for having constantly an attitude based on humility and integrity, which inspires me to work hard on this thesis even when circumstances became more difficult. It is very important, that you both know that without this confidence and without your continuous and honest support, maybe I would not be able to complete this work.

I also would like to say thank you to all of my friends of the Power Conversion Group of the University of Manchester. In this regard, my special gratitude is for my two best friends in this group who are Gerardo Calderón and Alejandro Villaruel. I could find such a fantastic friendship in these two people who saved my days several times during my studies in Manchester.

I also worked for some months with Prof. Andrew Forsyth and Dr. Rebecca Todd (†) and received important advices and knowledge from them. Therefore, I would like to say thanks for that.

I also would like to thank to the Secretaría de Educación Superior, Ciencia, Tecnología e Innovación (SENESCYT), which has provided the founds for my studies in Manchester.

During my studies, I received support from my parents so I also would like to express my gratitude to them. Finally, I would like to cite the words of Friedrich Nietzsche to show my sincere gratitude to my wife Fernanda and my children Carlitos and Alondrita, who are my main inspiration for my continuous work in the life.

He who has a Why to live for can bear almost any How.

Chapter 1: Introduction

1.1 Motivation for the Project, Aim and Specific Objectives

Currently, there is a lot of social, political and economic interest in obtaining the stabilization of atmospheric CO 2 levels so as to prevent severe climate changes [1, 2]. Consequently, in terms of electrical propulsion systems, novel concepts have emerged to pursue a substantial reduction of tailpipe emissions of ICE-based propulsion systems. Essentially, these concepts consider to replace either partially or fully the fuel consumption of ICEs by using Electrical Vehicular Technology in vehicle architectures and configurations and consequently to minimize the vehicle’s CO 2 emissions [3].

The low efficiency of oil-propulsion systems based on internal combustion engines can be significantly enhanced by using electrical propulsion systems that store electrical energy, control the power flow and create propulsion with an electric motor [3]. Nowadays, power electronics technology makes use of high- energy-density storage systems and high-power-density converters to make the typical EV powertrain lighter and smaller, which are attractive characteristics in terms of fuel economy and implementation feasibility [4]. For example, with the use of lighter and smaller powertrains, the combinations of different kinds of energy sources, storage systems, and highly efficient converters, meaning hybridization of the vehicle’s powertrain, can become a viable solution to get an attractive offer of fuel economy, which reduces the vehicles’ CO 2 emissions as well [3, 5].

On the other hand, emerging WBG semiconductor devices (SiC and GaN) can operate efficiently at higher frequencies than Si devices, which reduces drastically the size of passive components and heatsinks and rises the efficiency of converters. At the same time, these devices are also appropriate for operation at higher voltages so that they can be useful to reduce the wiring harness of EV powertrains. Therefore, the use of WBG devices can improve even more the energy-use economy by reducing the weight and size of the components of the powertrain such as the DC-AC inverter and DC-DC converters. However, it is necessary to mitigate the effects or repercussions of high switching frequency on passive- component losses and EMI so research in this respect is ongoing worldwide currently.

Electric vehicles need high-power high-voltage DC-DC converters as an interface between a low voltage end, which is usually a battery or super capacitor [6], and the DC bus of their powertrains. When the application requires bidirectional power flow (e.g regenerative braking, or battery charging) the DC-DC converter has to be bidirectional. Furthermore, the DC-DC converter of EV applications can be non- isolated or isolated. The former is generally used when the conversion ratio is lower than four and the latter when the output must be isolated from the input. However, good features on weight, efficiency, volume, EMI, and input current ripple and also to have a control system that can adequately operate at wide voltage variation of the converter input, are always essential characteristics on any DC-DC converter for EV applications [7].

Nowadays, as faster charging methods are more and more required, EV’s manufacturers are raising the voltage of the high-voltage DC bus from 400 V to 800 V in order to keep currents under acceptable levels in the power electronic converters of the electric power train. However, semiconductor devices may not

13 be that suitable to operate in classical topologies at such high voltage levels and at the required frequencies and powers due to excessive losses, deterioration of reliability among other factors. Consequently, it is desirable to find an optimum way to operate these converters or identify alternative topologies that can achieve high-performance under these new requirements.

This study has undertaken an analysis and comparison of three DC-DC topologies that can be appropriate to operate at higher voltages (e.g. 800 V) and higher powers when using WBG devices. On this subject, several simulations and analytical calculations that are based on equations directly taken from the literature have been performed here. This work has also derived several mathematical expressions for one of these converters and at the same time, the efficiency of two of these converters has been studied in a wide voltage ratio range by using PLECS loss simulation models.

Next, the aim and specific objectives of this thesis are presented:

Aim:

To demonstrate analytically and by simulations the suitability of multilevel DC-DC converters to participate in high-power high-voltage applications in on-board electrical power trains

Specific objectives:

• To become familiar with the latest advances (ratings & characteristics) in power devices, especially SiC and GaN.

• To understand the main performance targets of high-power high-voltage DC-DC converters of the electric power train (e.g. higher efficiency, higher power density, higher voltage, lower cost and so on).

• To study multilevel DC-DC converters and select those that may have the potential to achieve improved performance in high-voltage (e.g. 800 V), high-power applications (e.g. EV’s on-board battery chargers).

• To undertake simulations and analysis on the topologies investigated and selected above.

• To compare these multilevel DC-DC converters to reveal advantages and disadvantages of each one of them.

Chapter 2: Literature Review

2.1 Power Electronic Converters for Future Transport Systems

2.1.1 DC-DC Converters for Electrified Vehicles 1

Electrical vehicular technologies can be broadly classified as Battery Electric Vehicles (BEVs), Hybrid Electric Vehicles (HEVs), Plug-in Hybrid Electric Vehicles (PHEV) and Fuel-cell Vehicles (FCVs). Electrified vehicles use powerful power electronics converters (PECs) and control systems to convert and control electric power [5, 8]. An AC-DC, a DC-DC and a DC-AC converter form the typical power electronic system of electrified vehicle power trains. As shown in Fig. 2.1, in a typical power electronic system of an electrified vehicle, there is a low-voltage (LV) DC bus which is fed by a LV battery and a high-voltage DC Bus fed by a HV battery. A DC-AC inverter connected to the HV DC bus supplies a high- power high-voltage electric traction motor, whereas a low-voltage DC-DC converter connected to LV DC bus supplies low-power conventional loads [6, 9]. Additionally, an AC-DC rectifier with necessary power factor correction, is used for charging from the electric grid [3].

Fig. 2.1 Typical power electronic system of a typical power train of an electrified vehicle [9].

PECs of electrified vehicles modulate the power of the power electronic system by changing the voltage and current to required levels. They can be capable of controlling the direction of power flow so that they are able to supply loads and recover energy from them if necessary. PECs are required to have high efficiency and being small-volume to contribute to the reduction of size and weight of on-board

1 As stated in [8], “Electrified Vehicles” denotes technologies that are used in vehicle propulsion: e.g. Hybrid Electric Vehicles (HEV), Plug-in Hybrid Electric Vehicles (PHEV), Blended PHEVs, Extended Range Electric Vehicles (EREVs), Battery Electric Vehicles (BEVs), Fuel-cell Electric Vehicles (FCEVs), Plug-in Electric Vehicle (PEV) and Electric Vehicle (EV). The term EV may be used inconsistently to refer BEVs or also PEVs + FCEVs or any other electrified vehicle as well. 15 equipment, which helps to obtain higher fuel economy and reduce limitations of available space [3]. So at present, PECs for electrified vehicles perform high-efficiency on-board power processing with the intention of obtaining compatibility among energy sources and electric loads such as valves, actuators, traction motors, and auxiliary loads like air conditioner, head lamp, power steering, etc. [3], but also to get high-power density (kW/L) and high-specific power (kW/kg) as desired features of electric vehicles [7].

Nowadays, the introduction of more and more electrical devices that are replacing traditional mechanical and/or hydraulic components as well as the insertion of luxury loads has increased the power demand of electric propulsion systems; in fact, according to [10, 11], an increase of electric loads of 4% per year is assumed. Since higher power will demand higher currents in the power electronic systems, less efficiency should be expected due to the increase in losses unless higher voltages (e.g. 800 V) can be used to reduce the current levels [9, 12, 13], which consequently will have the direct benefit of reduced-size wiring harness and also other several advantages [10]. Hence, in accordance with what has been previously said, high-power high-voltage DC-DC converters have become a focus of attention in power electronic systems of electrified vehicles in the last years because given the high-power high-voltage nature that exists in more-electric vehicular applications, the DC-DC converter function needs to be outstanding to guarantee a high reliability fault-tolerant performance [10]. Finally, DC-DC converters of vehicle applications (Fig. 2.2) also need to address important challenges that are related to electromagnetic interferences (EMI) and electromagnetic compatibility (EMC) to meet vehicle standards or to avoid temperature related issues [7, 10].

Fig. 2.2 DC-DC converters applied in electrical vehicles [6].

DC-DC converters for electrified vehicles may be unidirectional or bidirectional. The former are used to supply power to on-board loads like sensors, control, entertainment, utility and safety equipment and the latter, which are usually connected to a low voltage battery or super capacitor, are used in battery charging, regenerative braking (DC-DC converters enable regenerative braking by allowing bidirectional power flow) and backup power [6]. Galvanic isolation, which is preferred since it provides safety for the loading devices [6], can be achieved in DC-DC conversion stages and it should be used when voltage conversion ratio is necessary to be high [14]. However, isolated DC-DC converters have extra component requirements and as a result a higher cost [3]. This kind of converter also has the problem of an increased area, volume and weight since they use a high frequency transformer [6]. Non-isolated DC-DC converters have simplified construction and control scheme [14], which results in fewer components thus

16 higher reliability [15], less cost and also less weight and volume. These kinds of converters should be generally used when the voltage conversion ratio is relatively small (less than 4:1) and when there is no necessity of dielectric isolation between the input and output of the converter [7, 14]. Furthermore, both unidirectional or bidirectional DC-DC converters can be isolated or non-isolated and there are some techniques that can be used to overcome efficiency problems related with the high voltages and high currents that are found in DC buses during operation. Examples of these techniques can be soft- switching, passive snubbers, active clamping, active commutation, etc. [6].

The control complexity of DC-DC converters should reduce when the number of components and switching devices is low; however, the control system of an electrified vehicle has many other complex issues to solve which involves the utilization of other kind of power converters. So in electrified vehicle applications, it is necessary to use an Electronic Control Unit (ECU) to integrate all of the control issues and get an overall control and management strategy to get the required vehicle operation. According to [3], the control unit should consider objectives as monitoring the battery’s state of charge, fuel economy, reduced emissions, efficiency optimization and so on.

2.1.2 Electric Specifications of DC-DC Converters for Electrified Vehicles

Electrical vehicular technology is represented by some kinds of more electrical vehicles such as BEVs, FCVs, HEVs and PHEVs. Nevertheless, HEVs have become the most commercialized 2 type of electrical vehicular technology compared with the other technologies, which will be maintained in the near future [16]. HEVs have become popular mainly because of their higher driving distance, good fuel economy, higher efficiency, sufficient on-board power and better dynamic response [3].

HEVs and PHEVs reduce fuel consumption by replacing the ICE partially or fully with one or more electric motors for traction [5]. These kinds of vehicles have powertrains with a certain degree of electrification, also termed as the degree of hybridization. According to that, their power trains can be separated into micro, mild, and full hybrid [9]. The plug-in hybrid type differs from the full hybrid in that it can also be connected to the grid.

The main functions of these hybridized powertrains are indicated in Table 2.1, which suggests that full- hybrid, and plug-in hybrid vehicle extends their electrical features to the maximum level. Table 2.1 mentions vehicle operation modes such as start-stop system, regenerative braking, charge-depleting mode, and rechargeable mode. A start-stop system allows the vehicle to turn on/off its ICE automatically according to the battery state-of charge (SOC). The start/stop system has also the function of reducing the idle periods of this engine. Regenerative braking is a capability of electrified vehicles to recover kinetic energy from the load at the time of braking, and storing this energy until needed or using it immediately. When operating in charge-depleting mode, a vehicle decreases on average its battery SOC. The term “rechargeable” means that the vehicle can use an external power supply to increase its battery SOC without depending exclusively on other means (e.g. regenerative braking or an alternator).

2 For the North America market. 17

Table 2.1 Types of hybridization [17, 18].

Table 2.2 Semiconductor devices power ratings in vehicular applications [3].

2.1.3 High-Power High-Voltage Power Electronic Converters of Electrified Vehicles

Fig. 2.3 [19], shows an overview of an electrified vehicle system. Notice that Fig. 2.3 hints at the possibility of having different alternatives for charging the LV batteries or HV batteries of electrified vehicles. Additionally, it is showing the charging approaches of electrified vehicles, which can be divided into two categories: inductive charging (wireless) and conductive charging (hard-wired).

In Fig. 2.3, the On-Board Charger and the Traction Inverter, both highlighted in red, are two components among those that operate at high voltage and have high-power demands [19]. These two components should have specifications such as small volume, low weight and high efficiency in order to improve the vehicle’s fuel economy, makes more viable the practical implementation, and to improve the reliability among other benefits. Suitable specifications for these kinds of power electronic converters are identified next.

2.1.3.1 Specifications of the Traction Inverter (& Boost Converter)

Table 2.3 shows electric power and voltage ratings of hybrid electric vehicle types. As shown in this table, traction motors of full-hybrid vehicles (e.g. HEV / PHEVs) can have power ratings as high as 80 kW and generally DC-Link voltages of up to 650 V. Optionally, to increase the efficiency of the system, a DC-DC boost converter may be used to supply the DC-link of the traction inverter. This boost converter, thus, should be able to withstand the same power and voltage specifications of the traction inverter, i.e. those of the table below.

Table 2.3 Electric power and voltage levels of different powertrains of hybrid electric vehicles [9].

Fig. 2.3 Overview of an electrified vehicle powertrain. 19

2.1.3.2 Specifications of the On-Board Charger (OBC)

The on-board battery charger is a component of the electrified vehicle powertrain, which has medium to high power requirements, i.e. it operates at powers from 1kW to about 14.4 kW. In practical scenarios, the on-board charger (OBC) charges the HV battery at usually 400 V, with an efficiency better than 95% and is unidirectional. This module also includes power factor correction (PFC) to minimize harmonics in the AC input lines [19].

For battery chargers, the power and voltage specifications can be classified by levels, where AC Level 1 and AC Level 2 correspond to on-board chargers and AC Level 3 to off-board chargers. The higher the AC-Level number, the higher the power and the shorter the battery charging time. Since AC Level 1 and AC Level 2 battery chargers are on-board, the increasing of their efficiency and reducing their size and weight is directly beneficial for the vehicle. The following table summarizes the power and voltage specifications of these AC Levels.

Table 2.4 HV battery charger specifications [9].

As shown in Fig. 2.1, power factor correction has to be implemented in on-board chargers. Since OBCs are of special interest for this study, power factor correction and other relevant topics related to on-board battery chargers used in EV applications are studied with more detail next.

2.1.3.2.1 Power Factor Correction

Power factor (PF) is a measure of how effective the utilization of real power in an electrical system is. This quantity can be obtained by using the following equation [20]:

(2.1) When a single-phase electrical system is linear and is fed with a pure sinusoidal input voltage ( vin ), it draws a sinusoidal input current waveform ( iin ) from the power source, as indicated in Fig. 2.4 [20]. However, if this linear system has not only resistance in the load but also reactance, the apparent power of the system depends on the system impedance, and the real power depends on the phase angle ( θ) between the input voltage and input current, as indicated in Fig. 2.5 [20]; then, the PF is determined by the following equation.

, . , .cos (2.2) cos , . ,

Fig. 2.4 Power, voltage and current in a single-phase linear electrical system with resistive load.

Fig. 2.5 Waveforms of voltage, current and power in a single-phase linear circuit with inductance.

Note in Fig. 2.5, that reactive elements can create an angular displacement θ between vin and iin , which creates negative instantaneous power. This power corresponds to power that is returning to the electrical grid during each cycle. Due to this fact, there will be an increase of the apparent power demanded by the electrical system, however, note that the real (average) power demanded by the load maintains its same value, a constant value. Consequently, the aforementioned increase of apparent power should be due to the addition of another sort of power, which is known as the reactive power (Q). The reactive power is taken from the grid by reactive elements, such as inductors and capacitors of the electrical system. In fact, due to the unique ability [21] of inductors and capacitors to store/release energy in the power conversion process, there is no real power consumption in these passive elements, i.e. their average power should be zero ideally. However, to store/release either magnetic energy (inductors) or electrostatic energy (capacitors), the electrical system requires Q from the power source [22], which travels back and forth in the system without creating useful power consumption [23] in the process. It is worth mentioning that the formation of Q decreases the power factor because there is more demand of apparent power as mentioned previously, which in turn, increases the demanded RMS input current, and consequently, it increases losses in the power-distribution system and the converter itself.

On the other hand, non-linear behaviour of switch-mode power conversion technology creates distorted current and voltage waveforms. For instance, in a non-linear electrical system as indicated in Fig. 2.6, a 21 load under sinusoidal voltage, does not draw from the AC power source, a sinusoidal current but a distorted periodic current, where φ is the angular displacement between the input voltage and the input current. For this non-linear system, the calculation of PF, needs to consider the application of the Fourier theorem to determine harmonic components of the input current and input voltage waveforms, thus taking into account the harmonic distortion of these periodic and continuous waveforms and calculating the real power and apparent power properly.

Fig. 2.6 Non-linear electrical system and distorted input current [20].

Nevertheless, as previously stated, distorted current waveforms at the AC input lines contain harmonic currents. These harmonic currents produce distorted voltage drops that propagate through the AC input lines, resulting in distorted voltage waveforms that affect the performance of other electrical systems in the vicinity, or may affect the operation of the source of harmonic currents itself [20, 24]. Harmonic pollution may also create other problems that affect the power quality of the main utility power supply. For instance, it increases RMS currents and subsequently, it reduces the power capacity of distribution systems. Additionally, it increases the copper and iron losses of transmission systems, overloads the neutral conductor in three-phase systems, mistriggers protection devices, causes electromagnetic interferences, and so on. Therefore, several standards have been issued related to harmonic control. This fact has stimulated investigations in areas related to input current shaping (ICS) looking for harmonic reduction and power factor correction (PFC) [20].

Assuming that for the non-linear system of Fig. 2.6, vin is a perfect sinusoidal waveform, equation (2.2) becomes the following [20].

, (2.3) .cos . , Where:

θ1 is the phase-angle between vin (t) and the fundamental component of iin (t) , Iin1,rms is the rms value of the fundamental component of iin (t) , and Iin,rms is the rms value of iin (t) . The factors Iin1,rms /I in,rms and cos( θ1) are known as the distortion factor ( kdist ) and the displacement factor ( kdisp ), respectively.

In (2.3), kdist is related to the input-current shape distortion and kdisp is because of θ1, which is the angular displacement of the fundamental component of the input current with respect to the input voltage [25]. Then, it is important to notice that improvements of the power factor of the non-linear electrical system of

Fig. 2.6, need to consider, on the one hand, reduction of harmonics, i.e. kdist increasing, and on the other hand, reduction of the angle θ1, i.e. kdisp increasing.

A waveform parameter that can be used to measure the distortion of a non-linear electrical system input current waveform [20], is the current total harmonic distortion ( THD i), represented by (2.4). This quantity can be considered as a power quality issue [26] and should be interpreted as a measure of the similarity between the input current waveform and its fundamental component [27].

∑ , 1 (2.4) − 1 , Meanwhile, in the area of hybrid electric vehicles and electric vehicles (HEVs/EVs) powertrain electrification systems [28], non-linear systems that use switch mode power conversion technology can be found in three kinds of power conversion sub-systems: AC-DC (rectifier), DC-DC (converter) and DC- AC (inverters). The high-voltage (HV) on-board charger of a plug-in HEV or EV, consists of an AC-DC converter that, by using the grid power source, charges the vehicle's battery pack at high DC voltage. This high voltage battery configuration is often called the 400 V system and is normally in the 150-450 VDC range [29]. Due to the power level of these on-board chargers (more than 75 W), they inevitably need to implement PFC [30] to meet regulatory standards.

A typical single-phase AC-DC converter with a PFC unit is presented in Fig. 2.7. Assuming that the input current and the input voltage of this circuit are sinusoidal waveforms (i.e. PF = 1), then the instantaneous input power pin (t) is given by (2.5) [27]. In this equation Pin is the real (average) power.

(2.5) . , . , . sin 1 − cos 2

Note in (2.5), that the real power Pin is not equal to the instantaneous power pin (t) but it has a varying component with frequency 2. ω [31]. However, the real power is the power that produces effective (utilizable) energy in the electrical system and it should be stable over time. Therefore, if the instantaneous input power is higher than the average input power, i.e. pin (t) > P in (=P o), it means there exists an excessive input power for the load, which in energy terms, represents input energy in excess

(see Area I in Fig. 2.8). This excessive input energy Wex (t) , has to be stored somehow in the circuit.

Likewise, note that when pin (t) < P in (=P o), there exists a deficit of input energy, which should be supplemented by the stored energy previously mentioned. Consequently, the circuit of Fig. 2.7, which can be seen as an initial stage of a HV on-board charger used for PHEVs and EVs, has to have a PFC stage that is able to balance Wex (t) as seen in Fig. 2.8. In simple words, the PFC stage has to be able to store energy when pin (t) > P in (=P o) and release it when pin (t) < P in (=P o) in order to keep a balance of energy in the circuit and the output power constant. This process could be achieved by using energy storage components such as inductors and capacitors [31].

Fig. 2.7 An AC-DC converter with PFC [31].

Fig. 2.8 Energy balance in an AC-DC converter with PFC [31].

2.1.3.2.2 Classification and Standards of Battery Chargers for Electric Vehicles

Battery chargers for EV/PHEV can be AC or DC charging systems. Ref. [32], states the following three key functions that have to be accomplished by these charging systems:

• Getting charge into the battery (charging).

• Optimising the charging rate (stabilising).

• Knowing when to stop (terminating).

Commonly, AC chargers are those that are mounted inside the vehicle. In this type of chargers, AC power is supplied to the vehicle, where an on-board AC-DC charger with PFC, converts this AC input power into DC to supply the vehicle´s battery. According to the International Society of Automotive Engineering (SAE International), for AC charging systems, the levels of power to charge the vehicle´s battery goes from classification AC Level 1 up to AC Level 3, meaning from 1.08 kW (AC Level 1), up to power levels that can be higher than 14.4 kW (AC Level 3). AC Level 2, which corresponds to power levels from 3.3kW up to 14.4 kW, and AC Level 1, which is also known as "Home Charging" [32], are considered slow charging, however, they are the customer's preference for the future [32], and also the dominant charging technology in production these days [33]. AC Level 3 charging systems are rated as "fast chargers",

24 however, this designation should be considered accurate as long as the charging time of the vehicle's battery pack is 30 min or less [33].

On the other hand, DC chargers are always mounted outside the vehicle, at fixed locations [33]. In this case, the charger is an off-board charging box where AC power is received and transferred as DC power to the vehicle. Currently, DC charging system can reach very high power levels, which reduces the charging times impressively. Porsche, for example, is behind the global establishment of a very high DC fast charging infrastructure that can charge vehicles with a power capability of up to 350 kW [34], in order to obtain for the new Taycan model very fast charging times, in a 15-20 minutes range. In this way, the Taycan’s charging time becomes closer to what it takes to fill up the fuel tank of a passenger vehicle with petrol [35]. Nowadays, the charging time is becoming the main customer-anxiety-reduction target of car manufacturers [36]. In this respect, recent improvements in battery technology, as in [37], have made it possible to charge an EV battery pack for a 200 to 300 mile range in just 10 minutes. Nonetheless, those outstanding charging times can be only reached by very-high-power charging systems such as DC Level 3 chargers.

As previously mentioned, SAE International has classified AC charging systems and DC charging systems according to their battery-charging power “levels”. In this regard, Table 2.5 contains the high- voltage (HV) battery charger specifications for AC and DC charging systems widely applied in the US 3 based on the SAE power-level categorization as mentioned in SAE J1772. Fig. 2.9 (taken from [38]) exemplifies these charging methods in a PHEV. Consider that the lower the power level, the longer the time required to obtain a full charge of the vehicle´s battery [39].

In Europe, charging equipment for EVs can be AC or DC as in the US and its classification is as a function of the charger’s rated power, as indicated in Table 2.6 (taken from [40]), which presents three charging categories: normal power (slow charging), medium power (quick charging) and high power (fast charging). This categorization of EV chargers is based on the only standard available at European level, which is the IEC 61851 standard [40]. In the UK, the BS EN 61851-1 standard defines four modes for EV charging [41] as indicated in Table 2.7.

Table 2.5 PHEV/EV battery charger specifications [9, 33].

3 Currently, SAE International serves worldwide as a standards developing organization. 25

Fig. 2.9 On/Off board charging system for EVs [38].

Table 2.6 Electrical ratings of different EVs charge methods in Europe [40].

Charge Method Connection Power [Kw] Max current [A] Location

1-phase AC Normal power 3.7 10-16 Domestic connection

1- or 3-phase AC Medium power 3.7 – 22 16-32 Semi-public connection

3-phase AC High power > 22 > 32 Public connection

High power DC connection > 22 > 3.225 Public

Table 2.7 EV charging modes [40] [41]

MODE 1: Non-dedicated circuit and socket outlet.

• AC connection, slow charging. • A cable with no control equipment is used. • Not recommended for use.

MODE 2: Non-dedicated circuit and socket outlet, cable-incorporated RCD.

• AC connection, slow charging. • In-cable control and protection device. • Limited to 3 kW (13 A) in residential use or 7.4 kW (32 A) for industrial use.

MODE 3: Dedicated EV charging system, dedicated outlet.

• AC connection, slow or fast charging. • Charge point with control and protection functions. • EV charging system commonly operating at 3.7 kW (16 A) or 7.4 kW (32 A) in residential applications. Power may be significantly higher in commercial or public applications.

MODE 4: Dedicated EV charging system, dedicated outlet.

• DC connection, fast charging using an external DC charger. • Control functions within the charge point. • Operates at around 50 kW but higher is possible if supply facility allows.

It has been understood that battery chargers of PHEV/EV transfer electrical power from an AC source to the vehicle's battery by means of an AC charging system or a DC charging system. Thus, these charging systems can be considered as switch mode power supplies (SMPS) because they have the function of transferring power from an AC (or DC) source to a DC load [42].

Practical SMPSs offer high efficiency and small size, however, they usually reduce the output-voltage ripple by using a large electrolytic capacitor in the output side of its bridge rectifier [20]. Consequently, the input current flows only when the input voltage is higher than the output capacitor voltage. This situation, for the case of the single-phase on-board charger, which is the most popular EV charger nowadays [43], should cause a pulsating input current waveform in the AC input lines connected to the charger. Such a pulsating current waveform causes the power quality to deteriorate due to its high THD, resulting in poor PF (usually lower than 0.67) [20]. If the PFC technique consists in the use of passive components, then the PFC is known as a passive PFC, otherwise, the PFC circuitry corresponds to an active PFC [44]. Fig.

2.10 [44], exemplifies the typical behaviour of the line current Iin (blue – dashed line) and the terminal voltage Vin (red – continuous line) of a single-phase non-linear converter. Note in this figure, how the passive and active PFC techniques not only can reduce the angular displacement between the input voltage and input current but also can reduce the THD of the original current waveform, thus increasing the PF of the converter. This figure also shows that active PFC outperforms passive PFC. However, comparative advantages and disadvantages, as shown in Table 2.8, should be considered properly by the designer to choose the PFC technique according to the application requirements. For example, passive PFC is commonly used in high-power-line applications due to its higher reliability and easiness to maintain, but active PFC dominates the low to medium power field due to its regulation capabilities, higher efficiency, higher power densities and higher power factor [20].

In the 1970s, the rapid proliferation of non-linear loads connected to the electrical grid, meant that harmonic-control standards began to appear in the early 1980s, which opened the door to researchers to start working on obtaining converters with low harmonic distortion and high-power factor [20]. Nowadays, low, medium and high power PHEV/EV battery chargers exist, regulated by popular/relevant harmonic control standards such as the IEC 61000-3-2 for currents lower than 16 A, and the IEC 61000-3-12 for currents greater than 16 A and up to 75 A [45]. The harmonic control standard IEEE Std 519 [46] is also applicable at high power levels [33]. Nevertheless, for safety reason all of the standards of Table 2.9 must be achieved by the vehicle charger as well [33]. These standards are applicable for the US and/or the EU. Table 2.10 presents standards and regulations published for the UK on this respect.

Fig. 2.10 Voltage (red) and line (blue) current: (a) Original line current, (b) line current with passive PFC, (c) line current with active PFC [44].

Table 2.8 Advantages and disadvantages of PFC techniques [44].

Table 2.9 PHEV/EV battery charger regulatory standards [33].

Table 2.10 Published Standards and Regulations of EVs Infrastructure in the UK [41]

2.1.3.2.3 Popular PFC Topologies for On-Board Chargers and Their Specifications

Since on-board chargers for electric vehicles and plug-in hybrid electric vehicles are generally AC powered [47], then this section will address on-board AC chargers only. Voltages, currents, and power levels for these kind of chargers have been mentioned previously as well as for DC chargers (see Table 2.5). On-board AC charging systems have a PFC unit as required by harmonic-control standards such as IEC 61000-3-2 and others.

On-board AC chargers act as the charging interface between a single-phase AC power source and the battery storage system of the EV/PHEV. They can be categorized according to their power ratings as AC Level 1 (slow charging) and AC Level 2 (semi-fast charging). As indicated in Table 2.5, on-board chargers rated as AC Levels 1 or 2, are single-phase on-board. Moreover, power levels for AC Level 1 are below 1.44 kW, and for AC Level 2 up to 14.4 kW.

On-board chargers configuration, as indicated in Fig. 2.11 (adapted from [47]), can be of two different types: dedicated or integrated. Nevertheless, regardless the type of configuration, due to weight, size and cost constraints, usually power levels of on-board chargers are below 3.5 kW [47].

Dedicated on-board chargers, Fig. 2.11 (a), have specific circuitry for charging the battery of the electric vehicle. Therefore, usually for convenience, dedicated on-board chargers are single-phase, low-power, and small-size. On the other hand, integrated on-board chargers, use the circuitry of other subsystems of the powertrain, such as the motor-drive converter and the motor windings, for charging purposes. In this way, they reduce cost, size and weight, while increasing the power level and reducing the charging time. They also can be single-phase or three-phase grid connection, according to the required power level.

Fig. 2.11 Charging configurations of electric vehicles: (a) on-board dedicated charger, (b) on- board dedicated integrated charger [47].

Fig. 2.12, presents, as simplified block diagrams, the most common configurations for AC-DC converters with active PFC. The most common AC-DC converters with active PFC are single-stage or two-stage configurations [20]. However, the single-stage approach is only lead-acid battery compatible 4, which is not the battery technology used in PHEV/EVs. Furthermore, due to safety reasons, galvanic isolation is

4 Single-stage on-board chargers undergo large low-frequency ripple in the output current, which makes them suitable to charge lead acid batteries [33]. 31 required in PHEV on-board battery chargers. Therefore, for the power levels required by on-board chargers for PHEV, the two-stage scheme is more suitable [33] although they are bulkier, have higher component count, lower efficiency, higher cost, and complex control circuitry [20].

Fig. 2.12 Common configurations of AC-DC converters with PFC: a) two-stage, b) one-stage. [20].

Fig. 2.13 [33], shows the block diagram of a single-phase two-stage battery charger for PHEVs and EVs. The figure divides the on-board charger in three stages. The input and output stages have high-powered subsystems, e.g. "AC-DC PFC Converter", "Isolated DC-DC Converter", and so on. The control stage uses a low-powered circuit, which in Fig. 2.13, consists of only one subsystem to control the input and output stages. Relevant aspects about these three stages are mentioned next.

Fig. 2.13 Block diagram of an on-board two-stage battery charger with universal input (adapted from [33]). 32

The input stage, also known as pre-regulator [20], consists of an AC input filter and an AC-DC PFC converter. This stage is used to remove harmonic components of the input current because, usually, the AC-DC PFC converter uses a bridge-capacitor rectifier, which pollutes the AC input lines. In order to remove the harmonic current components, the bridge-capacitor rectifier is then followed by a PWM switching converter topology 5 that is designed to nearly emulate a resistive load at the input terminals, thus not only the input voltage and input current of the charger system become in phase, but also the average input current maintains an approximated sinusoidal shape. The result of this, is an on-board charger with very low THD and very high PF. This is the so-called active PFC technique [33]. Additionally, a capacitor bank or DC link is connected at the output of the input stage to provide a more stable voltage for the second stage. Generally [20], the DC link voltage has a ripple at the 2nd harmonic [48], i.e. at 120 or 100 Hz depending on the AC-input frequency, 60 or 50 Hz, respectively.

The output stage, also known as post-regulator [20], involves an isolated DC-DC converter topology that is followed by an output filter. Often, this stage is used for fast-dynamic output-voltage regulation and to establish the desired limits to the voltage or current ripple [48]. It converts the DC link voltage into regulated DC voltage, as required by the battery charging process. According to [33], this stage has to accomplish the following requirements for battery chargers:

• Galvanic isolation (regulatory requirement).

• Suitable for high power (> 1 kW).

• High efficiency (> 95%).

• Soft-switching: zero voltage switching (ZVS) and zero current switching (ZCS) and fs > 100 kHz operation.

• Low EMI.

• Low output voltage/current ripple (avoid battery heating).

• Small size.

• Cost effective.

The control stage uses a control strategy to realize PFC by shaping the average input current, applying input current shaping (ICS) techniques. These techniques are intended to trace the shape of the line voltage (sinusoidal), thus increasing the PF.

In this regard, the shape of the average input current usually depends on the conduction mode of the input inductor current of the AC-DC PFC converter subsystem, which can be continuous conduction mode (CCM), discontinuous conduction mode (DCM) and critical conduction mode (CrCM). Therefore, there exists CCM, DCM or CrCM shaping or control techniques to correct the power factor. Each one of

5 The boost converter is the most popular topology for PFC applications [33]. 33 these techniques can use, as control variable, either the line current or line voltage, i.e. they can be current- or voltage-based control methods [20].

Advantages and disadvantages can be found at any of these control techniques. For instance, the CCM control technique uses complex control systems to obtain the PFC ability in the converter, but it produces reduced losses; hence, it can be used in high power applications. The DCM shaping technique has an inherent PFC ability, so it is cheaper, but its higher peak currents, render this control technique suitable for low-to-medium power levels only. Finally, the CrCM control technique can be suitable in some cases, depending on the topology and the applied current-mode control scheme; for instance, constant-on-time (COT) or variable-on-time (VOT) current-mode control schemes [20].

Summarising the aforementioned, the control stage is intended to control the transient behaviour of the system and to regulate the output voltage according to the battery management system (BMS) requirements [33, 47]. It is worth mentioning that it is possible to have two separated control systems in the control stage (see Fig. 2.12 (a)), one for the pre-regulator and another for the post-regulator, in order to improve their performances individually [20].

Ref. [33], mentions a group of suitable topologies for PHEV on-board charger applications. These topologies can be applied in the AC-DC PFC converter subsystem of Fig. 2.13. They are the following:

• Conventional Boost PFC Converter.

• Interleaved Boost PFC Converter.

• Bridgeless Boost PFC Converter.

• Dual-boost PFC Converter.

• Semi-Bridgeless Boost PFC Converter.

• Bridgeless Interleaved Boost PFC Converter.

The PFC circuit goal is to achieve PF = 1 and THD = 0 in AC to DC conversion. However, the selection of a PFC topology is also influenced by major specifications such as cost, power factor, efficiency, among other requirements, e.g. type of control, complexity [49], robustness and so on. In this regard, Table 2.11 presents selection information of some of the most popular PFC topologies nowadays.

Table 2.11 Popular PFC Topologies and Their Specifications.

Topologies ZVS Totem-Pole Interleaved Totem Classic Boost Interleaved Boost Dual Boost Bidirectional- Bridgeless PFC Pole Bridgeless PFC (see note 1) PFC (see notes 1 Bridgeless PFC bridgeless PFC (see notes 1, 2 & PFC (see notes 1, [50] [51] & 3) [50] (see note 1) [50] (see note 1) [51] Specifications 4) [50] [51] 2 & 5) [52]

Schematic • See appendix A. • See appendix A. • See appendix A. • See appendix A. • See appendix A. • See appendix A.

• Bridge • Bridge • Bridgeless (also • Bridgeless • Bridgeless • Bridgeless Bridge / known as semi- Bridgeless (see bridgeless or note 6) bridgeless with reduced noise).

• 95-97% • 94.5-98.5% [51] • 97-98% • Approx. 98.5% at • 98-99.5% • Very high 230 VAC & >97.5% efficiency. Efficiency at 115 VAC are

achievable.

Power handling • 100 W - 4 kW • 3 kW - 7 kW • 100 W – 4 kW • From 200W up to a • 1 kW - 5 kW. • Multi-kw. capability few kW.

• Low cost. • Low input current • Half bridge (lower • Lower common • High efficiency. • This topology ripple. bridge losses). mode EMI achieves higher • Few components. • Few components. compared with efficiency and • Small input inductor • Higher efficiency. • Simple control. totem pole PFC. • Zero-voltage higher power and higher power switching. density compared Advantages density. • The implementation to the ZVS Totem is possible with a • Multiple interleaved Pole PFC. It also traditional analogue stages can permit can handle much PFC controller. to handle more higher power. power.

• There is no bridge rectifier; hence, the efficiency is increased by 2% at 115 VAC.

• High power density.

• Can have lower current ripple and RMS currents.

• Lower efficiency • Higher component • Higher cost than • Totem pole with • High EMI. • The implementation compared with count. classic boost PFC. GaN devices has requires solving • High efficiency only other topologies. higher efficiency some design • Higher cost than with WBG devices. than this topology challenges, for classic boost PFC. • High-cost topology instance: digital • It needs to use SiC due to the use of control loop diodes to reach WBG devices and (voltage and higher efficiencies. complex control. current loops), Disadvantages • It requires floating zero-crossing current sensing current which increases its spike/distortion, complexity.. and minimisation of dead time during the zero crossing point to improve the THD.

• It is easy to • CCM or CrCM can - • CCM or CrCM can • Traditionally, • The topology can implement peak be used in this be used in this implemented with operate in CCM or Control technique current/fixed-on topology. In CCM topology. digital control CrCM. CCM mode conduction losses requires bigger

time control in reduces to half (DSPs & and hall- input inductor. CrCM. when compared to effect sensors). [53] CrCM achieves CrCM. higher power • Complex control In • Can operate in density. CCM. CCM or CrCM.

• In CrCM there are no reverse recovery loss and is possible the use of Si instead of GaN/SiC MOSFETs without detriment to efficiency.

Notes:

1. Power losses in PFC converters: a) Bridge losses (i.e. Ploss = Vf.Irms), b) Input inductor losses (i.e. core losses and cooper losses), and c) Losses in switches (i.e. switching, conduction, and gate drive losses) [50].

2. Totem-pole topologies should use WBG MOSFETs so as to prevent losses due to high reverse recovery (Qrr) loss [50] [51].

3. Interleaving multiple phases allows to reduce the input current ripple [51].

4. The conventional totem pole topology uses "slow" diodes (D1 & D2) instead of MOSFETs (Q4 and Q3) [51] as it happens in the ZVS totem pole topology (see appendix A).

5. Multiple stages can be interleaved to increase power handling capability [51].

6. The power dissipation in the bridge rectifier can be in the order of 2% to 3% of the output power. Therefore, bridgeless PFC topologies are more efficient than PFC topologies with bridge rectifiers [54].

Ref. [33], also mentions potential candidates that are suitable for PHEV chargers for the Isolated DC-DC converter in Fig. 2.13. These are the following:

• Zero Voltage Switching Full-Bridge Phase Shifted Converter.

• Zero Voltage Switching Full Bridge Trailing-Edge PWM Converter.

• Zero Voltage Switching Full Bridge with Capacitive Output Filter Converter.

• Interleaved Zero Voltage Switching Full Bridge with Capacitive Output Filter Converter, Operating in Boundary Conduction Mode (BCM).

• Interleaved Zero Voltage Switching Full Bridge with Voltage Doubler Operating in Boundary Conduction Mode.

• Full-Bridge LLC Resonant DC-DC Converter.

Finally, bridgeless totem-pole converters and LLC resonant converters are considered as the preferred topologies for the input and output stages, respectively, of the two-stage on-board EV charger system of Fig. 2.13 [55].

2.1.3.2.4 Electric Vehicles On-Board Chargers Outlook.

Many countries will end the sales of internal combustion engine cars in the near future [56] in order to foster the transition from fossil-fuel transportation to electric transportation and reducing environmental pollution. Moreover, R&D in electric vehicular technology (EVT) is moving at great speed nowadays, so that promising EV’s capabilities are expected in a few years [57]. At the same time, lithium based battery technology, which is considered as the future’s battery technology for electrified vehicles due to its superior performance [58], is reaching significantly faster charging rates. Therefore, now more than ever, the construction of fast-charging networks is necessary to serve the proliferation of EVs [56], which is in turn, pushed by the continuing fall of battery prices. That being said, it is forecasted that EVs will dominate the automotive market in the near future, with the expectation that 50 % of all new cars sold around the world to be electric by 2033 [57].

EVs use an electric motor for propulsion, which is much more efficient and has lower mass than combustion engines. Consequently, EVs can transform the batteries’ electric energy into mechanical energy delivered to the wheels in a much more efficient way than internal-combustion-engine vehicles. However, EV’s batteries have energy densities that are much lower than liquid fuels [59], meaning that EVs use an energy source that can store a much smaller amount of energy in a specific weight or volume compared to traditional fuel-powered internal-combustion-engine vehicles. Consequently, despite the high efficiency of electric motors and the current development of battery capacities, the "driving range" of affordable EVs, or the "electric range" per se, is only about 100 to 200 miles range (161-322 km) nowadays. This situation has begun to change with the continuous improvements in battery technology, and currently, some luxury EVs exist like the Tesla Model X, which has a considerable electric range of 314 miles (523 km) [60].

This lack of significant electric range in EVs, has caused a phenomenon in potential buyers that is known as the "range anxiety", which can be defined as fear that the vehicle has not sufficient range to get to its destination [56]. In these days, range anxiety is one of the major impediments preventing the rapid penetration of EVs in the automotive market [61].

PHEVs, in contrast, are considered as powerful options in the automotive market. They combine the superior efficiency of electric motors with the long-distance range of ICEs [62], thus liberating drivers from the range anxiety by offering them a high total driving range. For instance, the current version (2020) of the PHEV Toyota Prius, offers a total driving range of 640 miles (1030 km) when fully charged and with a full tank of gas [63]. However, as indicated in [64], as range anxiety fades away, the EV/PHEV market shifts more and more toward EVs instead of PHEV.

Nowadays, to develop improvements in energy capacity, and some other aspects in batteries, such as power density, lifetime, cost, etc., the battery research community is focused on accomplishing government-incentive and/or industry-incentive programmes that look for improvements in battery performances. For instance, the Faraday Battery Challenge in the UK [65], the Energy Storage Grand Challenge in the US [66], and the European Battery Alliance in the EU [67], are some of them. These incentives have promoted important advances in battery technology and converters, and consequently, today there are converters in extreme fast charging (XFC) infrastructures that deal with power levels of 350 kW or higher, and also batteries that can handle such high power levels. An example of these technologies is indicated in [37], where XFC technology has been applied in the charging process of a Li- ion battery alongside a novel temperature modulation method, permitting in this way a charging time of 10 minutes for 200-mile range without deterioration of the battery life and safety.

The aforementioned, shows that range anxiety is a problem that starts to pass to a secondary plane and now the charging anxiety is in the spotlight of the EV manufacturers [36]. As its name says, the charging anxiety is created in a vehicle driver during an extended charging time, higher than 10 minutes, since most servicing stops for gasoline vehicles, normally takes 5 to 10 minutes, which includes the time that the gasoline dispenser takes to refill the fuel tank plus the time visiting the onsite store [68-70].

Fig. 2.14 [56], shows charging times for recent models of EVs with a driving range higher than 200 miles. Note in this figure, that just DC ultrafast charging systems, can compete with a fuel dispenser in terms of refuelling time (10 minutes or less).

Fig. 2.14 Driving ranges and charging times of recent EVs: (a) driving ranges, (b) charging time to add 200 miles to the vehicle’s driving range [56].

Yet, at such a high power level (350 kW), the currents in a 400 V automotive system can be very high (>400 A), so the heat that is generated in the power electronics subsystems, throughout the path between the charger plug and the battery, would also be very high. This condition, is unfavourable because it has a negative impact on component reliability, represents a consumer-safety concern [71] and also could result in a deterioration of the battery, which is the most expensive component of the EV powertrain [72].

The following solutions can be applied to handle the thermal exigencies caused by extreme fast charging [71]:

• Heat reduction through managing electrical resistance of key elements of the system (charging plug, busbars, cable, etc.).

• Thermal management through cooling techniques.

• Increasing the battery system voltage from 400 VDC to 800 VDC.

Heat reduction by managing electrical resistance of key elements, or/and by applying active or passive cooling methods have been conventional techniques used to overcome thermal challenges. Therefore, they may not provide high innovation, although, they should not be ignored in an investigation. On the other hand, increasing the battery system voltage of the EV to overcome heat problems due to extreme fast charging can be considered as a recent and interesting topic that may require considerable research effort to be understood in depth, and may provide the chance to produce interesting research outputs.

Porsche has recently used extreme fast charging in an 800 VDC electric drive train and has demonstrated that with the same wire size required to charge a 400 VDC battery system at 120 kW, is possible to charge a 800 VDC battery system at 350 kW [73]. Currently, Porsche is also producing the new Taycan model, which is the first all-electric car using an 800 V system in the world. This car was presented in the International Motor Show in Germany in 2019, and recently, not to be outdone, several manufacturers [74] have announced new EV models with 800 V systems available soon. All of these facts, can be seen as the evidence that the electric vehicular technology is pointing toward changing the 400 V system to an 800 V system, in these days.

However, increasing the EV’s battery system voltage from 400 V to 800 V to permit faster charging can be only reasonable if it can be identified an optimum way to deal with higher currents and higher voltages in the powertrain. In this regard, the attractive possibility of using WBG devices has been devised along with alternative topologies of DC-DC converters to achieve higher powers and higher voltages without compromising reliabilities and performances. On this subject, the following sections of this literature review carry out a study of WBG devices along with the revision of high-power high-voltage multilevel DC- DC converter topologies.

2.2 Wide-bandgap Power Devices

Wide-bandgap (WBG) semiconductor materials, commonly known as Silicon Carbide (SiC) and Gallium Nitride (GaN) [75], are superior to Silicon (Si) in many aspects. To illustrate this, Fig. 2.15 shows that SiC and GaN materials stand out in relevant properties such as band gap width, breakdown voltage, thermal conductivity, melting point, and saturation velocity. Consequently, these devices outperform in high

40 temperature applications, high voltage operation and high switching frequency at high power conditions [76].

Fig. 2.15 Summary of Si, SiC, and GaN relevant material properties [76].

Since at high voltages the vertical semiconductor structure of a SiC-based power transistor is more efficient and cheaper than the lateral semiconductor structure of a GaN-based power transistor, SiC- based power transistors are preferred for high voltage and high power applications while GaN based power transistors are preferred for low voltage applications [77]. Furthermore, SiC and GaN devices are smaller than Si devices and their conduction losses and switching losses are lower, therefore, these devices are also faster and more reliable than Si devices. This fact permits WBG devices to be applied in reduced volume/weight and highly efficiency power conversion applications [78]. Fig. 2.16 presents for example, with respect to an increasing breakdown voltage, how SiC and GaN devices exceed Si devices in terms of small size and low ON-resistance.

Fig. 2.16 Relative size and on-state resistance of WBG and Si devices [77-79].

On the other hand, SiC MOSFETs and Si IGBT usually participate in high power applications at high voltages, e.g. multi-kW / 1200 V applications. Even though SiC MOSFETs have lower conduction losses 41 and lower switching losses than Si IGBTs, the emerging market of SiC MOSFETs is still small; thus, in terms of costs, the Si IGBT, which has been in the market for more than 30 years, outperform the SiC MOSFET currently. However, the market for SiC MOSFETs is improving its acceptance due to a fall in costs, more device manufacturers and technology improvements [80].

GaN MOSFETs are used in low and mid-range voltage applications (below 1200 V). They have lower ON resistance than Si MOSFETs, which reduces their conduction losses and they also have lower parasitic capacitance, hence faster switching transitions [81] and consequently lower switching losses. Even compared with SiC, GaN devices can have up to three times lower switching losses for devices at 650 V voltage levels [82]. However, GaN thermal conductivity is low compared with the thermal conductivity of SiC devices, so they find hurdles in high power density applications [83]. Furthermore, these devices, as mentioned previously, possess a lateral structure, which for high voltage and high power applications is inconvenient due to higher costs.

GaN, SiC and Si devices can be compared by using figures of merit (FOMs) such as the Switching Losses Figure of Merit (SLFOM) and the Conduction Losses Figure of Merit (CLFOM). The lower the SLFOM and CLFOM the lower the device losses. Currently, there are many SiC and GaN devices on the market, with better SLFOM and CLFOM than Si devices counterparts. Table. 2.12 shows an example in this respect. As shown in this table, for a mid-range voltage of 650 V, GaN Systems devices possess the best figure of merit whereas Cree SiC devices stand out when the breakdown voltage is above 900 V [84].

Table 2.12 Parameters and Figure of Merit (FOM) for Si, SiC and GaN devices [84].

2.3 High-Power High-Voltage DC-DC Converters

To raise the power to higher levels in order to provide competitive charging times, the on-board charger that is connected to the HV DC bus (see Fig. 2.3) could operate at more than 400 V, meaning voltages as high as 800 V. However, note that semiconductors of conventional two-level converters can find it challenging to block reverse voltages at 800 V. Therefore, nowadays there exists many opportunities to apply multilevel DC-DC converters in AC-DC conversion applications such as on-board battery chargers. Next, a study of this sort of converters is undertaken.

2.3.1 Flying-Capacitor Multilevel DC-DC Converters

In high-voltage DC-DC converter topologies, semiconductor switching networks must be capable of sustaining high voltage stresses. For this reason, it is common that high-voltage topologies utilize several semiconductors in series connection to divide the entire voltage stress to each one of the switches as 42 shown in Fig. 2.17. However, this kind of connection requires attention during and after commutation. During commutation, all of these series-connected semiconductors have to switch at the same instant in order to prevent one of them receiving all of the reverse voltage [85]. Likewise, during steady state the series-connected switches can suffer an unequal voltage distribution due to the non-identical characteristics of each switch. To overcome these problems, static and dynamic equalization circuits may be necessary so that this voltage-sharing mechanism becomes feasible for semiconductor switches.

Fig. 2.17 Elementary commutation cell with (a) one switch and (b) with three switches connected in series [85].

Fig. 2.17(b) shows an elementary commutation cell with two groups of three series-connected switches that are synchronized and operating with complementary states. Vin is the input voltage and the current IL represents a mesh current flowing through the switching node C. There is a straightforward voltage stress reduction in all of the switches but there is also a higher dV/dt for each group of them because the dV/dt is the sum of each individual switch dV/dt . Hence, there is a considerable EMI increasing in this topology, which is a harmful condition for the environment and particularly for the converter control circuits [86].

Fig. 2.18 The multilevel commutation cell.

A multilevel version of the elementary commutation cell of Fig. 2.17 is presented in Fig. 2.18. The operation of this Multilevel Commutation Cell [85] can be generalized by increasing the number of switches to n as shown in Fig. 2.19. Note that there are floating capacitors that are connected to each pair of switches and n is the number of the nth switch pair, i.e. the number of the nth commutation cell

(CLn ). From now on, those capacitors are named as the Flying Capacitors.

Fig. 2.19 Generalization to n switches of a multilevel commutation cell [85].

In order to assure an equal voltage distribution for all of the blocked switches, each pair of switches have to operate synchronized to keep the voltage in the flying capacitors constant. The switches of groups A and B are connected in series and each pair of switches A1 – B1, A 2 – B2, A i – Bi… A n – Bn have to be synchronized and alternatively turned ON/OFF as shown in Fig. 2.19. This resembles the operation of an elementary commutation cell [85]. However, unlike the elementary commutation cell, in the case of the 44 multilevel commutation cell the voltage of the blocked switches depends on the voltages of the flying capacitors. For example, the blocked-switch voltage of the pair of switches i, depends on the floating voltages across the flying capacitors Ci and Ci-1.

Equations 2.6 and 2.7 provide the voltage of the flying capacitor Ci and the blocked switch voltage ( Voff ) of the ith commutation cell respectively. Equation 2.7 denotes that the switch voltage stresses are reduced in the multilevel commutation cell making this switching matrix suitable for high voltage converters.

(2.6) ⋅ = = 1, … ,

(2.7) =

Another important aspect about the multilevel commutation cell is that it activates/deactivates its switches at different times [85]. Consequently, its dV/dt is lower and there is also a better performance from a harmonic view point since there can be up to n+1 voltage levels delivered at the switching node C, thus, an optimized output voltage waveform [87] is obtained in this node. For example, if there are two commutation cells ( n = 2 ), i.e two switches between node C and ground as in Fig. 2.18, then it is possible to obtain up to three voltage levels at node C, i.e. 0, Vin / 2 or Vin , depending on whether 0, 1 or 2 switches, between node C and ground, are respectively activated [85].

However, there is a critical drawback [88] that compromises the reliability of the multilevel commutation cell. This condition occurs when the flying-capacitor voltage is unbalanced, which happens when the average current in this capacitor is not constantly zero during normal operation [85]. In order to avoid this situation, this average current, which can have up to three average states +I Ci , 0 or -ICi , has to be controlled in such a way that a zero average current is obtained constantly so as to maintain a stable average charge in the capacitors Ci and consequently a constant voltage as well. Some other aspects can also help with the stability of flying capacitor voltages. To name a few, [86] states that a perfect DC input current IDC contributes to the stability of the voltage distribution in the flying capacitors and [89] indicates that the load current harmonics have an important role in the stability of these voltages as well.

To reach a zero average current in the flying capacitors, the control signals must have the same duty cycle for each of its n commutation cells [86]. Additionally, each commutation cell should have a control signal with a phase-shift equal to [87] with respect to its successive commutation cell. These two = requirements are meet by the Phase-Shift PWM (PS-PWM) control signals, which are studied in the next section.

The PS-PWM control can be utilized as an open-loop control mechanism to have flying capacitors that naturally behave as constant voltage sources in open loop. However, this is true only for ideal conditions. In real situations, there can be several factors such as control signals delays, load disturbances, capacitor leakage currents and so forth that may affect the desired balancing action of an open-loop PS-PWM control scheme [14, 90, 91]. As a result, a closed-loop control strategy may be necessary for this sort of multilevel DC-DC converter. More details on this are mentioned in the following section. 45

2.3.2 The Three-Level Flying Capacitor Boost Converter

Fig. 2.20 shows a three-level boost version of the multilevel commutation cell studied in the previous section. This circuit is known as the three-level flying-capacitor boost converter (FCBC). This topology has three levels to provide lower voltage stress in devices, reasonable component count, reliability, easier control and high efficiency [92] so that it is attractive for applications where DC-DC converters with high power, high efficiency and high power density characteristics are required such as electric vehicles, uninterrupted power supplies, and renewable energy systems [93].

Fig. 2.20 The three-level flying capacitor boost DC-DC converter.

The conventional (two-level) boost converter is not suitable to operate at a gain ratio above 6:1 due to high losses in components and switches and due to high EMI as well. Additionally, transformer-based converters such as push-pull or flyback converters can provide high voltage ratios but they are bulky and have high voltage stress on switches. Furthermore, there are other boost converter variations such as the quadratic boost converter, boost converters with coupled inductors or cascading two boost converters, but these variations can have either, high voltage stress, degraded efficiency or complex control circuitry depending on the topology. The three-level FCBC resolves or diminish these issues because its input inductor needs lower ripple to operate and its simple circuit structure reduces the voltage stress. This converter is more efficient than the conventional boost converter and can work at a higher voltage ratio than that of the conventional one [93].

The three-level FCBC can use the PS-PWM open-loop control method to balance the voltage of its flying capacitor naturally. As shown in Fig. 2.21, the PS-PWM control consists of four control signals for controlling the four switches of the topology. This control method causes buck operation when the active state (ON) of switches S1 and S2 is linked to the duty ratio D and the active state of switches S3 and S4 is related to the complement of D, that is 1-D. Therefore, the control signals of S1 and S2 are the complement of S4 and S3 respectively so that the operation of both elementary cells S1-S4 , and S2-S3 , resembles synchronous rectification [14]. Additionally, in the case of a three-level topology, there must be a phase-shift angle ( Φ) that is equal to 360°/2 = 180° between the control signals of each successive elementary cell as Fig. 2.21 indicates. On the other hand, for boost operation, D is linked to the active states of S3 and S4 and 1-D to the active states of S1 and S2 . In this case, it is also necessary to consider that the phase-shift angle between control signals of consecutive elementary cells is equal to

180°. Finally, for boost operation, the voltage ratio equation is the same of a conventional boost converter, that is:

(2.8) 1 = ⋅ 1 −

Fig. 2.21 PS-PWM control signals for buck mode and boost mode [14].

As mentioned at the end of section 2.3.1, in real scenarios the charge balance of the flying capacitor of the multilevel commutation cell is not stable, so the voltage of this capacitor may decrease or increase constantly during PS-PWM open-loop control operation. Therefore, it is necessary to implement a control strategy to have a stable charge during normal operation of the three-level FCBC, i.e. a closed-loop control system based on the PS-PWM control signals for controlling the unbalancing charge of its flying capacitor.

Fig. 2.2 shows the waveforms of the PS-PWM control signals and the flying capacitor currents of the three-level FCBC at a condition with D < 0.5 and D > 0.5 .

Fig. 2.22 The flying-capacitor current of the three-level FCBC.

Fig. 2.22 shows that when D < 0.5 , the ON-time periods of S3 and S4 determine the charge balance of the flying capacitor, but when D > 0.5 , it is the OFF-time periods of S3 and S4 that do it. This means that the charge unbalance exists when at D < 0.5 , there are unequal ON-time periods of switches S3 and S4 and when at D > 0.5 , there are unequal OFF-time periods of the same switches. Hence, depending on the value of D, either the ON-time or OFF-time periods of S3 and S4 should be controlled to obtain a balanced charge in the flying capacitor according to what has been expressed so far. Then, an effective control strategy for the flying-capacitor voltage consists on controlling the duty cycle of S3 and S4 simultaneously so that the unbalancing charge that could be provoked by the ON/OFF-time periods of one transistor should be adjusted by the other transistor immediately.

Fig. 2.23 indicates the closed-loop control method proposed by [94], which follows the control principle that is mentioned above. This control strategy also controls the output voltage of the converter in order to monitor a sudden and unexpected change of the input voltage. The output voltage ( Vout ) is an input of the control system as well as the flying capacitor voltage ( vC = V out / 2). In the figure, the voltage balancing controller consists of a proportional controller and the voltage regulating controller of a PI controller.

Fig. 2.23 Flying capacitor voltage control method proposed by [94].

2.3.3 Conventional Switched Capacitor Converters

There are different types of Conventional Switched Capacitor Converters (SCC) [95, 96]. Since the interest is to study high-power high-voltage boost converters, then this section is focused on the double- boost type SCC, whose appearance is quite similar to that of the three-level flying-capacitor boost converter as shown in the figure below.

Fig. 2.24 Conventional switched capacitor converter (double boost type).

The double-boost type SCC lacks an input filter inductor so this converter only uses its flying capacitor to transfer energy from the source to the load. Consequently, it becomes one of the lightest and smallest DC-DC converter alternatives currently. However, the double-boost type SCC is only suitable for low power and very small output current applications [96] since it operates by charging and discharging its flying capacitor periodically so that it creates large capacitor inrush currents during each switching period. Then, due to the fact that losses in small parasitic resistances are proportional to the peak current squared [97], that high peak in the flying capacitor current affects the efficiency of the double-boost type SCC at high power conditions.

Furthermore, this topology does not have the possibility of controlling the voltage ratio over a desired range, being only able to offer a fixed voltage conversion ratio that is equal to two, which limits its application field [95]. However, there exists the possibility of obtaining output voltage regulation for the double-boost type SCC topology by using an input inductor. This double-boost type SCC with input inductor is the same topology of the three-level multilevel flying capacitor converter (Fig. 2.20). The SCC with input inductor can take advantage not only from the input inductor energy density but also from the flying capacitors energy density, which is larger than the input inductor energy density [98]. This is an advantage in comparison to the conventional boost converter, which only relies on an input inductor to transfer energy from the source to the load. Due to its higher energy density properties, the SCC with input inductor can use a smaller input inductor to transfer the same amount of energy at the same switching frequency and current ripple compared to the conventional boost converter [99]. As a result, this circuit is lighter; however, it needs the input inductor current to be in continuous conduction mode in order to maintain the functionality of output voltage regulation [95].

Finally, the double-boost type SCC can also remove its limitation of a fixed voltage ratio by connecting its flying capacitor in series with a small inductor, replacing in this way the lone flying capacitor with a series 49 resonant LC circuit. By doing so, a new topology is created that is known as the Resonant Switched Capacitor Converter (RSCC). However, it is necessary to apply the proper control signals to the switches of this topology to obtain the desired output voltage regulation. This and other details related to the RSCC boost converter are studied in the following section.

2.3.4 The Resonant Switched Capacitor Boost Converter

It is possible to take advantage of the resonance of an LC series tank to convert the double-boost type SCC (Fig. 2.24) into a high efficiency converter at high power conditions as the Resonant Switched Capacitor Converter (RSCC) that is shown in Fig. 2.25 below.

Fig. 2.25 The resonant switched capacitor (RSCC) boost converter.

Fig. 2.26 compares the flying capacitor currents of the SCC topology and the RSCC topology. This figure shows that the lack of ability of the double-boost type SCC topology to tackle high power conditions is due to the sort of current waveform of its flying capacitor, which is a pulsating current with a high peak. In contrast, in the case of the RSCC topology, the flying capacitor current is sinusoidal and smooth so that it is very different to the SCC topology case. Consequently, the switching devices of the RSCC topology do not have to deal with a high di/dt and a high peak current as happens in the SCC topology. That is the reason for higher electromagnetic interferences and more losses of the SCC topology and this is true even if the internal resistance of the circuit components is reduced [96]. Thus, the efficiency of the RSCC is higher at higher power conditions compared to the SCC [96].

Fig. 2.26 Flying capacitor currents of the RSCC topology and the SCC topology [96].

The RSCC can be controlled by applying a conventional control or by using a phase-shift control. In the case of the conventional control, the topology can have three possible types of operation according to its circuit structure: it can operate as a half-buck type RSCC ( Vo / Vin = 0.5), as a double-boost type RSCC

(Vo / Vin = 2), and as a voltage-inverting RSCC [96]. Fig. 2.27 presents the topologies of a half-buck type RSCC and a double-boost type RSCC. In this section, the double-boost type RSCC is studied, which is from now on named as the RSCC boost converter (Fig. 2.25).

Fig. 2.27 Half-buck type RSCC and double-boost type RSCC [96].

The conventional control, as shown in Fig. 2.28, consists of four similar control signals with 50% duty ratio and with a phase-shift angle T1 = 180 ° between the control signals for switches S1 and S4 , corresponding to the outer cell, and for switches S2 and S3 , corresponding to the inner elementary cell. The phase-shift control is similar to the conventional control, but with the difference that the complementary switches S1 and S2 have a phase-shift angle T1 with respect to their corresponding active switch, S4 and S3 respectively.

Fig. 2.28 Conventional and phase-shift control for the RSCC topology [100].

The conventional control method works at a switching frequency that is equal to the resonant frequency of the circuit’s LC tank whereas the phase – shift control works at higher frequency than the resonant one in order to cause an inductive behaviour in the converter so that the power flows from the source to the load. Additionally, due to its resonant behaviour, there is a sinusoidal circulating current through the

51 circuit and Zero-Current Switching (ZCS) or Zero-Voltage Switching (ZVS) can happen in all of the switching devices. ZCS happens with conventional control [101] and ZVS occurs with phase-shift control [102]. The conventional control provides fixed voltage ratio conversion (equal to two) and the phase-shift control variable voltage conversion ratio. Independently of the control method, the highest efficiency is obtained when the voltage conversion ratio is equal to two [102].

The switching frequency fsw can be calculated by using directly the resonant frequency between Lr and Cfc as long as Cfc is much lower than Cout . That is to say:

1 (2.9) = 2 ⋅

Chapter 3: Analysis of Three Level Capacitor Boost Converters

3.1 Introduction

The analysis of a power electronic converter serves to obtain a general or detailed understanding of the converter behaviour in order to provide to the designer the necessary information to meet required specifications and consequently to define an optimal design [103]. An essential first step in the analysis of power electronic converters is to verify the right behaviour of voltages and currents of the circuit at steady state conditions by comparing analytical calculations with open-loop, large-signal simulations (Fig. 3.1) [104]. This section presents analytical calculations and steady state simulations of two step-up non- isolated DC-DC converters that have been studied during the MPhil: the three level flying capacitor boost converter and the resonant switched capacitor boost converter. The analysis of these converters has been carried out with the parameters as indicated in tables 3.3 and 3.7. Additionally, another converter has been simulated (see Section 3.4) in order to study a method to reduce switching losses by using a lossless snubber as proposed in [105].

It is worth mentioning that a steady state analysis with idealized components and switching devices provides information with a suitable level of accuracy [104] so that it is not necessary, to study these topologies with non-ideal components. Moreover, the use of behavioural models for semiconductor switches and parasitic resistances, inductances and capacitances results in detailed simulations and higher order equations, which for steady state analysis of power electronic converters, may increase the efforts required and extend the design process unnecessarily. Conversely, the use of ideal switches and/or components to perform similar tasks is sufficient to derive, faster and more efficiently, piecewise analytical equations for these converters in steady state [106]. Therefore, the simulator can use simplified behavioural switches in order to represent on/off states instantaneously instead of using complex physical models to exhibit the transients of power semiconductors in commutation mode. According to the previously mentioned, PLECS, which is a simulation software with a power semiconductors library that is based on ideal switches 6 with instantaneous on/off states [107], should be a suitable tool to perform the simulations of sections 3.2 – 3.4.

For all of the simulation, the solver of PLECS has been configured with a very small time step (1 μs), considering that the converters exhibit different circuit states during one commutation period 7, each one with its own time constant. The time step of the solver has to be much smaller than these time constants in order to let the solver resolve each of the circuit states properly at each switching period. The time step should also be much smaller than the periodicity with which the commutation of the switches of the converter create new circuit states in order to obtain proper simulation results [104].

6 If necessary, PLECS permits some non-ideal characteristics to semiconductors such as the forward voltage or the on-state resistance [106]. 7 See the different circuit states of figures 3.4 and 3.7. 53

In section 3.5, the PLECS setup is more complex in order to consider the equivalent series resistances of components (inductors and capacitors) and also the energy consumed during switching transients of transistors so that obtaining efficiency data properly.

Finally, note that in the future, a hardware prototype should be implemented in a laboratory in order to crosscheck the analytical and simulation results that have been obtained in this work.

Fig. 3.1 Open-loop, large-signal simulation [104].

3.2 Analysis of the Three-Level Flying Capacitor Boost Converter

A Three-Level Flying-Capacitor Boost Converter (FCBC) with ideal components is shown in Fig. 3.2.

Fig. 3.2 Circuit of the three-level FCBC with same grounding.

Tables 3.1 and 3.2 show some equations [93, 108-110] that can be used to quantify the most relevant steady-state characteristics of this circuit under the defined parameters and specifications that are shown in Table 3.3. Fig. 3.3 indicates ideal waveforms at duty ratios ( D) lower than 0.5 and larger than 0.5. These ideal waveforms are obtained from an initial simulation of this topology.

The ideal waveforms of Fig. 3.3 are the voltages and currents of the four equivalent circuits (operating modes) that are formed during the converter’s operation as shown in Fig. 3.4. It is possible to analyse the operation of the three-level flying-capacitor boost converter by using the four equivalent circuits, which depends on the switching states of the topology, which in turn depend on the value of the duty ratio.

The simulation of this circuit considers an input inductor Lin with a high value of inductance (200 μH) in order to maintain the input current in continuous conduction mode (CCM) since that condition is necessary to have variable voltage conversion ratio ( Vo / Vin ) [95]. The chosen value for the flying capacitor is only two times lower than the output capacitor value 500 μF in order to increase the RC time constant of the circuit, which helps with maintaining a stable voltage Vo / 2 in the flying capacitor as expected in steady state. The switching frequency is equal to 19299.5 Hz in order to have the same frequency of the RSCC boost converter that is analysed in section 3.3. Since the ripple frequency of the input inductor current is twice the switching frequency (i.e. approx. 40 kHz) in this topology, it is possible to attenuate the AC component of the input inductor current with a small input capacitor of 10 μF. The rated output-power specification is 1.28 kW; then, in order to maintain the same power at output voltage

Vo = 134 V, the load has a value of 14 ohms.

Additionally, an extended run of open-loop simulations with ideal components, confirm that irrespective of maintaining a constant duty cycle during the simulations, the charge balance of the flying-capacitor is not stable but negative on average, so the voltage of this capacitor decreases constantly during the open- loop simulations. Eventually, this capacitor depletes its charge totally. Therefore, it is necessary to implement a control strategy to have a stable flying capacitor charge/discharge process during normal operation of the converter, meaning to implement a closed-loop control system for controlling the unbalanced charge of the flying-capacitor. By doing so, the expected constant voltage of the flying capacitor ( Vo / 2) is obtained in the simulations as required. The simulated closed-loop control system is based on an active balancing method that is detailed in [94]. As aforementioned, all of the simulations are carried out in PLECS.

The equations of tables 3.1 and 3.2 are evaluated for a variable duty ratio 0.1 ≤ D ≤ 0.9 and all of the calculated values along with their corresponding simulation results are tabulated in Table B.1 (Appendix B). Afterwards, all of these results are plotted as shown in the interpolated curves of Fig. 3.5 to demonstrate that in all of the cases the simulation of the ideal converter matches with the theoretical equations. This is the expected result of this analysis because it confirms that, according to the theory of the converter, the simulation has provided the expected behaviour of voltages and currents of the topology with the same components and specifications and different duty cycles as required. This confirms that the steady state simulation and the mathematical models of this converter are precise thus providing the first necessary step prior to analysing the problem of stabilizing this converter by using a suitable control system, or also to analyse the topology behaviour by using realistic component models with parasitic elements if necessary.

Table 3.1 Main equations of the three-level FCBC

Output Output Output Voltage Input Power Input Current Efficiency Current Power Eq. (3.1) Eq. (3.4) Eq. (3.5) Eq. (3.6) Eq. (3.2) Eq. (3.3)

= 1 = = = = → = = − 1 −

Table 3.2 Ripple equations.

Input Inductor Current Ripple Flying Capacitor Voltage Ripple Output Voltage Ripple Eq. (3.7) Eq. (3.8) Eq. (3.9)

⎧ − − for ≤ ≤ ⎧ for 0 ≤ ≤ 0.5 ⎪ 1 ∆ = ∆ = ∆ = . . ⎨ − for ≥ ⎨ 1 − ⎩ ⎪ for 0.5 ≤ ≤ 1 ⎩

Table 3.3 Three-level FCBC specifications and circuit parameters. a

Specifications Parameters Output Input Voltage Output Voltage Component Value Unit (Vin) Power (Po) (Vo)

Input inductor: 200 Flying capacitor: 500 Output capacitor: 2000 50 V 134 V 1.28 kW Input capacitor: 10 Load 14 Ω Switching frequency: 19299.5 Hz a The output voltage range of an AC level 2 on-board charger is in the range 170V ≤ Vo ≤ 440V [33], meaning a maximum voltage conversion ratio of 440V / 170V ≈ 2.6. A voltage conversion ratio of 134V / 50V ≈ 2.67, is slightly higher than the maximum voltage conversion ratio of an AC level 2 on-board charger.

Fig. 3.3 Ideal waveforms of the three-level FCBC for: (a) D ≥ 0.5, (b) D ≤ 0.5. 57

Fig. 3.4 Operating modes of the three-level FCBC. 58

Fig. 3.5 Comparison of theoretical and simulation results for the three-level FCBC. 59

3.3 Analysis of the Resonant Switched Capacitor Boost Converter

The objective of this analysis is the same as in the previous section. This is to validate theoretical and simulation results by comparing both of them. The work done by K. Sano et al [100, 111-114] has enabled a thorough understanding of the operation of the RSCC converter, which has been utilized in this work to derive the main mathematical expressions of currents and voltages of this converter under boost mode. This new contribution of equations starts by obtaining the equation of the resonant current of the inductor Lr, i.e. ir (t) . Subsequently, the following mathematical expressions are also obtained:

• Flying-capacitor voltage equation.

• Average output current equation.

• Average input current equation.

• Output power equation.

• Voltage ratio equation.

Additionally, aiming at generalizing the analysis of this converter, two additional normalized expressions are obtained:

• Normalized voltage ratio equation.

• Normalized ratio of peak inductor current to average output current equation.

These two last equations are utilized to obtain a suitable operating point for the RSCC topology for the specifications that have been mentioned in this work: Vo = 134 V, Vin = 50 V and Po = 1.28 kW. The mathematical process to obtain all of these equations is detailed next.

3.3.1 Mathematical Models of the Resonant Switched Capacitor Boost Converter

As studied in chapter 2 – section 2.3.4, the RSCC boost converter can use conventional control to obtain a fixed voltage ratio or PS-PWM control to have output voltage regulation. In this section, since the interest is to analyse the boost mode and to find relevant mathematical expressions for variable voltage ratio, then the RSCC boost converter with PS-PWM control is analysed.

The PS-PWM control signals can step up or step down the output voltage of the RSCC. The output voltage is stepped up when the control signals S1 and S2 lag by a phase-shift angle T1 that is between 0 to 180 degrees with respect to the control signals S4 and S3 respectively, as shown in Fig. 3.6. Moreover, all of these signals must have 50% duty ratio and the switching frequency has to be higher than the resonant frequency in order to provoke inductive behaviour in the resonant circuit [100] so that its current is lagged with respect to its voltage, which sets the power flow from the source to the load permanently. Fig. 3.7 presents the operating modes of the RSCC boost converter [100, 101].

If the flying capacitor of the RSCC boost converter is replaced by a constant Vo / 2 voltage source and well-chosen parameters are utilized, the converter creates the current and voltage waveforms that are shown in Fig. 3.8. The inductor current becomes linear (ideally) at each of the four time intervals ( 0 to T1,

T1 to T sw / 2, T sw / 2 to T sw / 2+T1, and T sw / 2 + T1 to T sw ) defined by the phase-shift angle T1 of the control signals. Fig. 3.8 indicates the slope of the currents as well.

This circuit with a “dummy” flying capacitor at constant Vo / 2 resembles the behaviour of the RSCC converter but without resonance, so that the current of this circuit is not sinusoidal. Notice in Fig. 3.8 that the inductor voltage waveform ( vr) changes but keep the same voltage levels at each time interval since they depend on the equivalent circuit of the moment.

When the constant Vo / 2 voltage source is replaced by a real flying capacitor, a resonant LC series circuit appears and the converter becomes the proper RSCC boost converter and its corresponding operating modes are maintained the same, i.e. they are also defined by T1 as shown in Fig. 3.8. However, now the current in the circuit presents resonance at the switching frequency and the inductor current is not linear but sinusoidal.

Fig. 3.6 RSCC boost converter: double-boost type circuit and control signals.

Fig. 3.7 Operating modes of the RSCC boost converter. 62

Fig. 3.8 Approximated waveforms of the RSCC boost converter when a constant Vo/2 voltage source substitutes the flying capacitor.

Fig. 3.9 Voltage waveform of the LC tank and second order circuits formed during the operation of the RSCC boost converter.

According to the aforementioned, the LC tank voltage vr should have a periodic piecewise equation defined by four time intervals as shown in (3.10) below; where, Vin is the input voltage, Vo the output voltage and Tsw the switching period.

0 ≤ < 1 ⎧ ⎪ 1 ≤ < (3.10) ⎪ 2 = ⎨ 0 ≤ < + 1 2 2 ⎪ − + 1 ≤ < ⎩ 2 Fig. 3.8. states that vr is in fact the piecewise voltage input of one general equivalent circuit that represents the four second-order equivalent circuits formed by Lr, and Cfc as shown in the same figure. Hence, solving this general equivalent circuit means finding the corresponding piecewise equations of the inductor current ir and the voltage of the flying capacitor vCfc . Subsequently, it is possible to obtain other equations of the circuit such as average values, peak values, and others. All of them derived from these two main equations, the inductor current and the flying-capacitor voltage equations.

Next, the mathematical process that is carried out to obtain ir and vCfc is explained. Firstly, it is necessary to convert the equation 3.10 into an expression that is a function of the voltage ratio M = Vo / Vin as shown below:

⋅ 0 ≤ ≤ 1 ⎧ ⎪ 1 ≤ ≤ (3.11) ⎪ 2 = ⎨ 0 ≤ ≤ + 1 2 2 ⎪ − 1 + 1 ≤ ≤ ⎩ 2 Then, it is necessary to solve the general equivalent circuit of Fig. 3.9 at each interval of the input vr by applying KVL (Eq. 3.12) to the circuit mesh and the definitions of voltages in inductors and capacitors as shown in equations 3.12, 3.13 and 3.14:

(3.12) = +

(3.13) = ⋅

(3.14) 1 = Therefore:

• For 0 ≤ t < T1:

1 = + = ⋅ ; = ⋅ ; = + 0 65

(3.15) 1 ∴ = + = ⋅ = ⋅ + + 0

Applying the Laplace transform ( ) to equation 3.15 give: ℒ

1 ℒ ⋅ = ℒ ⋅ + ℒ + 0

⋅ 0 = ⋅ − 0 + + ⋅

0 ⋅ ⋅ + ⋅ − 0 ∴ = ⋅ ⋅ + 1

0 ⋅ ⋅ + ⋅ − 0 0 ⋅ ⋅ + ⋅ − 0 0 ⋅ ⋅ + ⋅ − 0 = = = 1 1 + + + ⋅ ⋅ ⋅ ⋅ .

1 = ⋅

0 ⋅ ⋅ + ⋅ − 0 ∴ = ⋅ +

(3.16) ⋅ − 0 ⋅ 0 ⟹ = + ⋅ + +

And applying the inverse Laplace transform ( ) to equation 3.16 give: ℒ

ℒ = = ⋅ − 0 ⋅ sin + 0.cos

But at resonance: 1 1 = ⟹ =

(3.17) ⋅ − 0 ∴ = .sin + 0.cos

The same mathematical procedure that is used to find (3.17) serves to find the flying capacitor voltage, therefore:

1 (3.18) ⇒ = + 0 = 0 ⋅ ⋅ ⋅ sin − ⋅ − 0 ⋅ cos + ⋅

• For T1 ≤ t < Tsw / 2:

Again, and vr can be represented as a piecewise function = + = ⋅ + + 0 in the following manner:

= ⋅ ⋅ − − 1 + ⋅ − 1 − − + ⋅ − 1 (3.19) 2 ⋅ − − 1 − − 2

Applying the Laplace transform to (3.19) we have:

. . . 1 ℒ = = ⋅ . − + ⋅ − + ⋅ − 1 (3.20) . . ⋅ −

Equation (3.20) is the input of the general equivalent circuit of Fig. 3.9 during the interval T1 ≤ t < T sw / 2.

Therefore, Vr(s) = V Lr (s) + V Cfc (s) is equal to:

⋅ ⋅ ⋅ ⋅ ⋅ 1 ⋅ ⋅ − + ⋅ − + ⋅ − 1. − (3.21)

0 = ⋅ − 0 + + ⋅ By applying the inverse Laplace transform to equation (3.21), the inductor current ir (t) is derived as a function of step functions U. Then, the step functions U(t-Tsw / 2) , U[t-(T sw / 2+T1)] and U(t-Tsw ) are equal to zero for the interval T1 ≤ t < T sw / 2 and only U(t) and U(t-T1) exist. Consequently, ir (t) is equal to:

⋅ ⋅ ⋅ ⋅ 0 0 = − − + + (3.22) 2 2 2 2 2 ⋅ ⋅ ⋅ ⋅ 0 0 + − + − + 2 2 2 2 2 and based on the following identities,

(3.23) + cos = 2

(3.24) − sin = 2 it is possible to express the equation (3.22) as the following equation:

⋅ ⋅ sin 1 + 0 ⋅ ⋅ − ⋅ sin 1 ⇒ = ⋅ cos (3.25) ⋅

⋅ ⋅ cos 1 − 1 + 0 − ⋅ cos 1 − ⋅ sin ⋅ Now, in order to find the flying capacitor voltage, it is necessary to consider that the flying capacitor current is the same as the inductor current ir (t) due to the series connection, therefore:

(3.26) = ⋅ = ⋅ = ⋅ = ⋅ Then by applying Laplace to , the following equation is obtained: = +

⋅ ⋅ ⋅ 1 = ⋅ ⋅ − + ⋅ − + ⋅ − 1 (3.27) ⋅ ⋅ ⋅ − −

⋅ − ⋅ 0 − 0 ⋅ ⋅ And again, by applying the inverse Laplace transform and by considering that for the interval T1 ≤ t <

Tsw /2 the step functions U(t-Tsw / 2) , U[t-(T sw / 2+T1)] and U(t-Tsw ) are equal to zero and only U(t) and U(t- T1) exist, equation (3.27) turns into:

(3.28) ⇒ = ⋅ ⋅ cos 1 − 1 + 0 − ⋅ cos 1 ⋅ cos + ⋅ ⋅ sin 1 + 0 ⋅ ⋅ − ⋅ sin 1 ⋅ sin +

• For T sw / 2 ≤ t < Tsw / 2 + T1:

According to Fig. 3.8, ir (t) has half-wave symmetry, which means that − | =

. Therefore, by using this information it is possible to derive the following equation for ir: −

(3.29) − ⋅ − 0 ⇒ = ⋅ sin ⋅ − − 0 ⋅ cos ⋅ − ⋅ 2 2 The same reasoning is utilized to find the flying-capacitor voltage equation for this time interval. However, the flying-capacitor voltage waveform is not centred with zero as happens with the inductor current waveform so it is necessary to add an offset that is equal to M.V in to find the right expression. Therefore:

(3.30) − + ⋅ = − 2

∴ = −0 ⋅ ⋅ ⋅ sin ⋅ − + ⋅ − 0 (3.31) 2

⋅ cos ⋅ − 2

• For T sw / 2 + T1 ≤ t < Tsw :

By using the half-wave symmetry of ir (t), that is to say , the − | = − following expression is obtained:

− ⋅ ⋅ sin 1 + 0 ⋅ ⋅ − ⋅ sin 1 ⇒ = ⋅ cos ⋅ − . 2 (3.32) ⋅ ⋅ cos 1 − 1 + 0 − ⋅ cos 1 + ⋅

⋅ sin ⋅ − 2 During this last interval, it is possible to express as the following expression:

= ⋅ ⋅ − − 1 + ⋅ − 1 − − + ⋅ − 1 (3.33) 2 ⋅ − − 1 − − 2 By using the expression above as the voltage input of the general equivalent circuit of Fig. 3.9, it is possible to determine the flying-capacitor voltage equation for this interval as shown in equation (3.34) below. Note that all of the step functions of expression (3.33) are equal to 1, with the exception of U(t-

Tsw ), which is equal to 0 because the analysed time interval excludes the point Tsw . Hence, the inverse

Laplace transform of VCfc (s) gives the following expression for this interval:

⋅ ⋅ ⋅ ⋅ = − + 2 2 2

⋅ ⋅ ⋅ 0 0 ⋅ + − + − − 2 2 2 2 2 (3.34) ⋅ ⋅ ⋅ ⋅ + − + 2 2 2

⋅ ⋅ ⋅ 0 0 ⋅ + − + + − + 2 2 2 2 2 ⋅ − 1 and this equation can be expressed in the following manner:

= − ⋅ ⋅ cos ⋅ + 1 − cos ⋅ 1 + 1 − 0 − 2 ⋅ ⋅ cos ⋅ + 1 + cos − cos ⋅ 1 ⋅ cos 2 2 (3.35) − ⋅ ⋅ sin ⋅ + 1 − sin ⋅ 1 − 0 ⋅ ⋅ 2 ⋅ − . sin ⋅ + 1 + sin − sin ⋅ 1 ⋅ sin 2 2 + − 1 In order to determine the initial conditions ir (0) and vCfc (0) , it is necessary to use the symmetry of the inductor current and flying-capacitor voltage waveforms, which means to recognize two expressions, which are: and . Then, after applying exhaustive algebra − = 0 = ⋅ − 0 and simplification of trigonometric expressions to these two expressions, it is possible to derive the initial conditions ir (0) and vCfc (0) equations, which are indicated below:

(3.36) ⋅ 0 = − − 1 sin ⋅ 1 − sin ⋅ − + tan 2. ⋅ 2 4

⎡ cos ⋅ 1 + cos ⋅ − 1 ⎤ (3.37) − ⎢ ⎛ 2 ⎞ ⎥ 0 = − 1 − 2 − 1 ⎢ ⎜ ⎟ ⎥ 2 cos ⋅ + 1 ⎢ 2 ⎥ ⎣ ⎝ ⎠ ⎦ Moreover, due to the fact that no losses are considered, the output power is calculated by using the expression Po = V out .I out = V in .I in where Iin and Iout are average values defined by the waveforms of these currents (see Fig. 3.8). Thus, Iin , Iout and Po can be found in the following manner:

1 = − + (3.38) ⋅ cos − cos ⋅1 − cos ⋅2 + 1 − 2 = ⋅ ⋅ ⋅ 1 + cos 2

⋅ (3.39) cos − cos ⋅1− cos ⋅ 2+ 1 2 − ⋅ 2 = = ⋅ ⋅ ⋅ 1 + cos 2

⋅ (3.40) cos − cos ⋅1− cos ⋅2+ 1 − ⋅ 2 = ⋅ = ⋅ ⋅ ⋅ 1 + cos 2 where T2 = T sw / 2 - T1 .

Additionally, given that the average output current is equal to Vout over the load resistance R, then the voltage ratio M = I in / I out = V out / V in , becomes an equation that depends on the value of R as shown below:

⋅ (3.41) cos − cos ⋅1 − cos ⋅2 + 1 − 2 = ⋅ cos + 1 2 where, is the characteristic impedance of the circuit. =

In addition, two normalized equations are derived here as well. They correspond to the normalized expressions of the voltage ratio and of the ratio of the peak inductor current to the average output current. Finally, Table 3.4 presents all of the identified equations of the RSCC boost converter in this work.

Table 3.4 RSCC boost converter equations.

Inductor current

Eq. (3.17) ⋅ − = .sinsinsin + .coscoscos for ≤ ≤

Eq. (3.25) ⋅ ⋅ sinsinsin + ⋅ ⋅ − ⋅ sinsinsin ⋅ ⋅ coscoscos − + − ⋅ coscoscos = ⋅ coscoscos − ⋅ sinsinsin for ≤ ≤ ⋅ ⋅

Eq. (3.29) − ⋅ − = ⋅ sinsinsin ⋅ − − ⋅ coscoscos ⋅ − for ≤ ≤ + ⋅

Eq. (3.32) − ⋅ ⋅ sinsinsin + ⋅ ⋅ − ⋅ sinsinsin ⋅ ⋅ coscoscos − + − ⋅ coscoscos = ⋅ coscoscos ⋅ − + ⋅ sinsinsin ⋅ − for + ≤ ≤ . ⋅ Flying Capacitor Voltage

Eq. (3.18) = + = ⋅ ⋅ ⋅ sinsinsin − ⋅ − ⋅ coscoscos + ⋅ for ≤ ≤

Eq. (3.28) = ⋅ ⋅ coscoscos − + − ⋅ coscoscos ⋅ coscoscos + ⋅ ⋅ sinsinsin + ⋅ ⋅ − ⋅ sinsinsin ⋅ sinsinsin + for ≤ ≤

Eq. (3.31) = − ⋅ ⋅ ⋅ sinsinsin ⋅ − + ⋅ − ⋅ coscoscos ⋅ − for ≤ ≤ +

⋅ = − ⋅ ⋅ coscoscos ⋅ + − coscoscos ⋅ + − − ⋅ coscoscos ⋅ + + coscoscos − coscoscos ⋅ ⋅ coscoscos Eq. (3.35) ⋅ − ⋅ ⋅ sinsinsinsin ⋅ + −sinsinsin ⋅ − ⋅ ⋅ − . sinsinsinsin ⋅ + +sinsinsin −sinsinsin ⋅ ⋅sinsinsin

+ − for + ≤ ≤ Initial Conditions

Eq. (3.36) ⋅ = − − sinsinsin ⋅ − sinsinsin ⋅ − + tantantan . ⋅

⎡ coscoscos ⋅ + coscoscos ⋅ − ⎤ Eq. (3.37) − ⎢ ⎛ ⎞ ⎥ = − − − ⎢ ⎜ ⎟ ⎥ cos ⋅ + ⎢ coscos ⎥ ⎣ ⎝ ⎠ ⎦ Average Output Current

⋅ − ⋅ − ⋅ + Eq. (3.38) − = − + = ⋅ ⋅ ⋅ + Average Input Current

⋅ − ⋅ − ⋅ + Eq. (3.39) − ⋅ = = ⋅ ⋅ ⋅ +

Output Power

⋅ − ⋅ − ⋅ + Eq. (3.40) − ⋅ = ⋅ = ⋅ ⋅ ⋅ + Voltage Ratio

⋅ − ⋅ − ⋅ + Eq. (3.41) − = ⋅ ⋅ ⋅ + Normalized Voltage Ratio

cos − cos ⋅ + cos − sin ⋅ .sin + Eq. (3.42) coscos coscos coscos sinsin sinsin = − ⋅ cos + coscos

Table 3.4 RSCC boost converter equations (continuation).

Ratio of Peak Inductor Current to Average Output Current

Eq. (3.43) − ⋅ ⋅ ⋅ − − ⋅ . + + − = ≤ ≤ ↔ ∀ ≤ ≤ , ∄ = − . + − ⋅ . + ⋅

− − ⋅ − ⋅ ⋅ − + ⋅ ⋅ + Eq. (3.44) = > ↔ ∀ ≤ ≤ , ∄ = − + − . + ⋅ ⋅ ⋅

. = − +

⋅ ⋅ . + ⋅ ⋅ − ⋅ ⋅ ⋅ ⋅ − ⋅ ⋅ ⋅ − + − ⋅ ⋅ ⋅ ⋅ Eq. (3.45) ⋅ ⋅ ≥ − ⋅ − ⋅ +

↔ ∀ ≤ ≤ , ∃! = Where:

Eq. (3.46) − ⋅ . ⋅ + ⋅ ⋅ − ⋅ ⋅ ⋅ ⋅ ⋅ − + − ⋅ ⋅ = ⋅ − ⋅ ≥ , ∀ ≤ ≤ ⋅ ⋅

− . . . − + − . . Eq. (3.47) . . . + . . − . . = ≥ , ∀ ≤ ≤

Where if tpeak becomes a negative number, named tpeak(-), then the actual value of tpeak is:

Eq. (3.48) = − 75

Next, time-domain waveforms of the inductor current are obtained through equations 3.17–3.32, and compared with simulations parameters: Lr = 2.52 μH, C fc = 9.4 μF, f sw ≈ 88.53kHz, R = 14 Ω, V in = 300V . The results are shown in Figs 3.10, 3.11 and 3.12.

Waveforms found analytically Simulated waveforms

Fig. 3.10 Inductor current at T1 = 58.32°

Eq. 3.25 Eq. 3.29

Eq. 3.32 Eq. 3.17

Fig. 3.11 Inductor current at T1 = 65°

Fig. 3.12 Inductor current at T1 = 80°

3.3.2 Performance Analysis of the RSCC Boost Converter

In this section, the validation of the RSCC boost converter is carried out by comparing simulation results with analytical (theoretical) results that are obtained by using equations 3.42 – 3.45. Afterwards, these theoretical results are tabulated along with a set of simulation results coming from a control-variable sweep from 1 to 90 degrees while maintaining a constant switching frequency and input voltage in the RSCC boost converter so that a comparison can be performed. Note that a quick look of the terms of the equation 3.42, shows that the voltage ratio depends on all of the circuit components and parameters such as the angular switching frequency ( ωsw ), the phase-shift angle ( T1 ), the load resistance ( R), the flying capacitor ( Cfc ) and the inductor ( Lr). Therefore, before starting any comparison between simulation and theoretical results, a path to find the best parameters and component values of the RSCC boost converter, i.e. the best operating point of the converter when it operates at the required specifications and voltage ratio is necessary. This path can be provided by an evaluation of the ratio of the Peak Inductor

Current to Average Output Current (equations 3.43 – 3.45) at different values of ωsw by keeping constant the parameters R, Lr and Cfc but the parameter T1 is allowed to be the only one control variable to keep the voltage ratio M unaffected. By doing so, it is possible to find the best values of ωsw , T1 , Lr and Cfc , from a point of view that considers the lowest peak current in the switching devices as the best converter’s operating point at M = 2.67, which is the same rated voltage ratio of the three-level FCBC topology studied in section 3.2.

Intentionally, the flying capacitor ( Cfc = 9.4 μF) has a much smaller value than the output capacitor ( Cout = 2000 μF) in order to consider that the resonant frequency of this converter exclusively depends on the components Cfc and Lr, but not Cout [96]. Since Cfc is assumed, then the inductor Lr becomes the optimized parameter of equations 3.43 – 3.45 that allow for obtaining the lowest ratio of inductor peak current to output current which, as mentioned previously, has been the specific criteria to identify the best operating point of this topology. Additionally, an input capacitor with high capacitance, Cin = 2000 μF is connected in parallel with the converter's input voltage. This capacitor has shown to slightly smooth the input and output currents of the converter but its overall influence is almost imperceptible in the circuit.

The behaviour of the inductor peak current with respect to the variation of the switching frequency at fixed control variable T1 (at 90 degrees) is shown in Fig. 3.13, where Zr is the characteristic impedance of the circuit and R the load. The ratio R/Zr appears as a factor in Eq. 3.42 so is necessary to evaluate what is the incidence of this factor on M = 2.67 as shown in Fig. 3.13 to start the analysis to find a suitable operating point. Notice that T1 has been fixed at 90 degrees because at this value the maximum voltage ratio under any condition is obtained, which should be at least equal to M = 2.67.

ir peak ir/ Iout peak

Fig. 3.13 Locus of a constant voltage ratio M = 2.67 at T1 = 90° and different values of R/Z r.

Fig. 3.13 shows the locus of M = 2.67 that is formed with fixed T1 = 90° and variable switching frequency and this locus states that the higher the ωsw /ωr and R/Zr , the higher the inductor peak current at M=2.67. Therefore, Fig. 3.13 makes it possible to infer that when the switching frequency is relatively low the converter works in an R/Zr region where the inductor peak current becomes lower. Hence, in order to find a proper value of Lr, that minimizes the inductor peak current at M = 2.67 and also the specific values of switching frequency and control variable that do the same (i.e. to find the best operating point), a low range of R/Zr is chosen, meaning an assumed range of 2 ≤ R/Z r ≤ 24. Then, the peak inductor current for the range 2 < R/Z r < 24 and M ≈ 2.67 is determined at different values of switching frequencies but maintaining the load and the flying capacitor values constant as shown in Table 3.5. The phase shift angles T1 that are showed in this table are the values to maintain the voltage ratio at its rated value of

2.67 when the switching frequency changes and the ratio R/Z r as well. Remember that Cfc is assumed to be constant and the load R as well.

According to Table 3.5, the lowest ratio of peak inductor current to average output current is at fsw =

8722.7 Hz, T1 = 53.28°, Lr = 51 μH and Cfc = 9.4 μF. However, this operating point is not appropriate since the inductor size is bigger and the voltage ratio becomes too sensitive to the control variable when the switching frequency is closer to the resonant frequency. So a more suitable and low peak inductor current to average output current ratio is given at R/Z r = 12, fsw = 20321.2 Hz and T1 = 48.19°, Lr = 12.79

μH and Cfc = 9.4 μF as can be seen in the same table. However, a fine tuning around R/Z r = 12 is done later and is found that at R/Z r = 11.4 the ratio of peak inductor current over the average output current is lower. So at the end, the operating point is chosen at R/Z r = 11.4, fsw = 19299.5 Hz, T1 = 52.03°, Lr =

14.18 μH and Cfc = 9.4 μF, as shown in Table 3.6.

Table 3.5 Operating points for M = 2.67 .

Table 3.6 Best operating point for M = 2.67 from the point of view of the lowest ratio of peak inductor current to average output current.

Fig. 3.14 presents plots corresponding to the evaluation of equations 3.42 – 3.45 at the identified best operating point but also at different switching frequencies around it. Notice that the lowest peak inductor current when the control variable is changed is effectively at the values that have been calculated here. Now, it is possible to perform the comparison of simulation results and theoretical results of this converter with the circuit parameters of Table 3.6.

Table B.2 (Appendix B) shows the values of theoretical and simulation results when the control variable T1 of the converter is modified but all of the other parameters are constant. Fig. 3.15 compares these results. Note that at T1 = 10° (see Fig. 3.14), with the chosen switching frequency and parameters the voltage ratio is not higher than one. Therefore, the comparison is performed in a range of T1 from 20° to 90°. It is not necessary to make the comparison up to 180° because the voltage ratio is symmetric with respect to T1 = 90°. On the other hand, simulations show that the LC tank of the RSCC boost converter almost reaches resonance at T1 = 40°. Under this condition, the peak current required by the LC tank is very high. Due to the Kirchhoff Current Law, the converter's input current becomes very high as well. Then, the law of conservation of energy (Pin = Pout), establishes a low value for the converter's output current. Due to these facts, as indicated in Fig. 3.15, there is a discontinuity at T1 = 40° in the plots of the (average) input and output currents of this converter.

Notice in Fig. 3.15, that the theoretical results match the simulation results; consequently, it is possible to say that the identified mathematical models are valid along with the simulation work.

Best operating point at M = 2.67

Fig. 3.14 Best operating point at fsw = 1.4.(f r) = 19299.5 Hz, T1 = 52.03° . 81

Fig. 3.15 Comparison of theoretical and simulation results for the RSCC boost converter. 8 9

3.4 Analysis of the Asymmetric Three-Level Flying Capacitor Boost Converter

The circuit of the asymmetric converter, as proposed in [105] (Fig. 3.16), is similar to the three-level flying-capacitor boost converter. The aim of this converter is to reduce the drain-to-source voltage (VDS ) of its inner commutation cell by reducing the voltage of the flying capacitor. By doing so, the inner commutation cell can use switching devices with lower voltage ratings, which are smaller, cheaper and more efficient as well. Since the outer commutation cell switches operate at higher voltages, the work done in [105] also states a novel soft-switching auxiliary circuit (snubber) for the outer commutation cell,

8 Theoretical results based on equations: 3.38, 3.39, 3.40, 3.42, 3.43, 3.44 and 3.45. 9 Simulated results based on PLECS simulations. 82 which is blue coloured in Fig. 3.16. However, a soft-switching method for the switches of the inner cell is not proposed. Additionally, S1 and S4 are MOSFETs under synchronous rectification operation. S1 is a MOSFET not a diode in order to have lower ON resistance.

Fig. 3.16 The Asymmetric Three-Level FCBC Boost Converter with auxiliary circuit (snubber) to obtain soft switching in switches S1 and S4.

For the asymmetric three-level flying capacitor converter the duty ratio of the switches S3 and S4 is not a common duty ratio D, but instead this converter uses two different duty ratios, D1 and D2 . D1 is the duty ratio of S4 and D2 the duty ratio for S3 . As mentioned earlier, this circuit resembles the three-level FCBC topology, hence ( ) and ( ). 1 = 4 1 = 3 A difference between D1 and D2 causes a variation in the flying capacitor current, as shown in Fig. 3.17, which also shows the inductor instantaneous voltages according to the corresponding equivalent circuits that are formed (see Fig. 3.4). The charging and discharging time intervals of the flying capacitor are smaller or larger respectively. This fact leads to a constant reduction of the flying capacitor voltage caused by a negative average current in the capacitor at every switching period. Therefore, this converter requires a control method to maintain a stable flying capacitor voltage when D1 ≠ D2 . However, such a control method seems to be ambiguous because either D1 or D2 cannot be changed in order to establish asymmetric operation in the converter.

Since the circuit structure and operation details of the asymmetric converter is quite similar to those of the three-level FCBC, the analysis of the asymmetric converter is only focused on evaluating the operation of the soft-switching auxiliary circuit proposed by [105]. The soft-switching action is obtained due to a sequence of stages that happens in the auxiliary circuit, which acts like a mechanism that uses a small snubber inductor and small capacitors to provoke resonance in the current of the outer-cell switches in order to create conditions of ZCS or ZVS on them.

The simulated waveforms 10 of Fig. 3.18 are obtained from a symmetric converter (D1 = D2 = 0.291) with snubber circuit that operates at 1.36 kW, Vo = 330 V, Vin = 234 V and fsw = 30 kHz, which is similar to the

10 Simulations based on PLECS. 83 experimental prototype designed and implemented in [105]. Finally, a more detailed explanation, based on the information provided by [105] can be found in Table 3.7 as well.

Fig. 3.17 Flying capacitor voltage reduction due to the asymmetric control signals.

Fig. 3.18 Soft-switching simulated waveforms of the converter proposed in [105].

Fig. 3.18 Soft-switching simulated waveforms of the converter proposed in [105] (continuation ).

Table 3.7 Analysis of the operation of the lossless snubber proposed in [105].

Table 3.7 Analysis of the operation of the lossless snubber proposed in [105] (continuation ).

3.5 Efficiency of the Three-Level Flying Capacitor Boost Converter and the Resonant Switched Capacitor Boost Converter

Until now in this thesis, the analysis of the Three-Level FCBC and the RSCC boost converters has considered the use of ideal components, to obtain, by using analytical calculations and simulations, the steady-state behaviour of electrical variables, such as voltages and currents of these converters. The simulations and analytical results have matched when compared, therefore, it can be said that these converters have been analysed properly.

With ideal components, these converters have 100% efficiencies, which is unrealistic in practical scenarios. In order to obtain the actual efficiency, it is mandatory to consider all of the dissipative parasitic elements of the circuit components, as well as the voltages and currents commutation transients of semiconductor switches (MOSFETs) and magnetic losses; consequently, ideal components cannot be used anymore in the simulations or analytical calculations.

For real power MOSFETs, the voltage and current do not change instantaneously during the commutation period. Thus, there is a product voltage*current at each switching event, meaning that the power is not zero during these transients. This power is the switching loss of the MOSFET. In addition, at steady state, the current at the junction resistance of the MOSFET causes power dissipation due to the product I 2*R. This dissipated power is known as the conduction losses. Therefore, the total dissipated power of the MOSFET is equal to the switching losses plus the conduction losses. Likewise, the total dissipated power of the converter (neglecting magnetic losses and gate drive losses) is the sum of the losses of semiconductor switches (MOSFETs) plus the dissipated power of all of the parasitic resistances in passive components of the converter.

On the other hand, the energy loss increases the MOSFET temperature, and several parameters of this kind of device depend on the operating junction temperature. An uncontrollable increment of this temperature is also a catastrophic condition. Therefore, the procedure to obtain the converter’s efficiency properly, by using an analytical or simulation method, cannot ignore the MOSFET junction temperature, i.e. this temperature must be maintained below its maximum permissible value. Therefore, the design of a heatsink to remove heat from the semiconductor junctions is mandatory in the efficiency analysis, in order to maintain steady-state junction temperatures at a known and safe value during efficiency calculation or simulation.

The simulations have ignored magnetic losses due to eddy currents and hysteresis and consider an input voltage Vin = 50 V with the intention that actual-rating-SiC MOSFETs can be employed in the efficiency simulations for a complete range of voltage conversion ratio. Passive components with parasitic elements connected in series, such as the equivalent series resistances (ESR), are used as well. However, since the switching frequency is relatively low for both converters ( fsw ≈ 19.3 kHz), the influence of other capacitive and inductive parasitic components in theory is low [115, 116]; thus, they have been neglected.

Since Chapter 3 of this thesis has validated the certainty of simulation and analytical results with ideal devices, then the efficiency analysis performed in this section does not carry out analytical calculations of efficiency to contrast them with simulation results. Instead of that, it has been assumed that the obtained

90 efficiency results should be valid providing that the parameters of all of the components of the circuits (ESR, etc) have been set properly.

As aforementioned, PLECS operates with ideal semiconductor switches, so, instead of using current and voltage transients to obtain switching losses, it records the operating conditions of the switches (forward current, blocking voltage, and junction temperature) before and after each switching event [117]. Then, it contrasts this information with data provided by the semiconductor datasheet and in this way deduces the energy involved in the semiconductor switch commutation. For instance, Fig. 3.19 shows regions of energies dissipated by a semiconductor switch (MOSFET, IGBT, etc.), that are defined by voltages, currents and temperatures of the semiconductor. This information is used by PLECS to estimate consumption of energy in the semiconductor. It is worth mentioning, that PLECS can interpolate these data regions if necessary.

Additionally, to determine the on-state losses (conduction losses), during the simulation PLECS records the operating device current and temperature and compares these values with information taken from the semiconductor datasheet. By doing so, it finds the on-state voltage of the semiconductor and right after, it uses this information to determine the conduction losses [107] (see Fig. 3.20).

Fig. 3.19 PLECS thermal description for switching losses [117].

Fig. 3.20 PLECS thermal description for conduction losses [107].

Analytically, the losses in a MOSFET can be determined with the following equations [118], which PLECS may use to perform its own calculations.

• MOSFET conduction losses ( PCM )

(3.49) = .

• Body diode conduction losses ( PCD )

(3.50) = . + .

• MOSFET switching losses ( PswM )

(3.51) = + .

• Body diode conduction losses ( PswD )

(3.52) = + . ≈ .

Where:

RDSon is the drain-source on-state resistance, IDRMS the RMS on-state drain current, vD0 the body diode on-state zero-current voltage, IFav the average body-diode current, RD the body-diode on-state resistance,

IFRMS the RMS body-diode current, EonM the MOSFET turn-on transient energy, EoffM the MOSFET turn-off transient energy, fs the switching frequency, EoffD the body-diode turn-off transient energy (which are normally neglected), and EonD the body-diode turn-on transient energy.

In this section, two analyses to determine the efficiency of two boost converters are performed: the Three- Level FCBC converter and the RSCC converter. Both analyses use the specifications and parameters as indicated in the following tables.

Table 3.8 Three-Level FCBC specifications and circuit parameters for efficiency analysis.

Specifications Parameters Voltage Output Output Power Component Value Unit (Vin) Voltage (Vo) (Po)

Input inductor: 200 Input inductor DCR : Lin ESR 1 Min. 62.5 V, Min. 279 W 50 V Flying capacitor: 500 Max. 250 V Max. 4.46 kW Flying Capacitor ESR 11 : ESR 3.2 Output capacitor: 2000

11 Film capacitors can have ESR values as low as 3.2 mΩ. 92

Output Capacitor ESR: ESR 3.2 Input capacitor: 10 Input Capacitor ESR: ESR 3.2 Input resistance 12 : 1 Load: RLOAD 14 Ω Switching frequency: 19299.6 Hz

Table 3.9 RSCC Boost Converter specifications and circuit parameters for efficiency analysis.

Specifications Parameters Input Output Output Power Voltage Component Value Unit Voltage (V o) (Po) (V in )

Resonant inductor: 14.18 13 Resonant inductor DCR [119] : Lr ESR 1 Flying capacitor: 9.4 Flying Capacitor ESR: ESR 3.2 Output capacitor: 2000 Min. 65.3 V, Min. 305 W 50 V Output Capacitor ESR: ESR 3.2 Max. 150 V Max. 1.62 kW Input capacitor: 10 Input Capacitor ESR: ESR 3.2 Input resistance: 1 Load: RLOAD 14 Ω Switching frequency: 19299.6 Hz

The efficiency of both converters has been analysed within the voltage conversion ratio ranges that are indicated in Table 3.10.

12 Rin intends to model the resistance of all of the converter’s conductors. Rin is very low to avoid a high voltage drop that can deviate considerably the output voltage compared with the ideal one, which makes easier the efficiency analyses. 13 Since the voltage drop in the equivalent series resistance of the input inductor becomes the DC (average) component of the inductor voltage [119], a very small value is assumed for this parasitic resistance (1 μH) in order to maintain the average voltage almost zero at steady state in this inductor. This minimizes alterations of the voltage and current waveforms of the converter. 93

Table 3.10 Ranges of voltage conversion ratios ( M = V o/V in ).

The results are summarized in one plot of efficiency vs. voltage conversion ratio, which is indicated in Fig. 3.49. This plot clearly indicates how the efficiency of these converters behave when the voltage conversion ratio changes. Next, the process performed to obtain these results is explained.

3.5.1 MOSFET Electrical Model

Fig. 3.21 shows the MOSFET electrical model that is utilized in both converters, the Three-Level FCBC and the RSCC boost converter. M1 and D1 are not intended to simulate detailed electrical behaviour caused by parasitic capacitances, but they represent the ideal behaviour of an ideal MOSFET in parallel with an ideal diode, i.e. like a current-bidirectional two-quadrant SPST switch [120].

Fig. 3.21 MOSFET electrical model.

The model of Fig. 3.21 has been implemented in PLECS with a separate MOSFET and intrinsic body diode as indicated in Fig. 3.22. As explained later in section 3.5.2, this MOSFET + Body Diode electrical model should be used to obtain correct efficiency results in the analysed converters when using thermal descriptions obtained directly from the MOSFET manufacturer (Wolfspeed) website.

For the electrical circuit of Fig. 3.22, most of the negative drain-to-source current (third-quadrant operation) flows through the lower impedance path between the MOSFET (channel) and the body diode [121], which is the impedance of the MOSFET channel. In fact, this impedance becomes lower when the gate-to-source voltage ( Vgs ) is higher as indicated in Fig. 3.23. Moreover, the forward voltage ( Vf) of SiC- MOSFET body diodes is high compared with those of Si MOSFETs [121]. This is important because it means that body diodes need a considerably higher forward voltage to conduct, which maybe is not realizable under the simulation boundaries defined by tables 3.10 – 3.12, so their conduction and switching losses may be equal to zero whatever the voltage ratio of the converter would be.

Fig. 3.22 Implementation in PLECS of the MOSFET electrical model.

Fig. 3.23 Reverse recovery characteristic of the Body Diode of a SiC-MOSFET [121].

3.5.2 MOSFET Thermal Model

PLECS can simulate the losses of components, including passive components and semiconductor switches (MOSFETs), but in order to do so, it needs to use its thermal capabilities as explained next.

MOSFET energy data and other relevant information for simulation purposes are provided in the datasheet of the device. In this report, a Wolfspeed MOSFET C3M0016120K is used; thus, as recommended in [122], the MOSFET electrical model has been defined as a separate MOSFET and body diode model as indicated in Fig. 3.22. In this way, the thermal capabilities of PLECS can be used to obtain switching and conduction losses individually from these devices. The simulation in this way provides the thermal performance of Wolfspeed MOSFETs and body diodes correctly.

Wolfspeed provides in its website [123], xml files with all of the necessary information that PLECS needs to deduce the conduction and switching losses of MOSFETs and corresponding intrinsic body diodes. These xml files are known as thermal descriptions. It is possible to construct these thermal descriptions 95 manually by using the information provided in datasheets. For instance, Table 3.11 indicates the name and number of some figures of the datasheet that can be used to create the thermal description of MOSFET C3M0016120K.

Table 3.11 Information that can be obtained from the MOSFET C3M0016120K datasheet.

The thermal descriptions are look-up tables that PLECS uses to deduce the energy involved in the commutation turn-on and turn-off transients and in conduction states of semiconductor devices. For the C3M0016120K and its intrinsic body diode, the data of these thermal descriptions have been summarized in appendix C.

The following 3D and 2D plots provide a visual interpretation of the thermal description of this device.

(a) (b )

Fig. 3.24 MOSFET C3M0016120K thermal description for switching losses: (a) Turn-on, (b) Turn-off

(a) (b )

Fig. 3.25 Thermal description for conduction losses of MOSFET C3M0016120K (a) MOSFET, (b) intrinsic body diode.

Note:

Since the C3M0016120K is a SiC MOSFET, the reverse recovery time of its body diode is very short [121], so the turn-off losses have been neglected. The turn-on losses are ignored as well, so there is no data for calculating switching losses, but only data to calculate conduction losses, have been added in the PLECS thermal description for this diode.

It is observable that for a proper efficiency calculation, PLECS needs to know junction temperatures as well. In this sense, in order to have safe-level junction temperatures, it is necessary to insert into the MOSFET electrical model, a thermal impedance to represent the thermal grease between the semiconductor case and a heatsink. As a result, the MOSFET electro-thermal model of Fig. 3.26 is obtained, which should be used to perform thermal simulations of the converter properly. Note that is mandatory to place a semiconductor component on a heatsink in order that the conduction and/or switching losses of the component can be read by a Probe block in PLECS [107]. Moreover, note that this electro-thermal model needs to work in conjunction with Cauer Network elements (semiconductor thermal impedance model), which must be part of the semiconductor thermal description as explained in the following section.

Fig. 3.26 MOSFET electro-thermal model in PLECS

3.5.3 Thermal Impedances

MOSFET junction temperature time response is always obtained in PLECS by using a thermal model known as the Cauer Network [107, 124]. This thermal model represents the multiple layers that form the packaging of the semiconductor [125]. It is formed by n chains with elements such as thermal resistances

(Rjc ’s ) and thermal capacitances ( Cjc ’s ). Fig. 3.27 shows a 4th order Cauer Network, where Tj is the semiconductor junction temperature and Tc is the base plate (case) temperature of the semiconductor device.

Fig. 3.27 Fourth order (n=4) Cauer Thermal Model [125].

For the C3M0016120K MOSFET and its intrinsic body, Wolfspeed provides the value of the elements of a 4th Order Cauer Network as indicated in Table 3.12. However, these elements can be derived by using the thermal impedance curves of the device [124], i.e. “Fig. 21. Transient Thermal Impedance (Junction – Case)” of the datasheet.

Table 3.12 Cauer-network elements of MOSFET C3M0016120K & body diode.

3.5.4 Electrical Simulation of the Three-Level Flying Capacitor Boost Converter

As indicated in Table 3.12, for the three-level FCBC the highest voltage conversion ratio in the current efficiency analysis is Vo/V in = 5 @ D = 0.8 . Then, it is necessary to establish the maximum MOSFET ratings that ensure the converter can withstand its maximum operating power. An electrical simulation of the converter can obtain these values. Therefore, the simulation of the Three-Level FCBC at maximum

Vo/V in is performed by using the simulation circuit of Fig. 3.28. This circuit produces the maximum MOSFET RMS currents and blocking voltages that the semiconductors have to withstand, as presented in Table 3.15.

Note in Table 3.13, that the highest RMS currents (80.13 Amps) occur in the bottom-half bridge of the converter, i.e. MOSFETs S3 and S4 , and the maximum blocking voltage, 125 V (i.e. Vo/2), is the same for all of the MOSFETs. Therefore, according to the aforementioned, a Wolfspeed SiC MOSFET, model

C3M0016120K with maximum ratings VDS = 1200 V, I D = 115 A and Tjmax = 175 °C is used as the semiconductor switch to perform simulations of efficiency in this converter.

Fig. 3.28 Circuit for electrical simulation of the Three-Level FCBC.

Fig. 3.29 Subsystem "Three-Level FCBC" of Fig. 3.28.

Table 3.13 Maximum current and voltage ratings of MOSFETs of the Three-Level FCBC @ Vo/Vin=5

3.5.5 Simulation of the Efficiency of the Three-Level Flying Capacitor Boost Converter

It is necessary to recall that PLECS needs the thermal descriptions of MOSFETs and body diodes to calculate their conduction losses and switching losses. In the present case, for carrying out the efficiency simulation under the required voltage-conversion-ratio range (see Table 3.10), the thermal descriptions have to correspond to those of the C3M0016120K MOSFET and its intrinsic body diode.

Now, after reviewing all of the previous concepts and once the thermal descriptions and proper electro- thermal models for MOSFETs in PLECS have been defined, it is time to simulate their losses; but first, it is necessary to select a heatsink to simulate the efficiency of the converter properly.

The electro-thermal simulation circuit of the whole converter is indicated in Fig. 3.30. Note that this simulation circuit uses a heatsink (blue-transparent block) covering the switch matrix of the converter (Fig. 3.29, subsystem “Three-level FCBC”). In this circuit, a direct connection exists between the heatsink and a temperature source (grounded) that is constant and equal to 40°C in order to force the heatsink temperature to a known value of 40°C. At this condition, the simulation at the worst-case scenario

(Vo/V in =5) shows if the MOSFETs and body diodes junction temperatures will maintain a value that is lower than their maximum possible values, i.e Tjmax = 175°C , when the heatsink temperature is 40°C constantly. By following this process, it is possible to identify the highest possible temperature of the heatsink to maintain the MOSFETs and body diodes junction temperatures at a safe value even under the worst operating condition of this study.

A correct electro-thermal simulation in PLECS also requires other parameters to be defined such as the

MOSFET’s drain-source ON resistance (R on MOSFET) and the body diode’s forward resistance (Ron Body Diode) as well as the forward voltage of the body diode. Additionally, the simulation needs to use a thermal compound (thermal grease), to complete the thermal model. Table 3.14 shows all of these parameters, which either have been deduced from datasheet figures of the C3M0016120K MOSFET or have been calculated by making assumptions, as is the case of the thermal resistance between the MOSFET case (package TO-247-4L) and the heatsink.

Table 3.14 Parameters of MOSFET C3M0016120K

100

Fig. 3.30 Electro-thermal circuit of the Three-Level FCBC without heatsink thermal resistance.

The simulation of the converter at maximum voltage ratio Vo / Vin = 5 and at Heatsink temperature equal to 40 °C, shows that the junction temperatures are the same for all of the MOSFETs and body diodes of the Three-Level FCBC: Tj MOSFETs = 60.5 °C , and Tj body diodes = 51.7 °C . Therefore, 40 °C in the heatsink means a safe condition for these semiconductors.

Now, by using the thermal power flow equation (Eq. 3.53 below), it is possible to determine the heatsink thermal resistance ( Rth heatsink ) that is required to maintain the heatsink temperature at 40°C under the highest Vo / Vin .

(3.53)

= + .

Where the total loss of the semiconductor switches ( P total loss semi ) is the sum of the conduction losses plus the switching losses of all of them. The block diagram of Fig. 3.31 below shows how to obtain the total losses of one semiconductor.

Fig. 3.31 Block diagram to obtain switching losses and conduction losses in PLECS simulations [126].

101

In Fig. 3.31, the conduction losses and switching losses are obtained by using a Periodic Average block and an Arithmetic Mean block, respectively. Note that both, the Periodic Average and the Arithmetic Mean blocks, are synchronized at the switching frequency in order to determine the conduction and switching losses appropriately at each switching period. When implemented in PLECS, Fig. 3.31 looks like Fig. 3.32. Moreover, the simulation block diagram of Fig. 3.33 obtains the losses of the ESR’s of the converter by using the same principle as well.

To calculate the losses of all the semiconductors, the simulation circuit of Fig. 3.30 becomes that of Fig. 3.34, which has many subsystems based on Fig. 3.32 and Fig. 3.33.

Fig. 3.32 PLECS block diagram to calculate conduction and switching losses in MOSFET and body diode.

Fig. 3.33 PLECS block diagram to calculate losses in ESR's. 102

Fig. 3.34 Electro-thermal circuit of the Three-Level FCBC without heatsink thermal resistance but with subsystems to determine switching conduction losses.

Figures 3.35 and 3.36 show the simulation results of losses, at quasi-stationary state, in MOSFETs S1 and S3 for the worst-case condition in this converter, respectively. Note in Fig. 3.35, that in the case of the MOSFET S1 , the conduction losses of the body diode and the switching losses of the MOSFET are zero. The conduction losses of the body diode are zero because, as aforementioned, the intrinsic body diode has a high forward voltage (1.8 V), which does not permit the diode of the MOSFET S1 to become forward polarized under the voltage operating conditions ( Vin = 50 V, Vo = 250 V ). Likewise, according to the information provided in the user manual of PLECS [107], the simulation of switching losses turns out zero or undetermined when PLECS has to deal with MOSFETs with negative drain current and positive drain-to-source voltage as it always happens in MOSFET S1 . In light of this, in the present efficiency analysis, the switching losses of MOSFETs S1 and S2 of the three-level FCBC have been neglected because they have been demonstrated in simulations to be always zero. In the case of the losses of MOSFET S3 (Fig. 3.36), this MOSFET does have switching losses, which is the same case for MOSFET S4, since their current and voltage polarities are compatible in PLECS.

The total losses of the Three-Level FCBC are obtained by summing together all the existing losses of components and semiconductors, i.e. the losses of the four MOSFETs, the four body diodes, as well as the five ESR’s (Fig. 3.37). A Moving Average block averages, in a longer period, the total loss of the converter, which helps to find the trend of this variable, i.e. a smoother total-loss variable that is more suitable to be used to find the efficiency. Note that the Averaging Time parameter of the Moving Average block, must be equal to a large number (higher than 100), which is multiplied by the switching period

(Tsw=1/f sw) [124].

103

Fig. 3.35 Switching and conduction losses of MOSFET S1 and its body diode for the worst operating condition of the Three-Level FCBC.

Fig. 3.36 Switching and conduction losses of MOSFET S3 and its body diode for the worst operating condition of the Three-Level FCBC.

104

Fig. 3.37 Total loss calculation in PLECS

Now, for the highest possible voltage ratio of this study, the simulation of the circuit of Fig. 3.34 shows that the total losses of the semiconductor switches are equal to:

= 561.6 Therefore, assuming an ambient temperature of 35°C, the necessary thermal resistance of the heatsink to maintain its temperature at 40 °C is equal to the following: [127]

(3.54) − 40° − 35° ° = = = 0.009 561 .6

Notice that a heatsink with Rth = 0.009 °C/W would require advanced heat transfer technologies (e.g. liquid cold plates) rather than a conventional naturally ventilated or air-cooled heatsink, [127].

The thermal resistance of the heatsink is the key parameter to determine its steady-state temperature, but, for the same purpose, its thermal capacitance is generally not that relevant and is not calculated [124]; hence, it is assumed directly a thermal capacitance equal to 10 J/K for the heatsink in this study.

The simulation circuit of Fig. 3.38 presents the thermal resistance of the heatsink (0.009 °C/W). This is the proper simulation circuit to obtain the efficiency of the Three-Level FCBC. Notice that, the efficiency is calculated by using the equation η = 1 - P Total Losses / P in , which is implemented in PLECS with a Function block as underlined in Fig. 3.39. Additionally, the efficiency must be measured in the simulation when the junction temperatures are in quasi-steady state because PLECS uses them to deduce the switching and conduction losses. It is noteworthy that it can be quite fast in PLECS to obtain simulation results in the electrical domain due to minor time constants, but the same may be very slow in the electro-thermal domain, due to the addition of bigger time constants (thermal inertia).

105

Fig. 3.38 Electro-thermal circuit of the Three-Level FCBC with heatsink thermal resistance and subsystems to determine switching, conduction losses and efficiency.

Fig. 3.39 PLECS block diagram to find the efficiency of the converter.

106

Table D.1 (Appendix D) summarizes the simulation results of efficiencies obtained for this converter and Fig. 3.40 plots these results.

Fig. 3.40 Three-Level FCBC: Efficiency vs. Voltage Conversion Ratio.

3.5.6 Electrical Simulation of the Resonant Switched Capacitor Boost Converter

The highest conversion ratio for the analysis of the efficiency of the RSCC boost converter is 3.01 at a phase-shift angle equal to T1 = 90° (see Table 3.10). It is necessary to determine the maximum current and voltage ratings that the MOSFETs of this converter needs to endure this maximum power condition. In order to obtain these MOSFET maximum ratings, the PLECS simulation circuit of Fig. 3.41 is used. The following maximum ratings are obtained after running the simulation:

Table 3.15 Maximum current and voltage ratings of MOSFETs of the RSCC boost converter @

Vo/V in = 5.

107

Fig. 3.41 Circuit for electrical simulation of the RSCC boost converter.

Fig. 3.42 Subsystem "RSCC" of Fig. 3.41.

The semiconductor switches chosen for the Three-Level FCBC topology (Wolfspeed, MOSFETs model C3M0016120K) can also withstand the RMS currents and voltages of Table 3.15; therefore, in order to have, in terms of efficiency, a fair competition between these two converters, it has been decided to utilize the same MOSFET model for the switches of the RSCC topology as well.

108

3.5.7 Simulation of the Efficiency of the Resonant Switched Capacitor Boost Converter

Fig. 3.43 shows the electro-thermal simulation circuit of the RSCC boost converter. The same process performed for the Three-Level FCBC topology to identify the necessary thermal resistance to maintain the junction temperatures at safe level is performed for the RSCC boost converter as explained next.

First, the heatsink temperature is clamped to a constant temperature of 40°C at the worst voltage ratio condition ( Vo/V in ≈ 3 ). Then, after running the simulation, the converter shows that the average junction temperatures are the same for all of the MOSFETs and body diodes: i.e. Tj MOSFETs = 63.5 °C , and Tj body diodes = 53.5 °C . Since these temperatures are lower than the maximum junction temperature of MOSFET C3M0016120K (175°C), then 40 °C in the heatsink means a safe condition for the semiconductors. Note that the simulation uses the MOSFET parameters of Table 3.14 as well.

Fig. 3.43 Electro-thermal circuit of the RSCC boost converter without heatsink thermal resistance.

The thermal power flow of the semiconductors can be calculated by using the equation 3.53. Additionally, the losses of semiconductors, and equivalent series resistances can be simulated by using the same philosophy of figures 3.32 and 3.33, respectively. On the other hand, unlike MOSFETs S1 and S2 of the Three-Level FCBC, the MOSFETs S1 and S2 of the RSCC topology do have switching losses that can be calculated by PLECS. For instance, Fig. 3.45 shows the losses in MOSFET S1 and Fig. 3.46 shows the losses in MOSFET S3.

109

Fig. 3.44 Electro-thermal circuit of the RSCC boost converter without heatsink thermal resistance but with subsystems to determine switching and conduction losses.

Fig. 3.45 Switching and conduction losses of MOSFET S1 and its body diode for the worst operating condition of the RSCC boost converter.

110

Fig. 3.46 Switching and conduction losses of MOSFET S3 and its body diode for the worst operating condition of the RSCC boost converter.

The simulation of the circuit of Fig. 3.44, for the highest possible voltage ratio of this converter, shows that the total losses of the semiconductor switches are equal to:

= 150.72 Therefore, assuming an ambient temperature of 35°C, the necessary thermal resistance of the heatsink to maintain its temperature at 40 °C is equal to:

(3.55) − 40° − 35° ° = = = 0.033 150 .72

Fig. 3.47 shows the simulation circuit with heatsink thermal resistance. This circuit serves to obtain the efficiency of the RSCC boost converter properly. Note that the total losses and the efficiency are calculated by using the same block diagrams of figures 3.37 and 3.39, respectively.

111

Fig. 3.47 Electro-thermal circuit of the RSCC boost converter with heatsink thermal resistance and subsystems to determine switching, conduction losses and efficiency.

Table D.2 summarizes the simulation results of efficiencies obtained for the RSCC boost converter. Fig. 3.48 plots these results. Finally, Fig. 3.49 compares the efficiencies of both converters.

Fig. 3.48 RSCC Boost Converter: Efficiency vs. Voltage Conversion Ratio.

112

Fig. 3.49 Comparison of efficiencies of the Three-Level FCBC and RSCC boost converter at different voltage conversion ratios.

3.6 Summary

In this chapter, an analysis of the behaviour of currents and voltages in the components of three high- power high-voltage DC-DC converters has been performed. This analysis has led to better understanding of the operation of these converters through the study of their equivalent circuits and mathematical models. The analysis has contrasted simulation results with analytical results in order to prove that the simulated steady-state responses of these converters are exactly as predicted by their equations. In this way, it has been validated the authenticity of the simulations and the mathematical models of the converter’s circuits, which is a first step before undertaking future work on experimental investigation (prototyping). The main effort and novel contribution of this chapter has been the derivation of a set of mathematical equations for the RSCC boost converter. Chapter 5 – Section 5.3, discusses the significance of this contribution further.

Chapter 3 has also demonstrated that in terms of efficiency, the Three-Level FCBC outperforms the

RSCC boost converter. Nevertheless, when Vo/V in ≈ 2 , the efficiency is almost similar for both converters. This fact is in agreement with Fig. 3.14, which demonstrates analytically that the RSCC boost converter always presents the lowest currents in semiconductors when the voltage ratio is close to two. In this respect, the three-level FCBC, as shown in figures 4.2 and 4.3, presents RMS currents that are linear with respect to the power in the load; hence, it is expected for this converter that the efficiency vs. voltage conversion ratio curve also have a linear behaviour as obtained in Fig. 3.49. On the other hand, to a great extend the obtained efficiency results, with values as high as 99.5% at the lowest voltage conversion ratio and higher than 95% in a wide voltage ratio range, are due to the use of SiC MOSFETs, which presents very high switching speeds (i.e. low switching losses) and very low ON resistance (i.e. low conduction losses). Therefore, it is observable that the development of more efficient DC-DC converters is achievable by using smart ways to take advantage of the benefits provided by WBG devices.

113

Chapter 4: Comparison between the Three-Level Flying Capacitor Converter, the Resonant Switched Capacitor Converter and the Asymmetric Three-Level Flying Capacitor Boost Converter

4.1 Comparison of Converters

The comparison of three high-voltage, high-power DC/DC converter topologies takes place in this section. Two primary factors are considered to perform this comparison: the voltage stresses of each switch and the RMS currents of each passive component and switch. In both cases, the comparison is carried out at constant voltage ratio and nominal, partial, and overload conditions and intends to obtain an idea of the expected static power losses and the rating of switches in order to devise the feasibility of each converter to be designed and implemented at the required specifications.

This comparison should be useful to determine the abilities that each topology has to have at different loads to overcome operating scenarios in terms of efficiency and voltage stresses. This information could also be useful to decide some other important aspects such as, power density, reliability, costs and so on [128-130] related to each converter.

As mentioned before, the comparison of these converters is carried out at constant voltage ratio and variable load resistance in order to change the output power of the converters but maintaining the output voltage constant at M = 2.67 as required. Therefore, the load resistance is changed in 10% steps, starting from 140 Ω up to 11.72 Ω, which means an output power variation from 127 W to 1.52 kW approximately, and the corresponding control variable should be adjusted depending on the topology to keep the voltage ratio constant.

With respect to the control variables D and T1 , in the case of the three-level FCBC topologies the voltage ratio raises when increasing D and is unaffected by the load but in the case of the RSCC, the voltage ratio raises in a sinusoidal manner when increasing T1 and also depends on all of the circuit parameters. One of these parameters is the value of the load R, which, as mentioned before, changes in this comparison. Therefore, the control variable T1 of the RSCC boost converter has to change every time that the load is changed in order to keep the voltage ratio at 2.67 permanently as required. Fig. 4.1 exemplifies this.

The simulation of each topology has been verified in chapter 3 so all of the currents and voltages that are obtained and compared in this section are obtained from simulation results with confidence. The positions of switches S1 , S2 , S3 and S4 are according to Figures 3.2, 3.6 and 3.16.

Additionally, in this work the current stress comparison has been carried out for the RSCC and the three- level FCBC but not for the asymmetric converter because this last one requires a control method that could not be identified yet to maintain a zero average current in the flying capacitor as required. However, the voltage stress comparison has been done for all of the converters.

114

Figures 4.2 and 4.3 present several plots to compare the RMS currents of different components of the studied topologies under different load values and the chart of Fig. 4.4 outlines the drain-to-source voltages for the switches S1 , S2, S3 and S4 at any of the power conditions studied in this section.

Fig. 4.1 The voltage ratio of the RSCC also depends on the load R and the control variable T1.

Fig. 4.2 RMS currents of passive components.

115

Fig. 4.3 Control variable values and RMS currents of switching devices.

Drain-Source Voltage (VDS)

140 120 100 80

Volts 60 40 20 0 Switch S1 Switch S2 Switch S3 Switch S4

Three-Level FCBC Asymmetric RSCC Boost Converter

Fig. 4.4 Drain-to-source voltages for different power conditions (from 127 W to 1.52 kW) and voltage ratio constant at 2.67.

4.2 Summary

Chapter 4 has shown that, in general terms, the converter with lower RMS currents, i.e. with better performance for the analysed load range in terms of power losses in parasitic and conductor resistances is the three-level FCBC topology. Additionally, note that the slope of the RMS current curves (see figures 4.2 and 4.3) is not constant for the RSCC boost converter and even is negative at low load conditions. This indicates that the efficiency of this converter is not constant but is declining at lower loads, which is not the same case for the three-level FCBC. For this converter the decreasing of the RMS currents is

116 proportional to the decreasing of the load so the efficiency of the converter should maintain the same at any load.

On the other hand, the utilization of the multilevel commutation cell (Fig. 2.18) reduces the blocked-switch voltages of the three-level FCBC. The reason for this, is that regardless of the operating mode (see Fig. 3.4), the terminal voltage (Vo/2) of the flying capacitor is over the terminals of any inner-cell blocked switch S2 and S3, whereas for the outer-cell blocked switches S1 and S4 , they receive the output voltage minus the flying capacitor voltage. Therefore, the drain-to-source voltage ( VDS ) of any switch in this topology is always equal to Vo / 2. Hence, now is possible to infer the importance of keeping constant the voltage in the flying capacitor of this topology. If this voltage is not maintained constant, the reliability of this converter should be affected since the VDS of the outer-cell switches can raise up to values that are close or equal to Vo depending on the voltage level of the flying capacitor.

At the same time, the equivalent circuits of the RSCC boost converter (Fig. 3.7) show that, regardless the operating mode, the VDS depends on the position of each half-bridge of the topology. For the case of the top-half bridge (switches S1 and S2 ) the blocked-switch voltage ( VDS ) is equal to Vo-Vin while those of the bottom-half bridge (switches S3 and S4 ) present a blocked voltage that is equal to Vin . A brief analysis of the equivalent circuits has led to this conclusion.

In the case of the asymmetric converter, a VDS = Vo is present in its outer-cell switches during the commutation transients as shown in the voltage waveforms of S1 and S4 in Fig. 3.18.

Then, according to the aforementioned, no one topology of those studied here has, in general terms, the lowest VDS . In other words, the VDS of each switch can be higher or lower depending on the topology. However, the three-level FCBC and the RSCC boost converter have demonstrated suitability for high voltage applications since their VDS ’s are equal or close to half of the output voltage, but this is not the case for the asymmetric converter.

Next, chapter 5 presents several conclusions about the comparison that has been presented in chapter 4. These conclusions have been drawn up on the basis of the performance that these converters has demonstrated in the following aspects [7], since these are the fundamental characteristics that high-power high-voltage DC-DC converters as those for EV’s electric power trains should have:

• Weight, efficiency and volume.

• Electromagnetic interference.

• Current ripple drawn from the battery.

• Control of the DC-DC converter.

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Chapter 5: Conclusions and Future Work

5.1 Summary of Achievements

During the MPhil studies, a thorough familiarization with new technologies / advances / concepts on high- voltage high-power DC-DC converters for electric vehicle systems has been undertaken. The performed work included the revision of new publications related to this area of DC-DC converters as well as the study of other topologies, excluding those that have been presented here. Additionally, an investigation has been carried out of the characteristics of WBG semiconductors and their applications as well as the identification of the main performance targets of multi-kW DC-DC converters for electrified vehicles.

It has been necessary, as part of the analysis performed to the RSCC boost converter, to derive several mathematical models based on the circuit states of this converter. It has not been the same case for the three-level FCBC topology because all of the analytical tools were already available in the literature. On the other hand, an efficiency performance analysis of these converters, in a wide voltage ratio range, have shown that they can participate under demanding requirements, meaning in battery charging applications in a high-power 800 V DC bus of an electrified vehicle.

5.2 Conclusions on the Comparison between the Three-level FCBC converter, the RSCC Boost Converter and the Asymmetric Converter

All of the compared converters are non-isolated and do not need a bulky frequency transformer to operate. They have relatively simple structures with low component count and have lower dv/dt compared to the conventional boost converter. This means that these converters have better reliability and EMC.

Furthermore, a lower di/dt means lower voltage drop in the converter’s parasitic inductance, which increases the converter’s reliability due to a lower drain-to-source voltage. Lower di/dt also means lower peak reverse recovery current ( IRR ) which in turn means lower switching losses. In this respect, the RSCC boost converter should outperform the three-level FCBC and asymmetric topologies due to its smooth flying-capacitor current (see Fig. 2.26) differs from the sharp flying-capacitor currents of the other topologies (see Figures 2.22 and 3.17).

In terms of cost, the asymmetric converter can use low-voltage devices in its inner-commutation cell so is expected that this converter will be cheaper than the other ones. However, the flying-capacitor voltage controllers of the asymmetric and three-level FCBC converters require additional sensors so they are more complex and should be more expensive due to this fact. The RSCC boost converter maintains the flying-capacitor average voltage at Vo/2 constantly and naturally, so it does not need to control the flying capacitor voltage as the other two topologies do.

In terms of losses, in general the RSCC boost converter has demonstrated to have higher RMS currents than the other two topologies. However, if the specifications are modified to a voltage ratio that is equal to two and under the same rated power ( Po = 1.28 kW ), then this converter may outperform the other converters because it would work at its lowest ratio of peak inductor current to average output current so at its maximum efficiency point. Additionally, note that this converter has the inherent characteristic of soft 118 switching so it could operate at higher frequencies with lower switching losses compared to the other topologies, which operate at hard switching (except the asymmetric + snubber).

In general, the three analysed converters have demonstrated to have their own advantages and disadvantages when compared each other. However, the RSCC boost converter presents much higher RMS currents compared to the other two topologies, and at low load conditions the currents are excessive as well. Therefore, its switching devices have to deal with bigger currents, so they need to be bigger in size and need bigger heatsinks so there is a reduction in the power density. Additionally, this converter draws an input current with very high ripple, which should degrade the battery performance [131]. Therefore, this converter seems to be unviable.

In the case of the three-level FCBC and the asymmetric topologies, simulation waveforms show that the input current ripple is much lower than that of the RSCC boost converter. Additionally, the frequency of the input current is twice the switching frequency in these topologies, hence it is possible to reduce the size of their passive components. However, the asymmetric converter presents approximately twice the drain-to-source voltage of the other two topologies. Consequently, the asymmetric converter is not suitable to operate under high-voltage specifications.

Having mentioned these advantages and disadvantages of these converters, it is possible to conclude that the three-level FCBC topology is more suitable for the required operating specifications. This topology has demonstrated a fair compliance of the essential features of a high-power high-voltage DC- DC converter (e.g. multi-kw & 800 V) with high power density requirements.

5.3 Contribution

In this thesis, the thorough analysis of the circuital conditions of the RSCC in boost mode has yielded a set of algebraic equations that can be utilized to rapidly predict relevant electrical variables of this converter in different scenarios instead of using circuit-oriented simulators that may slow down this process. This set of equations (Table 3.4) also become a necessary tool to generalize or normalize the analysis of this converter in boost mode so its contribution is of transcendental importance for designers of this topology. Furthermore, this work has contributed with a comprehensive efficiency analysis of two multilevel converters that may permit to select the more suitable voltage conversion ratio to be used for these converters in order to maximize their efficiencies.

5.4 Future Work

Modern DC-DC converters for application in vehicles are usually soft-switched converters [6]. This technique serves to reduce switching losses by using parasitic or additional C, L and R components to create ZVS or ZCS conditions in switching devices.

There are passive and active soft-switching methods. Active methods use extra components such as passive and active switches and resonant elements as part of an auxiliary circuit that creates soft switching in the target switch(es) (commonly named main switch(es)). Passive methods only use passive switches in the auxiliary circuit so they are more reliable than the active ones. Diverse studies have also shown that the passive methods outperform the active methods in the high power operation region [132].

119

In the literature, there are many available options of soft-switching auxiliary circuits that could be studied in detail to adapt one of them (the most suitable) to attain higher efficiency and higher power density in the three-level FCBC topology. In this regard, the following future work encompasses the activities to undertake a practical evaluation of the Three-Level FCBC topology along with the implementation of a suitable soft-switching auxiliary circuit for this topology:

1. To select a suitable and adaptable auxiliary circuit for high-power high-voltage applications for the three-level FCBC topology.

2. To use target specifications (i.e. for on-board chargers – see Tables 2.5 – 2.7) and perform detailed simulations, circuit design and component selection.

3. To undertake loss analysis and initial thermal calculations.

4. To get the system layout including interconnections, bus bar arrangements and heat sinks as well as to select the gate drive circuit and basic control (open loop), generation of switching signals and so on.

5. To build and test a prototype. Testing includes to evaluate range of powers, losses (efficiency evaluation), voltages, and to compare with the design predictions.

6. To document the circuit operation and performance and publish results.

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Appendix A: Popular PFC Topologies

Fig. A.1 Classic Boost PFC

Fig. A.2 Interleaved Boost PFC

Fig. A.3 Dual Boost Bridgeless PFC 121

Fig. A.4 Bidirectional Bridgeless PFC

Fig. A.5 ZVS Totem-Pole Bridgeless PFC

Fig. A.6 Interleaved Totem Pole Bridgeless PFC

122

Appendix B: Theoretical and Simulation Values

Table B.1 Theoretical and simulation results of the Three-Level Flying-Capacitor Boost Converter.

Duty Cycle (D) Electrical 0.1 ≤ D ≤ 0.9 Variable D = 0.1 D = 0.2 D = 0.3 D = 0.4 D = 0.5 D = 0.6 D = 0.7 D = 0.8 D = 0.9

Theoretical Results: Based on Equations 3.1 – 3.9

Avg. Output 55.56 62.5 71.43 83.33 100 125 166.67 250 500 Voltage [V]

Avg. Input 4.41 5.58 7.29 9.92 14.29 22.32 39.68 89.29 357.14 Current [A]

Avg. Output 3.97 4.46 5.1 5.95 7.14 8.93 11.91 17.86 35.71 Current [A]

Avg. Input 220.46 279.02 364.43 496.03 714.29 1116.07 1984.17 4464.28 17857.2 Power [W]

Avg. Output 220.46 279.02 364.43 496.03 714.29 1116.07 1984.17 4464.28 17857.2 Power [W]

Efficiency [%] 100 100 100 100 100 100 100 100 100 Input Inductor

Current Ripple 0.58 0.97 1.11 0.86 0 1.3 2.59 3.89 5.18 (peak-to-peak)

[A]

Flying

Capacitor

Voltage Ripple 0.046 0.116 0.23 0.41 0.74 0.93 1.23 1.85 3.7 (peak-to-peak)

[V]

Output

Capacitor

Voltage Ripple 0.02 0.046 0.08 0.12 0.19 0.28 0.43 0.74 1.67 (peak-to-peak)

[V]

Simulated Results: Based on PLECS Simulations

Avg. Output 55.5 62.44 71.39 83.33 100 125 166.67 250 500 Voltage [V]

Avg. Input 4.4 5.56 7.28 9.92 14.28 22.32 39.69 89.29 357.14 Current [A]

123

Avg. Output 3.96 4.46 5.1 5.95 7.14 8.93 11.91 17.86 35.71 Current [A]

Avg. Input 220.11 278.11 364.2 496 714.23 1116.01 1984.34 4464.28 17857.2 Power [W]

Avg. Output 220.09 278.66 364.3 495.9 714.28 1116.07 1984.21 4464.29 17857.2 Power [W]

Efficiency [%] 100 100 100 100 100 100 100 100 100 Input Inductor

Current Ripple 0.571 0.97 1.11 0.86 0.016 1.3 2.59 3.89 5.18 (peak-to-peak)

[A]

Flying

Capacitor

Voltage Ripple 0.045 0.115 0.23 0.41 0.74 0.93 1.23 1.85 3.7 (peak-to-peak)

[V]

Output

Capacitor

Voltage Ripple 0.02 0.046 0.08 0.12 0.19 0.28 0.43 0.74 1.67 (peak-to-peak)

[V]

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Table B.2 Theoretical and simulation results of the RSCC boost converter.

Phase-shift angle (T1) Electrical 20º ≤ T1 ≤ 90º Variable 20º 30º 40º 50º 60º 70º 80º 90º

Theoretical results: Based on Equations 3.38, 3.39, 3.40, 3.42, 3.43, 3.44 and 3.45

Avg. Output 4.36 6.24 17.43 9.27 10.37 11.16 11.64 11.81 Current [A]

Avg. Input 5.32 10.92 7.89 24.05 30.07 34.94 37.97 39.09 Current [A]

Avg. Output 265.86 546.11 871.5 1205.03 1504.35 1747.25 1898.56 1954.47 Power [W]

Ratio of

Peak

Inductor 7.87 3.06 3.45 4.93 6.1 7.06 7.73 8.29 Current to

Avg. Output

Current

Voltage 1.22 1.75 2.21 2.6 2.9 3.13 3.26 3.31 Ratio

Simulated Results: Based on PLECS Simulations

Avg. Output 4.37 6.25 17.43 9.27 10.37 11.16 11.64 11.8 Current [A]

Avg. Input 5.45 10.97 7.89 24.05 30.07 34.87 37.97 39.01 Current [A]

Avg. Output 267.35 546.98 875.53 1204.58 1506.4 1746.28 1900.22 1953.03 Power [W]

Ratio of

Inductor

Current to 7.81 3.05 3.46 4.95 6.13 7.02 7.71 8.26 Avg. Output

Currrent

Voltage 1.22 1.75 2.21 2.60 2.91 3.13 3.27 3.32 Ratio

125

Appendix C: Data of Thermal Descriptions and I-V Characteristics of MOSFET C3M0016120K

Table C.1 Thermal description for turn on energy calculation of MOSFET C3M0016120K at 25°C, 125°C, 175°C, and 900°C.

126

Table C.2 Thermal description for turn-off energy calculation of MOSFET C3M0016120K at 25°C, 125°C, 175°C, and 900°C.

127

Table C.3 I-V characteristic of MOSFET C3M0016120K at -40°C, 25°C, 175°C, and 900°C for calculation of conduction losses.

Table C.4 I-V characteristic of intrinsic body diode of MOSFET C3M0016120K at -40°C, 25°C, 175°C, and 900°C for calculation of conduction losses.

128

Appendix D: Converters’ Losses and Efficiency Values

Table D.1 Three-Level FCBC: losses and efficiencies at different voltage conversion ratios.

Table D.2 RSCC boost converter: losses and efficiencies at different voltage conversion ratios.

129

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