Heavily Boron-Doped Silicon Layer for the Fabrication of Nanoscale Thermoelectric Devices

nanomaterials

Article Heavily Boron-Doped Silicon Layer for the Fabrication of Nanoscale Thermoelectric Devices

Zhe Ma 1,2 ID , Yang Liu 1,2, Lingxiao Deng 1,2, Mingliang Zhang 1,2, Shuyuan Zhang 1,2, Jing Ma 1,2, Peishuai Song 1,3, Qing Liu 1, An Ji 1, Fuhua Yang 1,4 and Xiaodong Wang 1,5,* 1 Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China; [email protected] (Z.M.); [email protected] (Y.L.); [email protected] (L.D.); [email protected] (M.Z.); [email protected] (S.Z.); [email protected] (J.M.); [email protected] (P.S.); [email protected] (Q.L.); [email protected] (A.J.); [email protected] (F.Y.) 2 College of Materials Science and Opto-Electronic Technology, University of Chinese Academy of Sciences, Beijing 101408, China 3 School of Electronic, Electronical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 101408, China 4 State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China 5 School of microelectronics, University of Chinese Academy of Sciences, Beijing 101408, China * Correspondence: [email protected]; Tel.: +86-010-82305042

Received: 30 December 2017; Accepted: 26 January 2018; Published: 30 January 2018

Abstract: Heavily boron-doped silicon layers and boron etch-stop techniques have been widely used in the fabrication of microelectromechanical systems (MEMS). This paper provides an introduction to the fabrication process of nanoscale silicon thermoelectric devices. Low-dimensional structures such as silicon nanowire (SiNW) have been considered as a promising alternative for thermoelectric applications in order to achieve a higher thermoelectric ﬁgure of merit (ZT) than bulk silicon. Here, heavily boron-doped silicon layers and boron etch-stop processes for the fabrication of suspended SiNWs will be discussed in detail, including boron diffusion, electron beam lithography, inductively coupled plasma (ICP) etching and tetramethylammonium hydroxide (TMAH) etch-stop processes. A 7 µm long nanowire structure with a height of 280 nm and a width of 55 nm was achieved, indicating that the proposed technique is useful for nanoscale fabrication. Furthermore, a SiNW thermoelectric device has also been demonstrated, and its performance shows an obvious reduction in thermal conductivity.

Keywords: heavily boron-doped silicon layer; boron etch-stop; thermoelectric; silicon nanowire; ZT; nanostructures

1. Introduction Structures at micro- and nanoscale introduce various new properties, which have become one of the most important research topics in recent decades. Actually, research into micro- and nanoscale structures has affected almost every field of our lives, including healthcare, biomedicine, information processing, etc. Thermoelectric materials can directly interconvert energies between heat and electricity based on the Seebeck and Peltier effects, which have no noise, no pollution, and extensive application prospects [1]. Compared with bulk silicon (Si) structures, one-dimensional Si nanowire (SiNW) possesses a higher Seebeck coefficient a lower thermal conductivity, and the thermoelectric figure of merit (ZT) value is several times higher [2–4]. Furthermore, Si is a potential thermoelectric material due to its low cost and the compatibility with complementary metal-oxide-semiconductor (CMOS) technology. It is of great significance to develop techniques with high reproducibility, high yield and excellent uniformity for fabricating a number of nanostructures with various shapes and dimensions.

Nanomaterials 2018, 8, 77; doi:10.3390/nano8020077 www.mdpi.com/journal/nanomaterials Nanomaterials 2018, 8, 77 2 of 11

For Si nanowires, there are many fabrication methods, and these can be divided into top-down and bottom-up approaches [5]. Bottom-up strategies refer to the process by which nanostructures are assembled by their atoms or molecules from a substrate. There are numerous routes for the bottom-up fabrication of semiconductor nanowires, such as the vapor-liquid-solid (VLS) method [6,7], solution-liquid-solid (SLS) method, and template-based synthesis [8–10]. Top-down fabrication strategies usually use etching to form nanostructures from a larger piece of material. Common methods in fabricating silicon nanowires include photolithography-related techniques and metal-assisted chemical etching processes [11,12]. For example, silicon nanowires can be mass produced with methods such as metal-assisted etching [13], the superlattice nanowire pattern transfer (SNAP) method [14] and the aqueous electroless etching (EE) method [15]. However, based on the premise of maintaining a high throughput, how to control the size remains a big challenge. Recently, MEMS devices and processes have attracted increasing research interest, since they have provided us with integrated methods for silicon nanoscale structures fabrication. For instance, Toriyama et al. used electron beam lithography (EBL) to pattern silicon nanowires on separation-by-implantation-of-oxygen (SIMOX) wafer [16]. The silicon nanowire bridge (NWB) was released from the substrate by sacrificial layer etching. Koumela et al. fabricated silicon nanowire bridge with a diameter of 40 nm using a similar method [17]. Za’bah et al. reported a method for fabricating single crystal silicon nanowires with top-down optical lithography, together with simple oxidation and anisotropic etching with KOH [18]. However, all these approaches used silicon on insulator (SOI) wafer as the substrate, which is thirty times more expensive than a silicon substrate. The use of silicon substrate has also been considered by a number of authors. Tixier-Mita et al. obtained nanowires with a width of 100 nm by oxidation and tetramethylammonium hydroxide (TMAH) anisotropic etching of silicon [19]. Using oxide layer as a mask for KOH etching, Yang et al. achieved a 47 nm thick double-clamped beam on (111)-oriented silicon substrate [20]. However, both methods are complicated, and some specific silicon planes are required. Heavily boron-doped silicon layer and boron etch-stop techniques are usually used in the fabrication of MEMS devices [21–23]. However, in this paper, the authors introduce a method for fabricating nanoscale silicon structure based on these techniques. Boron etch-stop in TMAH solutions is utilized to release the silicon nanowire, which is easy to implement. A nanowire structure with a width of 55 nm is fabricated. Furthermore, metal electrodes were deposited by electron beam evaporation, and a thermoelectric device with a silicon nanowire of 150 nm in width is successfully finished. The device performances, including electrical conductivity, Seebeck coefficient and thermal conductivity, are also analyzed.

2. Materials and Methods Figure1a–c shows the schematic process ﬂow of fabricating a Si nanowire structure using heavily boron-doped silicon layer, and Figure1d shows the diagram of a thermoelectric structure using Si nanowire where the heating resistance and measuring electrodes are formed on both ends. In the experiment, 4-inch n-type, <100>-oriented, double-sided polished silicon wafers with a resistivity of 7–13 Ω·cm and thickness of 500 µm were used. Standard silicon cleaning steps were followed prior to the high-temperature diffusion process. To ensure a high ﬁgure of merit and the release of nanowire, silicon wafers were heavily doped by boron. The two-step boron diffusion was applied to obtain a ◦ heavily boron-doped layer. Pre-diffusion at 1050 C lasting for two minutes with a solid-state B2O3 ◦ impurity source placed on both sides of the silicon wafer, and the drive-in diffusion under N2 at 1175 C lasting for three minutes without an impurity source, were typically used (Figure1a). During the pre-diffusion, solid-state B2O3 plates were placed on both sides of the silicon wafer, while the B2O3 plates were moved out for the drive-in diffusion. Several silicon wafers were placed on a quartz boat, with equal numbers of B2O3 plates laid in parallel in between. The distance between a wafer and a B2O3 plate was approximately 5 mm, in order to improve uniformity. The four-probe method was employed to measure the sheet resistance of the p-type-doped layer, which was 4.7 Ω/, indicating Nanomaterials 2018, 8, 77 3 of 11

× 20 −3 that theNanomaterials surface 2018 impurity, 8, x FOR PEER concentration REVIEW was approximately 3.22 10 cm , which3 sufficientlyof 10 enabled self-etch-stop in TMAH solutions. Then, the silicon nanowire was defined with electron beam lithographyindicating (EBL) that by the a Raith150-Turnkey surface impurity concentration equipment (Dortmund,was approximately Germany) 3.22 using× 1020 electroncm−3, which beam (EB) resist ZEPsufficiently 520 (Zeon enabled Corporation, self-etch-stop Tokyo, in TMAH Japan). solutions. To Then, obtain the a silicon steep nanowire side wall, was inductively defined with coupled electron beam lithography (EBL) by a Raith150-Turnkey equipment (Dortmund, Germany) using plasma (ICP) etching by a Plasma-Therm VERSALINE DSE system (St. Petersburg, FL, USA) was electron beam (EB) resist ZEP 520 (Zeon Corporation, Tokyo, Japan). To obtain a steep side wall, employed,inductively with an coupled etching plasma depth deeper(ICP) etching than that by ofa thePlasma-Therm heavily boron-doped VERSALINE layer DSE (Figuresystem 1(St.b). The EB resist ZEPPetersburg, 520 was FL, removed USA) was by employed, acetone andwith thenan etchin thoroughlyg depth deeper rinsed than in deionizedthat of the heavily water. boron- Subsequently, wet etchdoped was layer carried (Figure out 1b). with The 5 EB wt resist % TMAH ZEP 520 to was remove removed the by lightly acetone doped and then silicon, thoroughly which rinsed is beneath the heavilyin deionized doped water. surface Subsequently, (Figure1c). wet For etch the was fabrication carried out with of the 5 wt thermoelectric % TMAH to remove structure, the lightly a layer of doped silicon, which is beneath the heavily doped surface (Figure 1c). For the fabrication of the silicon dioxide (SiO2) with thickness of 300 nm was grown by wet oxidation to isolate the substrate thermoelectric structure, a layer of silicon dioxide (SiO2) with thickness of 300 nm was grown by wet and metaloxidation electrodes. to isolate Photolithography the substrate and metal was electr usedodes. to define Photolithography the pattern was of used heating to define resistance the and electrodes.pattern Electron of heating beam resistance evaporation and electrodes. was used Electron to deposit beam evaporation a stack of Cr was (15 used nm) to anddeposit Pt (30a stack nm) on the surface,of in Cr which (15 nm) Cr and acted Pt (30 as nm) adhesion on the layer,surface, and in which Pt acted Cr acted as heating as adhesion layer layer, to generate and Pt acted a temperature as gradientheating along layer the to nanowire. generate a Meanwhile,temperature gradient the Pt layeralong wasthe nanowire. also used Meanwhile, as the temperature the Pt layer was calibration resistance.also Contactused as the metallization temperature calibration and electrodes resistance. were Contact then implementedmetallization and with electrodes 500-nm-thick were then Al metal. implemented with 500-nm-thick Al metal. A 2-μm-deep trench was etched to ensure electrical A 2-µm-deep trench was etched to ensure electrical isolation of the nanowire from the substrate. isolation of the nanowire from the substrate.

(a) (b)

Figure 1. (a) Heavily boron-doped diffusion layer formed on the surface; (b) nanowire structure Figure 1. (a) Heavily boron-doped diffusion layer formed on the surface; (b) nanowire structure patterned by EBL and anisotropic ICP etching; (c) suspended Si nanowire released using TMAH patternedsolution; by EBL (d) schematic and anisotropic diagram of ICP a thermoelec etching;tric (c structure) suspended using Si Si nanowire. nanowire released using TMAH solution; (d) schematic diagram of a thermoelectric structure using Si nanowire. 3. Results and Discussion 3. Results and Discussion 3.1. Diffusion Depth of Boron 3.1. DiffusionIn Depthorder to of obtain Boron a boron-doped layer with high quality, two-step boron diffusion was applied. A series of experiments was carried out at different diffusion temperatures and for different lengths Inof order time. to After obtain optimizing a boron-doped the parameters, layer with a homogenous high quality, and two-step flat interface boron was diffusion obtained. wasPre- applied. A seriesdiffusion of experiments and re-diffusion was carried steps were out conducted at different at constant diffusion temperature temperatures in a diffusion and for furnace, different where lengths of time. AfterN2 was optimizing constantly introduced the parameters, to prevent a homogenous it from contamination. and ﬂat interface was obtained. Pre-diffusion and re-diffusionTo measure steps the were thickness conducted of the atheavily constant boron- temperaturedoped layer, inthe a boron diffusion etch-stop furnace, technique where in N2 was 19 constantlyTMAH introduced solutions was to prevent utilized, itwhere from the contamination. etch rate of heavily boron-doped silicon (more than 4 × 10 cm−3) was much lower than that of the lightly doped layer. An etch rate of 0.01 μm/min was observed To measure the thickness of the heavily boron-doped layer, the boron etch-stop technique in TMAH for a boron concentration of 2.5 × 1020 cm−3, while it was about 1 μm/min for a concentration lower 19 −3 solutionsthan was 1 × utilized,1019 cm–3. The where etching the selectivity etch rate reached of heavily as high boron-doped as 1:100 [23,24]. silicon After (beingmore dipped than 4 in× 5 10wt cm ) was much% TMAH lower at than 90 °C that for of30 themin, lightly the heavily doped boron-do layer.ped An layer etch was rate exposed, of 0.01 asµm/min shown in was Figure observed 2. for a boronAccording concentration to the scanning of 2.5 × electron1020 cm microscopy−3, while (SEM) it was image, about for the 1 µ samplem/min with for two a concentration minutes’ pre- lower than 1 ×diffusion1019 cm at –31050. The°C and etching three minutes’ selectivity drive-in reached diffusion as at high 1175 as°C under 1:100 N [232 ambient,,24]. After the thickness being dipped in 5 wtof % the TMAH heavily atboron-doped 90 ◦C for layer 30 min, was approximately the heavily boron-doped800 nm. Figure layer2 shows was that exposed, the film surface as shown in was quite flat, and the thickness was quite even. Figure2. AccordingThe average to thesheet scanning resistance electron of the p-type-doped microscopy layer (SEM) was image,4.7 Ω/□, for measured the sample by the with four-probe two minutes’ ◦ ◦ pre-diffusionmethod. at In 1050 addition,C and the three corresponding minutes’ drive-in impurity diffusion concentration at 1175 was Capproximately under N2 ambient, 1 × 1020 thecm− thickness3, of the heavily boron-doped layer was approximately 800 nm. Figure2 shows that the film surface was quite flat, and the thickness was quite even. The average sheet resistance of the p-type-doped layer was 4.7 Ω/, measured by the four-probe method. In addition, the corresponding impurity concentration was approximately 1 × 1020 cm−3, Nanomaterials 2018, 8, 77 4 of 11 Nanomaterials 2018, 8, x FOR PEER REVIEW 4 of 10 Nanomaterials 2018, 8, x FOR PEER REVIEW 4 of 10 which satisﬁedsatisfied the requirement for etch-stop selectivity of the boron-doped layer. Actually, in the subsequentwhich satisfied procedures,procedures, the requirement itit turned turned outfor out thatetch-stop that only only aselectivity 20-nm-thicka 20-nm-thick of layerthe layer boron-doped of heavilyof heavily boron-doped layer. boron-doped Actually, silicon silicon in was the wasetchedsubsequent etched by TMAH. byprocedures, TMAH. it turned out that only a 20-nm-thick layer of heavily boron-doped silicon was etched by TMAH.

Figure 2. SEM image of the heavily boron-doped layer after TMAH etching, the thickness is about 800 Figure 2. SEM image of the heavily boron-doped layer after TMAH etching, the thickness is about nm.Figure 2. SEM image of the heavily boron-doped layer after TMAH etching, the thickness is about 800 800nm. nm. 3.2. Electron Beam Lithography and ICP 3.2.3.2. Electron Beam Lithography andand ICPICP In order to obtain a feature size below 100 nm, EB resist ZEP 520 was employed as the etch mask In order to obtain a feature size below 100 nm, EB resist ZEP 520 was employed as the etch mask for ICP.In orderElectron to obtain beam lithographya feature size is below suitable 100 for nm, nanoscale EB resist fabrication ZEP 520 was because employed of its excellentas the etch control mask for ICP. Electron beam lithography is suitable for nanoscale fabrication because of its excellent control precision.for ICP. Electron ZEP 520 beam is a commonlithography commercialized is suitable for positi nanoscaleve electron fabrication beam because resist with of its the excellent advantages control of precision. ZEP 520 is a common commercialized positive electron beam resist with the advantages highprecision. resolution, ZEP 520 vertical is a common side wall commercialized and good etch resistance.positive electron In order beam to obtain resist nanowireswith the advantages with a good of of high resolution, vertical side wall and good etch resistance. In order to obtain nanowires with a appearance,high resolution, a group vertical of experimentsside wall and was good carried etch resistance. out to optimize In order EBL to obtainparameters nanowires such aswith the a resistgood good appearance, a group of experiments was carried out to optimize EBL parameters such as the thickness,appearance, the a exposuregroup of experimentsdose and the was line carried width. out The to resistoptimize was EBL spun parameters on the Si suchsubstrate as the with resist a resist thickness, the exposure dose and the line width. The resist was spun on the Si substrate with thicknessthickness, about the exposure 500 nm. Thedose prebake and the was line done width. under The 180 resist °C for was three spun minutes. on the Then,Si substrate different with wire a a thickness about 500 nm. The prebake was done under 180 ◦C for three minutes. Then, different widthsthickness were about tried, 500 as nm. well The as prebake different was doses done of under the electron 180 °C beam.for three According minutes. toThen, the differentdesign of wire the wire widths were tried, as well as different doses of the electron beam. According to the design of nanowire,widths were the tried, rectangular as well regions as different on both doses sides of ofthe the electron nanowire beam. were According exposed andto the developed. design of The the the nanowire, the rectangular regions on both sides of the nanowire were exposed and developed. nanowirenanowire, was the rectangularlocated in the regions middle on and both coated sides withof the resist. nanowire Figure were 3a showsexposed the and details developed. of the EBLThe The nanowire was located in the middle and coated with resist. Figure3a shows the details of the EBL patternednanowire nanowirewas located under in the high middle magnification, and coated wher withe resist.the wire Figure is about 3a shows 90 nm the in details diameter, of the with EBL a patterned nanowire under high magniﬁcation, where the wire is about 90 nm in diameter, with a good goodpatterned line shapenanowire and undersmooth high surface. magnification, These features wher indicatee the wire that is theabout quality 90 nm of inthe diameter, pattern is with good a line shape and smooth surface. These features indicate that the quality of the pattern is good enough enoughgood line for shape the following and smooth nanowire surface. fabrication These features steps su indicatech as the that ICP the etching, quality where of the the pattern resist willis good act for the following nanowire fabrication steps such as the ICP etching, where the resist will act as an asenough an etch for mask. the following nanowire fabrication steps such as the ICP etching, where the resist will act etchas an mask. etch mask.

(a) (b) (a) (b) Figure 3. (a) Etch mask after the EBL; (b) nanowall after the ICP etching. Figure 3. (a) Etch mask after thethe EBL;EBL; ((b)) nanowallnanowall afterafter thethe ICPICP etching.etching. Following the etch mask made by EBL, ICP etching was carried out in order to expose the Following the etch mask made by EBL, ICP etching was carried out in order to expose the substrate area under the boron diffused layer. ICP etching parameters with C4F8/SF6 of 40/30 sccm, andsubstrate the Radio area Frequencyunder the (RF)boron power diffused of 800 layer. W were ICP optimizedetching parameters to obtain awith smooth C4F 8sidewall/SF6 of 40/30 and smallsccm, undercut.and the Radio The Frequencyfinal etch depth (RF) power was about of 800 1.6 W μ werem, which optimized exceeded to obtain the depth a smooth of heavily sidewall doped and smalllayer undercut. The final etch depth was about 1.6 μm, which exceeded the depth of heavily doped layer

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Following the etch mask made by EBL, ICP etching was carried out in order to expose the substrate area under the boron diffused layer. ICP etching parameters with C4F8/SF6 of 40/30 sccm, and the Radio Frequency (RF) power of 800 W were optimized to obtain a smooth sidewall and Nanomaterials 2018, 8, x FOR PEER REVIEW 5 of 10 small undercut. The final etch depth was about 1.6 µm, which exceeded the depth of heavily doped atlayer 800 atnm. 800 However, nm. However, during duringthe experiments, the experiments, the nanowall the nanowall sometimes sometimes collapsed collapsed when the when coated the resistcoated was resist 100 was nm 100 or nmless or in less width. in width. One reason One reason was that was thatelectron electron beam beam resist resist was was overexposed overexposed to ensureto ensure a thorough a thorough exposure, exposure, so the so resist the resist was wasnarrower narrower than thanthe layout the layout geometry. geometry. The other The came other fromcame the from ICP the process ICP process followed. followed. The Theedge edge of the of theresist resist was was etched etched first, first, resulting resulting in in narrower narrower nanowires.nanowires. Lateral Lateral undercut undercut also also reduced reduced the the width width of of nanowire. nanowire. Therefore, Therefore, these these elements elements required required anan appropriate appropriate layout layout design design from from the the beginning beginning to to avoid avoid the the width width consumption consumption when when etching etching the the nanowire.nanowire. With With a a modified modified 900 900 nm nm layout layout geometry, geometry, a a steep steep nanowall nanowall with with a a width width of of 670 670 nm nm was was successfullysuccessfully fabricated, fabricated, as as shown shown in in Figure Figure 33b.b. It shows that the ICP process produced a very smooth surfacesurface of of the the sidewall. sidewall. BasedBased on on plenty plenty of of experiments, experiments, we we the the change change of of nanowire nanowire width width can can be be observed observed in in Figure Figure 4.4. DataData in in samples samples A A to to F F were were obtained obtained from from our our expe experiments,riments, indicating indicating that that the the ICP-etched ICP-etched nanowalls nanowalls areare approximately approximately 200 200 nm nm narrower narrower than than the the layo layoutut geometry, geometry, which which provides provides a a reference reference for for manufacturingmanufacturing size-controllable size-controllable nanowires.

FigureFigure 4. 4. TheThe comparison comparison between between the the designed designed layout layout size size andand the thenanowire nanowire width width after afterthe ICP the etching.ICP etching.

3.3. Suspending of the Nanowire 3.3. Suspending of the Nanowire The bottom part of the nanowall has to be removed to obtain a suspended nanowire. After the The bottom part of the nanowall has to be removed to obtain a suspended nanowire. After the ICP etching, the silicon nanowall structure was dipped into TMAH etching solution, which was able ICP etching, the silicon nanowall structure was dipped into TMAH etching solution, which was able to to etch the whole silicon wafer except the heavily boron-doped layer. This etch-stop technique etch the whole silicon wafer except the heavily boron-doped layer. This etch-stop technique deﬁnitely definitely lowered the difficulty of making a suspended structure. According to Thong J.T.L. et al., lowered the difﬁculty of making a suspended structure. According to Thong J.T.L. et al., the etch rate the etch rate of a low-doped silicon wafer with (100)-orientation in 25 wt % TMAH reaches 1 μm/min of a low-doped silicon wafer with (100)-orientation in 25 wt % TMAH reaches 1 µm/min at 80 ◦C, at 80 °C, while it falls sharply for heavily doped silicon with a concentration greater than 4 × 1019 cm−3 while it falls sharply for heavily doped silicon with a concentration greater than 4 × 1019 cm−3 [25]. [25]. When the boron-doping level reaches 1 × 1020 cm−3, the etching rate decreases to 10 nm/min for When the boron-doping level reaches 1 × 1020 cm−3, the etching rate decreases to 10 nm/min for (100) (100) facet, while the etch selectivity is up to 100 [23]. Hereby, for a 1020-nm-wide nanowall, it only facet, while the etch selectivity is up to 100 [23]. Hereby, for a 1020-nm-wide nanowall, it only takes takes about six seconds to etch through the bottom part. In fact, during our experiments, samples about six seconds to etch through the bottom part. In fact, during our experiments, samples were were etched in TMAH at 80 °C for three minutes to ensure the nanowire was able to be totally etched in TMAH at 80 ◦C for three minutes to ensure the nanowire was able to be totally suspended. suspended. Figure 5a–c shows the released nanowall with different sizes. Figure 5a is a 7 μm long Figure5a–c shows the released nanowall with different sizes. Figure5a is a 7 µm long suspended suspended structure, which shows a good uniformity, with 280 nm in height and 55 nm in width, as structure, which shows a good uniformity, with 280 nm in height and 55 nm in width, as illustrated in illustrated in Figure 5b. Experiments with 2- and 5-μm-long nanostructures were also successful, which indicates that nanowire structures with different lengths can be obtained by using the heavily boron-doped layer and its etch-stop character. For further demonstration, several parallel nanowire structures with the same length of 7 μm were released simultaneously. The result is shown in Figure 5c, where each nanowire shows almost the same etch effect such as the width and the height. Therefore, in the proposed method, nanostructures with regular shape and controllable size can be obtained. When this nanostructure is released in TMAH etch solution to obtain a suspended wire,

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Figure5b. Experiments with 2- and 5- µm-long nanostructures were also successful, which indicates that nanowire structures with different lengths can be obtained by using the heavily boron-doped layer and its etch-stop character. For further demonstration, several parallel nanowire structures with the same length of 7 µm were released simultaneously. The result is shown in Figure5c, where each nanowire shows almost the same etch effect such as the width and the height. Therefore, in the Nanomaterials 2018, 8, x FOR PEER REVIEW 6 of 10 proposed method, nanostructures with regular shape and controllable size can be obtained. When this nanostructure is released in TMAH etch solution to obtain a suspended wire, the surface of the the surface of the nanowire remains quite uniform. The height of the nanowire here is about 280 nm, nanowire remains quite uniform. The height of the nanowire here is about 280 nm, which is a much which is a much larger value than the width, at 55 nm. However, it is reasonable to assume that a larger value than the width, at 55 nm. However, it is reasonable to assume that a lower value could be lower value could be obtained by shrinking the boron-doped layer thickness, which is our ongoing obtained by shrinking the boron-doped layer thickness, which is our ongoing research work. research work.

(a) (b)

(c)

Figure 5. (a) Released nanowire structure with a length about 7 μm; (b) detail of the nanowire, the Figure 5. (a) Released nanowire structure with a length about 7 µm; (b) detail of the nanowire, height is about 280 nm and width is about 55 nm; (c) simultaneously released nanowire array. the height is about 280 nm and width is about 55 nm; (c) simultaneously released nanowire array.

3.4. Fabrication of the Thermoelectric Device 3.4. Fabrication of the Thermoelectric Device After the nanowire structure was completed, bimetal filaments consisting of Cr/Pt were After the nanowire structure was completed, bimetal filaments consisting of Cr/Pt were deposited deposited on top of the sample as dual-purpose heaters/thermometers. Because platinum is sensitive on top of the sample as dual-purpose heaters/thermometers. Because platinum is sensitive to to temperature change and exhibits a consistent temperature coefficient of resistance (TCR) within a temperature change and exhibits a consistent temperature coefficient of resistance (TCR) within certain temperature range, it was used as a heating and sensing filament. Due to the poor adhesion a certain temperature range, it was used as a heating and sensing filament. Due to the poor adhesion between Pt and silicon dioxide, a 15-nm-thick chromium layer was deposited firstly to enhance the between Pt and silicon dioxide, a 15-nm-thick chromium layer was deposited firstly to enhance the adherence. The following procedure was depositing aluminum (Al) electrodes to make necessary adherence. The following procedure was depositing aluminum (Al) electrodes to make necessary electrical connections. Negative photoresist DNR-L300 is suitable for the metal lift-off process, electrical connections. Negative photoresist DNR-L300 is suitable for the metal lift-off process, because it can produce reversed trapezoid patterns, which is helpful for the lift-off of 500 nm Al. After the exposure and the development, a thin layer of photoresist probably still remained at the deposition area, which could cause the metal to peel off. To avoid this, samples were also dipped in 10% HCl for 10 s to remove the residual photoresist. Then the metal pads were thickened for wire bonding. Before electrical measurements were performed, 2-μm-deep trenches were etched to ensure electrical isolation of the nanowire from the substrate. Images of the device are shown in Figure 6. Figure 6a presents a SEM image of the finished device structure, which includes connecting wires and two bimetal filaments deposited at both ends of the nanowire. Figure 6b shows the nanowire suspended between Pt serpentine resistances, with

Nanomaterials 2018, 8, 77 7 of 11 because it can produce reversed trapezoid patterns, which is helpful for the lift-off of 500 nm Al. After the exposure and the development, a thin layer of photoresist probably still remained at the deposition area, which could cause the metal to peel off. To avoid this, samples were also dipped in 10% HCl for 10 s to remove the residual photoresist. Then the metal pads were thickened for wire bonding. Before electrical measurements were performed, 2-µm-deep trenches were etched to ensure electrical isolation of the nanowire from the substrate. Images of the device are shown in Figure6. Figure6a presents a SEM image of the finished device structure, which includes connecting wires and two bimetal filaments deposited at both ends of Nanomaterials 2018, 8, x FOR PEER REVIEW 7 of 10 the nanowire. Figure6b shows the nanowire suspended between Pt serpentine resistances, with the thetwo two ends ends connected connected via via Al Al metal metal electrodes, electrodes, prior prior to to the the isolation isolation trench trench etching etching process.process. Al metal electrodes were used for I--V measurements.measurements. It It can can be be seen seen that that Pt Pt filaments filaments are are smooth smooth and and uniform. uniform. µ × µ 2 The line width of Pt filamentfilament is about 33 μm,m, andand thethe occupiedoccupied areaarea isis aboutabout 7070 × 90 μm2.. The The isolation isolation trenchtrench is clearly shown in Figure 6 6a.a.

(a) (b)

Figure 6. (a) SEM image of the device; (b) Nanowire suspended between two Pt serpentine resistances Figure 6. (a) SEM image of the device; (b) Nanowire suspended between two Pt serpentine resistances with Al metal electrodes.

3.5. Characterization of the Thermoelectric Device 3.5. Characterization of the Thermoelectric Device In this work, a 7.66 μm long nanowire with the height of 685 nm and width of 408 nm was In this work, a 7.66 µm long nanowire with the height of 685 nm and width of 408 nm was selected selected for the demo thermoelectric device structure. It has been known that ZT value is the most for the demo thermoelectric device structure. It has been known that ZT value is the most important important parameter to indicate the efficiency of a thermoelectric device, with parameter to indicate the efficiency of a thermoelectric device, with 2σ = S ZTTS2σ (1) ZT = k T (1) k Where S is the Seebeck coefficient, σ is the electrical conductivity, k is the thermal conductivity S σ k andwhere T is theis the temperature. Seebeck coefficient, To understandis the the electrical thermoelec conductivity,tric performanceis the of thermal this device, conductivity the electrical and T conductivity,is the temperature. Seebeck coefficient To understand and thermal the thermoelectric conductivity performance have to be measured of this device, separately. the electrical In our conductivity, Seebeck coefficient and thermal conductivity have to be measured separately. In our work, all the measurements were carried out under vacuum conditions up to 10−2 Pa, and the −2 environmentwork, all the temperature measurements was were kept at carried room outtemperature, under vacuum 295.1 K. conditions up to 10 Pa, and the environmentThe nanowire temperature was connected was kept to at a roomKeithley temperature, 2450 source 295.1 meter K. (Beaverton, OR, USA) to measure the IThe-V characteristics nanowire was connectedusing the tofour-wire a Keithley method, 2450 source which meter eliminated (Beaverton, the OR, lead USA) and to measurethe contact the I V resistance- characteristics [26]. The using measured the four-wire resistance method, by fitting which the eliminated I-V curve theof the lead sample and the was contact 357.14 resistance Ω. Since [the26]. I V resistanceThe measured is defined resistance as by fitting the - curve of the sample was 357.14 Ω. Since the resistance is defined as L R = σL (2) R = Sa (2) σSa Here, L represents the length of nanowire, σ the electrical conductivity and Sa the cross-sectional area of nanowire. By substituting the measured data to equation (2), the calculated electrical conductivity σ is 7.67 × 105 S/m, which means the resistivity is 1.30 × 10−3 Ω·cm. So the corresponding doping concentration is 8.92 × 1020 cm−3. As we already know, the resistivity calculated from the sheet resistance 4.7 Ω/□ is about 3.22 × 10−4 Ω·cm. For the nanowire, the resistivity from the I-V curve is larger than that from the sheet resistance of the boron-doped layer. One possible reason is that the surface roughness of the nanowire exists although it is very small. The other reason comes from the oxidation of the nanowire surface during the process. Before the Pt serpentine resistances and Al metal electrodes were deposited, a 300-nm-thick silicon dioxide layer was grown on the sample surface by the wet oxidation process, which consumed 132 nm of boron-doped silicon. In addition,

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Here, L represents the length of nanowire, σ the electrical conductivity and Sa the cross-sectional area of nanowire. By substituting the measured data to equation (2), the calculated electrical conductivity σ is 7.67 × 105 S/m, which means the resistivity is 1.30 × 10−3 Ω·cm. So the corresponding doping concentration is 8.92 × 1020 cm−3. As we already know, the resistivity calculated from the sheet −4 resistance 4.7 Ω/ is about 3.22 × 10 Ω·cm. For the nanowire, the resistivity from the I-V curve is larger than that from the sheet resistance of the boron-doped layer. One possible reason is that the surface roughness of the nanowire exists although it is very small. The other reason comes from the oxidation of the nanowire surface during the process. Before the Pt serpentine resistances and Al metal Nanomaterialselectrodes 2018 were, 8, deposited, x FOR PEER aREVIEW 300-nm-thick silicon dioxide layer was grown on the sample surface8 of by10 the wet oxidation process, which consumed 132 nm of boron-doped silicon. In addition, the surface of thethe surface silicon wasof the etched silicon by was TMAH etched solutions. by TMAH Using solutions. an etch rateUsing of 0.01an etchµm/min rate of and 0.01 anμ etchingm/min and time an of etching10 min, time about of a 10 100-nm-thick min, about a area 100-n ofm-thick silicon was area removed. of silicon was removed. TheThe Seebeck Seebeck effect causescauses aa thermoelectric thermoelectric voltage voltage by by the the temperature temperature difference difference between between the twothe twoends ends of the of material.the material. The The Seebeck Seebeck coefficient coefficientS is definedS is defined as as ΔV S =∆V (3) S = ΔT (3) ∆T InIn Equation Equation (3), (3), ∆ΔTT is is the the temperature temperature difference difference and and∆V isΔV the is Seebeck the Seebeck voltage. voltage.S is in S the is unitin the of unitµV/K. of μ ItV/K. was It measured was measured as follows. as follo Therews. There were twowere bimetal two bimetal filaments filaments deposited deposited at both at endsboth ofends the ofnanowire, the nanowire, one served one served as heating as heating resistor resistor and the and other the served other served as a thermometer as a thermometer [27]. Constant [27]. Constant current currentwas applied was applied on the resistor on the toresistor generate to generate the heat. the Part heat. of the Part heat of wasthe heat transmitted was transmitted to the other to endthe other of the endnanowire, of the nanowire, causing a temperature causing a temperature difference ( ∆differenceT), which ( wasΔT ), indicated which was by theindicated change by in the resistance change [ 28in]. resistanceMeanwhile, [28]. a SeebeckMeanwhile, voltage a Seebeck (∆V) was voltage induced ( ΔV [29) was,30], induced which was [29,30], measured which bywas a Keithleymeasured 2182A by a Keithleymeter (Beaverton, 2182A meter OR, USA).(Beaverton, The measurement OR, USA). was The conducted measurement at constant was temperatureconducted at to eliminateconstant temperaturethe influence to of eliminate temperature the variationinfluence of of the temperature atmosphere. variation Figure7 ofshows the atmosphere. the temperature Figure dependence 7 shows theof thetemperature Seebeckvoltage. dependence By fitting of the theSeebeck data, voltage. the Seebeck By fitting coefficient the data, is 69.12 the µSeebeckV/K. As coefficient reported is in 69.12Ref [ 14μV/K.], for As a Si reported nanowire in with Ref 50[14], nm for in a diameter Si nanowire and dopingwith 50 concentration nm in diameter of 1 ×and10 20dopingcm−3 , concentrationthe Seebeck coefficient of 1 × 1020 reachescm−3, the 100~120 Seebeckµ coefficientV/K, which reaches is approximately 100~120 μV/K, two which times is larger. approximately The main tworeason times for larger. this is probablyThe main that reason the for diameter this is ofprobab the nanowirely that the is notdiameter small of enough the nanowire to produce is not quantum small enoughconfinement to produce effects, quantum which have confinement an obvious effects, influence which on have the Seebeckan obvious coefficient. influence Another on the reasonSeebeck is coefficient.that the temperature Another reason difference is that between the temperatur the two Pte filamentsdifference is between larger than the that two of Pt the filaments nanowire, is larger which thanresults that in of smaller the nanowire, Seebeck which coefficient. results in smaller Seebeck coefficient.

FigureFigure 7. 7. SeebeckSeebeck voltage voltage as as a a function function of of temperature temperature difference. difference.

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Thermal conductivity was measured by the 3ω method, which is a typical approach for characterizing the thermal conductivity of one dimensional nanostructural materials [27,31]. Details of the measurement will be reported elsewhere. For the nanowire in this work, the calculated thermal conductivity is 43.37 Wm−1·K−1, which is obviously lower than bulk silicon (~150 Wm−1·K−1). As we already know, if the nanostructure has one or more dimensions smaller than the mean free path (MFP) of phonons but larger than that of electrons, the thermal conductivity would show a significant decline due to boundary scattering. The mean free paths of electrons and phonons at room temperature are 110 and ~300 nm, respectively. However, both the length and thickness of our specimen are larger than 300 nm, which might contribute little to the reduction of thermal conductivity. For doped nanowires, phonon-impurity scattering might also cause a reduction of thermal conductivity. When the doping concentration is one order of magnitude larger, only a small decrease of κ is observed [15]. If the doping level is 4 orders of magnitude larger, as in our case, a higher rate of phonon-impurity scattering may occur and result in a significant reduction in κ. In addition, for silicon nanowires fabricated by etching methods, the roughness at the nanowire surface is nonnegligible, since surface roughness would also introduce an extra form of scattering. This may also contribute to the reduction of the thermal conductivity. Using Equation (1), the ZT of the demonstrated thermoelectric device is calculated to be about 2.49 × 10−3. This value is lower even than that of heavily boron-doped bulk silicon as reported, where the ZT value is about 0.01 [32]. By carefully analyzing our thermoelectric device structure and results, we found that the lower ZT value is mainly caused by the smaller Seebeck coefficient and larger thermal conductivity. Our measured Seebeck coefficient is about 3 times lower than other works [14]. As stated above, with reduced nanowire diameter and thickness, it is possible to produce quantum confinement effects [33], leading to a larger Seebeck coefficient. Meanwhile, multiple scattering mechanisms would lead to a smaller thermal conductivity for nanowires with smaller cross-sectional areas. The inaccuracy in temperature gradient measurement may also result in a lower ZT. The actual temperature gradient along the nanowire may be much smaller than the value measured by the Pt serpentine filaments, because the heat dissipates into the substrate when transmitting through the nanowire. Therefore, the ZT is likely to rise even higher by reducing the nanowire cross-sectional area and measuring the heat loss accurately.

4. Conclusions In this paper, a top-down process using heavy boron-doping has been demonstrated for fabricate silicon nanowire and thermoelectric devices. The nanowire was defined by electron beam lithography and fabricated with ICP etching. TMAH etching was a critical step to suspending the nanowire from the substrate, and a 7-µm-long nanowire structure with a height of 280 nm and a width of 55 nm was obtained. Multiple measurements were carried out to characterize the electrical conductivity σ, the Seebeck coefficient S, and the thermal conductivity κ of the device. The ZT was calculated to be 2.49 × 10−3, resulting from a small S and large κ. By reducing the nanowire cross-sectional area, the thermal conductivity is likely to reduce significantly; thus, a larger ZT could be expected.

Acknowledgments: The authors greatly acknowledge the support from the National Natural Science Foundation of China (NSFC) (Grant Nos. 61474115, 61504138 and 61274066). Author Contributions: Yang Liu and Mingliang Zhang conceived and designed the experiments; Yang Liu and Lingxiao Deng performed the experiments; Lingxiao Deng and Zhe Ma analyzed the data; Shuyuan Zhang and Peishuai Song analyzed data and revised the manuscript; Jing Ma helped performing the analysis and discussion; An Ji and Qing Liu contributed to the etching processes; Xiaodong Wang and Zhe Ma wrote the paper; Xiaodong Wang and Fuhua Yang guided the project. All of the authors have discussed the results and approved the submitted version. Conﬂicts of Interest: The authors declare no conﬂict of interest. Nanomaterials 2018, 8, 77 10 of 11

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