USOO8903701 B2
(12) United States Patent (10) Patent No.: US 8,903,701 B2 Son et al. (45) Date of Patent: Dec. 2, 2014
(54) METHOD FOR STRUCTURING HARDWARE USPC ...... 703/13, 20, 22; 717/104; 704/270 INFORMATION BY USING AN MOF-BASED See application file for complete search history. HCML (56) References Cited (75) Inventors: Hyun-seung Son, Dangjin-si (KR): Woo-yeol Kim, Suwon-si (KR): U.S. PATENT DOCUMENTS Robertyoungchul Kim, Yongin-si (KR) 7,823,120 B2 * 10/2010 Kazakov et al...... T17,104 (73) Assignee: Hongik University Industry-Academic 8,370,156 B1* 2/2013 Torgerson et al...... TO4,270 8,418,125 B2 * 4/2013 Hawkins et al...... T17,104 Cooperation Foundation, Seoul (KR) 8,578,324 B2 * 1 1/2013 Hartman et al. ... 717,104 2010.0058276 A1* 3, 2010 Felder et al...... 716/17 (*) Notice: Subject to any disclaimer, the term of this 2010/0083210 A1* 4/2010 Megen et al...... T17/100 patent is extended or adjusted under 35 2010, 0083212 A1* 4/2010 Fritzsche et al. ... T17,104 U.S.C. 154(b) by 285 days. 2010, 0138808 A1* 6, 2010 Kim et al...... T17,104 * cited by examiner (21) Appl. No.: 13/446,333 Primary Examiner — Kandasamy Thangavelu (22) Filed: Apr. 13, 2012 (74) Attorney, Agent, or Firm — Davis & Bujold, PLLC; Michael J. Bujold (65) Prior Publication Data US 2013/O117OO3 A1 May 9, 2013 (57) ABSTRACT Provided is a method for structuring hardware information in (30) Foreign Application Priority Data computer system, including: modeling Target Independent Model (TIM), which is independent from a hardware; struc Nov. 4, 2011 (KR) ...... 10-2011-O114744 turing hardware information based on Meta Object Facility (MOF)-Hardware Component Modeling Language (51) Int. Cl. (HCML); and transforming the TIM into a Target Specifica G06F 9/44 (2006.01) tion Model, which depends on the hardware, based on the G06F 17/50 (2006.01) structured hardware information and the model transforma (52) U.S. Cl. tion language, wherein the step of structuring hardware infor CPC ...... G06F 17/5045 (2013.01); G06F 17/5068 mation based on Meta Object Facility (MOF)-Hardware (2013.01) Component Modeling Language (HCML), comprises: defin USPC ...... 703/20; 703/13 ing a MOF-based Hardware Component Modeling Language (58) Field of Classification Search (HCML) meta-model; and defining a model by using a meta CPC ...... A63F 9/24: A63F 13/00; G05B 19/042: model of the HCML and representing architecture informa G06F 9/02; G06F 9/30; G06F 9/44; G06F tion on the model. 17/50: G06F 9/45; G06F 9/455; G06K9/00; G1. OL 21 FOO 7 Claims, 15 Drawing Sheets
| Target Independent i Model
victor.
query Model Transformation : language
Target Specification
HW Component Profile U.S. Patent Dec. 2, 2014 Sheet 1 of 15 US 8,903,701 B2
F.G. 1
meta-metamodel Haid-fired Meta-inefamodel
- - -m reme ran - r------MetaModel (“Record Types", MetaClass ("Record. MetaAtti' (name, String), 1netaillode MetaAttr ("fields", List : “Field”: ) MetaClass (Field'. ...)
Record ("StockQuote". Field (“company. String) model Field (“price", FixedPoint))) StockQuote ('Sunbeam Harvesters', 98,77) StockQuote ("Ace Taxi Cab Ltd. 12.32) \ information U.S. Patent Dec. 2, 2014 Sheet 2 of 15 US 8,903,701 B2
FIG 2
Target Independent Model
query
Model Transformation language
Target Specification 3:... Model
HW Component Profile U.S. Patent Dec. 2, 2014 Sheet 3 of 15 US 8,903,701 B2
Hardware Component Alodic
Hardware Component Package
direction () ( )ir cct () in Hardwarc Conpoincint lanc Hardware Resource name: String
Hardware Component InfoSelectionOSC lectic) In formation << Cillcrat IOI) >> name:String Port Direction name: String value: String l. . << cnumeration >> Port Direction Class ( from Data Types Package)
name:St ring << enumeration >> Hardwarc
v int Crface At tributo Operation Element Propert ics (from Classes Package) (from Classes Package)
FIG. 3 U.S. Patent Dec. 2, 2014 Sheet 4 of 15 US 8,903,701 B2
FG. 4 HardwareComponent Package
HardwareComponent Resource - - - -
ElementProperties U.S. Patent Dec. 2, 2014 Sheet 5 Of 15 US 8,903,701 B2
FG.5
A timed a128
Interrupt (class = Irt
- - - - Association
-- Connector
-s assissiTTE Association End
U.S. Patent Dec. 2, 2014 Sheet 7 Of 15 US 8,903,701 B2
FIG.7
Alot Or VA
Atmegal 28
{class-Timer0,Timer mode=normal}
Motor AA
Timer
ASSR: Register TIMSK. Register TIFR: Register
SFIOR: Register
SetMode(mode: MODE) : void Set Timer O: Timer ID Kill Timer (id: Timer ID): void
Tiner() Timer1.
(mode-normal} (mode-normal}
TCCRO. Register TCCR1. Register TCNTO: Register TCNT1: Register OCRO: Register OCR1: Register Set Mode(mode: MODE) : void Set Mode(mode: MODE) : void Set Timer O: Timer ID Set Timer O: Timer ID Kil Timer (id: Timer ID): void Kill Timer (id: Timer ID): void
U.S. Patent Dec. 2, 2014 Sheet 8 of 15 US 8,903,701 B2
FIG.8B
U.S. Patent Dec. 2, 2014 Sheet 10 of 15 US 8,903,701 B2
JOSU3S
OI’0IH
(IOT U.S. Patent Dec. 2, 2014 Sheet 11 of 15 US 8,903,701 B2
Atmcga 28
Timer (class-Timci (), mode-n()imal
ASSR: Register TINISK: Register TIFR:Rogister SFOR: Register
Ki Timer (id: Timer II)) : void
Time" () Timel mode-normal (mode=normal TCCRO: Register TCCR: Regist (r TCNTO: Register TCNT1: Regist cer OCRO. Register OCR1 : Regist cer Set Mode (mode: AlO)E) : void Sct Mode (mode: MODE) : void Set Tin(I(): Tin I) Sct Tiner(): Time I) Ki Timer (id: Timer I)): void Kit Timor (id: Timer II)) : void (a) Atmoga 128
FIG. 11 A U.S. Patent Dec. 2, 2014 Sheet 12 of 15 US 8,903,701 B2
Ubicom SX48AC
Timor class-Time"
Time
makr (): Void start (vp: Timer): static void stop0 static void tick Hi (): int tick,00: int timeout (timeAIS in t) : bool can timeout (hi: int, Io; in t) : boolean timeout Sec(timeS: int) : boolean
(b) Ubicom SX48AC
FIG. 11B U.S. Patent Dec. 2, 2014 Sheet 13 of 15 US 8,903,701 B2
Atmegal 28
UART { class=UART
in it serial (): void getput ch(data:ch(): String St ring): Void
UCSROA: Register UCSROA: Register UCSR013: Register UCSROB: Register UCSROC: Register UCSROC: Register UBRROH: Register UBRROH: Register UBRROL : Regist or UBRROl: Register UDR(): Register UDRO: Register
(a) Atmegal 28
FIG. 12A U.S. Patent Dec. 2, 2014 Sheet 14 of 15 US 8,903,701 B2
Ubicom SX4SAC
Time { class=Timer
dirReceive: int dirTransmit : int. doint Invert bOO can invert : boolean specdl. 200: int speed 4400: int speed 19200 int specd2400: int stoplint stop 2: int Uart (direction: int, datclin: int, data Invert : boolean, hslin int, his Invert : boolean, baundRate: int, stop|Bits: int) receiveByte(): int scndl3yte (data: int): void scnd String (data: String void set Direction (direction int) start O. void start (): void
(b) Ubicom SX48AC
FIG. 12B U.S. Patent Dec. 2, 2014 Sheet 15 of 15 US 8,903,701 B2
y - " ------...... sys-crossssst...... sos.syr...... sea...... -- Node Type Notation Cottent
INA Rs- ?tponent port for OUT | input and output
Port receiving an IN input signal froza Port another coacre it Port for |transmitting 8 . output. signal to another co?tponent
H (Componer -u Component module for Package abstracting hardware
: Abstractised resource |H Coring Olent rSw for controliing resource ------h;a cowa.ie
Class for describing }: Ccripcinert : informatio on
Information ---- , ardware
F.G. 3 US 8,903,701 B2 1. 2 METHOD FOR STRUCTURING HARDWARE a digital circuit. The VHDL allows a broad range of design. INFORMATION BY USING AN MOF-BASED The VHDL includes a behavioral description of a system HCML level at an upper leveland a gate level at a lower level. That is, the VHDL allows behavioral description, Register Transfer RELATED APPLICATIONS Level (RTL) description and gate level description. However, since the language for describing a VHDL hardware chip is complicated itself, it requires a lot of time and efforts for a This application claims priority to Korean Patent Applica general software developer to understand and easily use the tion No. 10-2011-01 14744, filed on Nov. 4, 2011, which is language. The VHDL has an architecture, which is difficult to herein incorporated by reference in its entirety. be understood. Since the object of the VHDL is to design a 10 chip, there is a problem that a hardware control method can BACKGROUND not be described. Since embedded software (SW) is subordinated to hard 1. Field ware, there is a problem that redesigning is needed whenever The following description relates to Hardware Description hardware is changed. Model Driven Development (MDD) is Language (HDL) required for developing embedded soft 15 applied in existing studies for improving reusability of the ware (SW); and, more particularly, to Hardware Component embedded software. The MDD is a technique for developing Modeling Language (HCML) for efficiently structuring a a generally reusable hardware independent model and auto hardware profile as a method that simultaneously develops matically creating the model as a hardware specification heterogeneous embedded systems. model based on pre-defined hardware profile information. 2. Description of the Related Art A hardware profile stores information required for devel Meta Object Facility (MOF) is a meta object management oping the embedded software. The hardware profile should technique Suggested by the Object Management Group include information for connecting each of hardware compo (OMG). The MOF is represented through Unified Modeling nents as well as detailed information on which hardware Language (UML) and a meta-model of the UML is defined device a memory address and a CPU pin is connectable to, through the MOF. The MOF has a 4-layer metadata architec 25 and which register any value should be input into in order to control each of hardware. Therefore, the hardware profile ture. The layers are classified into an information layer, a plays a very important role in developing MDD-based model layer, a meta-model layer, and a meta-meta-model embedded software. A modeling/specification language for layer. The information layer includes clean data, which are efficiently representing and defining hardware profile infor desired to be described. The model layer includes metadata mation is not developed yet. Accordingly, development of a for describing data included in the information layer. The 30 hardware profile modeling/specification language is required meta-model layer includes a description for defining archi prior to efficient reuse of the embedded software. tecture and a meaning of the metadata, i.e., meta metadata. Unified Modeling Language (UML) as an integrated mod The meta-model is an “abstract language' for describing eling language is widely used for specification and designing different types of data. That is, the meta-model is a language of the embedded software. Accordingly, if hardware profile without a specific grammar or mark. The meta meta-model 35 information is defined using UML techniques, a hardware layer includes description of the meaning and the architecture independent model developed using the UML may be trans of the meta metadata. The meta meta-model layer is an formed into a hardware specification model more efficiently. “abstract language' for defining different types of metadata. Since a methodology for developing Model Driven Devel FIG. 1 shows a typical 4-layer meta modeling framework. opment (MDD)-based software allows independent software The Record Types meta-model may describe a lot of record 40 development in hardware change, studies for applying the types in a model level in the same manner as that a Stock methodology to embedded software (SW) development has Quote type describes a lot of StockQuote instances in an been actively progressed. Information of hardware to be used information level in FIG.1. Likewise, the meta-meta-model is required to maintain a profile format in order to develop level may describe a lot of different meta-models in the meta MDD-based embedded software. A language for efficiently model. 45 defining a hardware profile is also needed. The typical 4-layer metadata architecture has many advan Conventionally, there is a Hardware Description Language tages in comparison with a simple modeling method. If the (HDL) including Verilog or VHSIC Hardware Description framework is well defined and designed, it is possible to Language (VHDL) as a language for defining a hardware Support any types of model expected to be embodied and a profile. The Hardware Description Language (HDL) may be modeling paradigm, allow different types of related metadata, 50 efficiently used for designing and simulating hardware but allow an increasingly added meta-model and a new type of may not be properly applied to a complicated data process metadata, and Supportan exchange between a group using the function or a system level designing. In particular, when a meta-meta-model Such as the meta-metadata (meta-model) processor core such as System-on-a-Chip (SoC) is embedded and a predetermined metadata(model). In conclusion, since and a very complicated function is embodied as a semicon the meta-models may be standardized through the MOF. 55 ductor chip, it is difficult to design only with a conventional transformation between diverse models is possible. hardware description language. Since a language for describ Hardware Description Language (HDL) such as Verilog ing a VHDL hardware chip is complicated itself, it requires a and VHSIC Hardware Description Language (VHDL) may lot of time and efforts for a general software developer to be efficiently used for designing and simulating hardware but understand and easily use the language. The VHDL has an may not be properly applied to a complicated data process 60 architecture, which is difficult to be understood. Since the function or a system level designing. In particular, when a object of the VHDL is to design a chip, there is a problem that processor core such as System-on-a-Chip (SoC) is embedded a hardware control method cannot be described. and a very complicated function is embodied as a semicon ductor chip, it is difficult to design only with a conventional SUMMARY hardware description language. 65 VHSIC Hardware Description Language (VHDL) is a To achieve the embodiment of the present invention, a hardware description language used for design automation of Hardware Component Modeling Language (HCML) as a US 8,903,701 B2 3 4 modeling language for specifying a hardware profile used in formation of a target specification model and a target inde an MDD-based model transformation is provided. pendent model in an MDD-based heterogeneous Embedded According to the present invention, a method for structur development process. ing hardware information in a computer system, the method An additional features and advantages of the present inven may comprises: modeling Target Independent Model (TIM), tion will be provided in a following description and be par which is independent from a hardware; structuring hardware tially cleared through the above description or understood information based on Meta Object Facility (MOF)-Hardware through the realization of the present invention. The object Component Modeling Language (HCML); and transforming and other advantages of the present invention will be embod the TIM into a Target Specification Model, which depends on ied by the structure indicated in claims as well as the follow the hardware, based on the structured hardware information 10 ing description and accompanying drawings. and the model transformation language, wherein the step of structuring hardware information based on Meta Object BRIEF DESCRIPTION OF THE DRAWINGS Facility (MOF)-Hardware Component Modeling Language (HCML), comprises: defining a MOF-based Hardware Com FIG. 1 shows a typical 4-layer meta modeling framework. ponent Modeling Language (HCML) meta-model; and defin 15 FIG. 2 shows a 4-layer architecture of a HW Component ing a model by using a meta-model of the HCML and repre Profile. senting architecture information on the model. FIG.3 shows a MOF-based HW Component Profile Meta As one aspect of the present invention, the HCML meta model. model comprises: a hardware component package (HCP) for FIG. 4 shows an association between HCP and a meta abstracting a hardware component; a Port for connecting this model. first HCP to another (second) HCP to facilitating either input FIG. 5 shows an association between HCP and HCP ting or outputting a signal; a hardware component informa FIG. 6 shows an association between HCR and HCI. tion (HCI) containing hardware information; a hardware FIG. 7 shows an example of modeling using HCML. component resource (HCR) including Class and Element FIGS. 8A and 8B respective show photographs of a hexa Properties for mapping the HCI, the hardware component 25 pod sensor robot and a Javeline. resource being an abstracted model to control the hardware; FIG. 9 is an example of modeling the hexapod robot using and a Connector for connecting the Port to the Port or con an HCML notation. necting the Port to the HCR. FIG. 10 is an example of modeling the Javeline using the As one aspect of the present invention, the HCI is the same HCML notation. class as a class diagram and stores hardware control register 30 FIGS. 11A and 11B are examples of modeling a timer information in a property and API information for control in function in functions of a heterogeneous MCU. a Method. FIG. 12 shows a UART as an HCR in the functions of the As one aspect of the present invention, the HCR as a heterogeneous MCU. module that abstracts a unique function of the hardware may FIG. 13 shows a notation of the HCML. define a role and a function of the hardware module and one 35 HCR includes one function. DETAILED DESCRIPTION As one aspect of the present invention, the Port may be able to set three output directions of in, out, and in/out and the Hereinafter, preferred embodiments will be described with output directions are set by input/output port register control. reference to accompanying drawings. As one aspect of the present invention, the HCI has a 40 FIG. 2 shows a 4-layer architecture of a hardware compo connotation association with the HCR and has anarchitecture nent profile. FIG. 2 is a schematic diagram showing how a that is shared by another HCR. hardware component profile designed as the HCML is As one aspect of the present invention, the step of defining applied to a model transformation procedure of the conven a model by using a meta-model of the HCML and represent tional MDD development method. ing architecture information on the model, comprises: 45 As shown in FIG. 2, the MDD-based model transformation defining a model by using the HCML meta-model; and includes a process of modeling Target Independent Model defining an Information layer by representing architecture (TIM) independently included in the hardware, a process of information on the model by describing a mapping associa structuring hardware information by using Meta Object tion of the defined model and the HCML meta-model as an Facility (MOF)-based Hardware Component Modeling Lan eXtensible Markup Language (XML). 50 guage (HCML), a process of transforming the TIM into a Hardware information to be used is required to maintain a Target Specification Model, which is dependently included in profile format to develop MDD-based embedded software the hardware, based on the structured hardware information (SW). Herein, Hardware Component Modeling Language and the model transformation language. The process of struc (HCML) as a modeling language for efficiently specifying the turing the hardware information includes a process of defin hardware profile used in a MDD-based model transformation 55 ing the meta-model of the MOF-based Hardware Component is suggested. The HCML represents graphic-based hardware Modeling Language (HCML), and a process of defining a information using a class diagram and a component diagram model by using the HCML meta-model and representing of a Unified Modeling Language (UML). A hardware com architecture information on the model. ponent is to abstract an actual hardware. A function of the Since the HCML meta-model is designed based on the component is represented by improving the class of the class 60 MOF, extension and transformation with an existing UML diagram of the UML. Also, since the HCML is developed diagram are easily performed. based on Meta Object Facility (MOF), it is interoperable with A model transformation language is required for trans a UML meta-model as well as ATLAS Transformation Lan forming the Target Independent Model (TIM), which is inde guage (ATL) organically. The HCML may be properly used pendent from the hardware, into the Target Specification for developing a firmware level software that a platform oran 65 Model (TSM), which is dependent on the hardware. Since the Operating System (OS) is not built. The hardware informa model transformation language helps transformation tion structuring method may be applied to automatic trans between models but does not provide hardware information, US 8,903,701 B2 5 6 a hardware profile is needed. If the hardware (HW) compo FIG. 4 shows an association between the HCP and the nent profile stores only data, it may be difficult to be used in meta-model and represents the HCP at a model level. FIG. 4 the model transformation language. Accordingly, the hard shows mapping with the meta-model such as HCP, HCR, ware information is structured by using the MOF-based Port, and ElementProperties. HCML. 5 An information layer may be defined through mapping FIG. 3 shows a MOF-based hardware component profile association of the meta-model and the model and it is meta-model. described as the XML as shown in Table 1 below. The The HCML meta-model as shown in FIG. 3 is preferen information described as the XML confirms that the architec tially required for modeling the hardware information. Main ture used in the meta-model is also used without change. constituent elements of the HCML are HW Component Pack 10 age (HCP), a Connector, HW Component Resource (HCR), a TABLE 1 Port, and HW Component Information (HCI). One hardware