Chapter 4 Memory Management
4.1 Basic memory management 4.2 Swapping 4.3 Virtual memory 4.4 Page replacement algorithms 4.5 Modeling page replacement algorithms 4.6 Design issues for paging systems 4.7 Implementation issues 4.8 Segmentation
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Memory Management
• Want memory that is – large – fast – non volatile
• Memory hierarchy – small amount of fast, expensive memory – cache – some medium-speed, medium price main memory – gigabytes of slow, cheap disk storage
• Memory manager handles the memory hierarchy
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1 Basic Memory Management Monoprogramming without Swapping or Paging
Three simple ways of organizing memory - an operating system with one user process 172
Multiprogramming with Fixed Partitions
• Fixed memory partitions – separate input queues for each partition – single input queue 173
2 Modeling Multiprogramming
Degree of multiprogramming
CPU utilization as a function of number of processes in memory 174
Analysis of Multiprogramming System Performance
• Arrival and work requirements of 4 jobs • CPU utilization for 1 – 4 jobs with 80% I/O wait • Sequence of events as jobs arrive and finish – note numbers show amout of CPU time jobs get in each interval 175
3 Relocation and Protection
• Cannot be sure where program will be loaded in memory – address locations of variables, code routines cannot be absolute – must keep a program out of other processes’ partitions
• Use base and limit values – address locations added to base value to map to physical addr – address locations larger than limit value is an error
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Swapping (1)
Memory allocation changes as – processes come into memory – leave memory
Shaded regions are unused memory 177
4 Swapping (2)
• Allocating space for growing data segment • Allocating space for growing stack & data segment 178
Memory Management with Bit Maps
• Part of memory with 5 processes, 3 holes – tick marks show allocation units – shaded regions are free • Corresponding bit map • Same information as a list 179
5 Memory Management with Linked Lists
Four neighbor combinations for the terminating process X
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Swapping: Free space
Key operation: search for a hole (and merge) • First Fit, Next Fit (worse) • Best Fit, Worst Fit (largest hole) • Quick Fit
• Info maintained on Bitmaps, Linked Lists
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6 virtual…
(…) 2. Existing in the mind, especially as a product of the imagination. (American Heritage) 1. Being actually such in almost every respect; "the once elegant temple lay in virtual ruin"; 2. Being such in essence or effect though not in actual fact; "a virtual dependence on charity"; "a virtual revolution"; "virtual reality." (ultralingua.net)
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Virtual Memory
• virtual addresses, space - logical/pages • real addresses, space - physical/frames Memory Management Unit (MMU) • translates logical to physical addresses • paging: assign a page (chunk of contiguous logical addresses) to a frame – supported by page table – variants, costs
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7 Virtual Memory Paging (1)
The position and function of the MMU
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Paging (2)
The relation between virtual addresses and physical memory addres- ses given by page table
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8 Page Tables (1)
Internal operation of MMU with 16 4 KB pages 186
Page Tables (2)
Second-level page tables
Top-level page table
• 32 bit address with 2 page table fields • Two-level page tables 187
9 Page Tables (3)
Typical page table entry
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TLBs – Translation Lookaside Buffers
A TLB to speed up paging
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10 Inverted Page Tables
Comparison of a traditional page table with an inverted page table
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Page Replacement Algorithms
• Page fault forces choice – which page must be removed – make room for incoming page
• Modified page must first be saved – unmodified just overwritten
• Better not to choose an often used page – will probably need to be brought back in soon
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11 Optimal Page Replacement Algorithm
• Replace page needed at the farthest point in future – Optimal but unrealizable
• Estimate by … – logging page use on previous runs of process – although this is impractical
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Not Recently Used Page Replacement Algorithm
• Each page has Reference bit, Modified bit – bits are set when page is referenced, modified • Pages are classified
1. not referenced, not modified
2. not referenced, modified
3. referenced, not modified
4. referenced, modified • NRU removes page at random – from lowest numbered non empty class
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12 FIFO Page Replacement Algorithm
• Maintain a linked list of all pages – in order they came into memory
• Page at beginning of list replaced
• Disadvantage – page in memory the longest may be often used
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Second Chance Page Replacement Algorithm
• Operation of a second chance – pages sorted in FIFO order – Page list if fault occurs at time 20, A has R bit set (numbers above pages are loading times) 195
13 The Clock Page Replacement Algorithm
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Least Recently Used (LRU)
• Assume pages used recently will used again soon – throw out page that has been unused for longest time
• Must keep a linked list of pages – most recently used at front, least at rear – update this list every memory reference !!
• Alternatively keep counter in each page table entry – choose page with lowest value counter – periodically zero the counter
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14 Simulating LRU in Software (1)
LRU using a matrix – pages referenced in order 0,1,2,3,2,1,0,3,2,3 198
Simulating LRU in Software (2)
• The aging algorithm simulates LRU in software • Note 6 pages for 5 clock ticks, (a) – (e)
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15 The Working Set Page Replacement Algorithm (1)
• The working set is the set of pages used by the k most recent memory references • w(k,t) is the size of the working set at time, t 200
The Working Set Page Replacement Algorithm (2)
The working set algorithm
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16 The WSClock Page Replacement Algorithm
Operation of the WSClock algorithm 202
Review of Page Replacement Algorithms
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17 Modeling Page Replacement Algorithms Belady's Anomaly
• FIFO with 3 page frames • FIFO with 4 page frames • P's show which page references show page faults 204
Stack Algorithms
7 4 6 5
State of memory array, M, after each item in reference string is processed 205
18 The Distance String
Probability density functions for two hypothetical distance strings
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The Distance String
• Computation of page fault rate from distance string – the C vector – the F vector
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19 Design Issues for Paging Systems Local versus Global Allocation Policies (1)
• Original configuration • Local page replacement • Global page replacement 208
Local versus Global Allocation Policies (2)
Page fault rate as a function of the number of page frames assigned 209
20 Load Control
• Despite good designs, system may still thrash
• When PFF algorithm indicates – some processes need more memory – but no processes need less
• Solution : Reduce number of processes competing for memory – swap one or more to disk, divide up pages they held – reconsider degree of multiprogramming
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Page Size (1)
Small page size • Advantages – less internal fragmentation – better fit for various data structures, code sections – less unused program in memory • Disadvantages – programs need many pages, larger page tables
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21 Page Size (2)
Overhead due to page table and internal fragmentation overhead = s e / p + p / 2 optimal page size - p = √2se internal s = average process size in bytes fragmentation p = page size in bytes page table space e = 1 page entry in bytes e.g., s = 1MB, e = 8B, p=4KB
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Separate Instruction and Data Spaces
• One address space • Separate I and D spaces 213
22 Shared Pages
Two processes sharing same program sharing its page table
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Shared Pages (2)
• Easy with separate Instruction / Data spaces • Problem: eviction of a process might evict its shared pages - need to know (GC anyone)? • Share Data pages? cf. Unix’s fork – each proc its page table, same pages, readonly – when a proc writes: trap. “copy on write” • Anyway, always need free frames
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23 Cleaning Policy
• Need for a background process, paging daemon – periodically inspects state of memory
• When too few frames are free – selects pages to evict using a replacement algorithm
• It can use same circular list (clock) – as regular page replacement algorithmbut with diff ptr
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Virtual Memory Interface
• VM usually “transparent” (to whom?) Alternative: programmers see memory map • specify that processes share memory – share memory = high bandwidth (problems?) – message passing: map/unmap pages
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24 Implementation Issues Operating System Involvement with Paging Four times when OS involved with paging 1. Process creation
- determine program size
- create page table 2. Process execution
- MMU reset for new process
- TLB flushed 3. Page fault time
- determine virtual address causing fault
- swap target page out, needed page in 4. Process termination time
- release page table, pages 218
Page Fault Handling (1)
1. Hardware traps to kernel Save PC on Stack, possible instruction state in CPU reg 2. General registers saved Assembly routine saves CPU registers, calls OS 3. OS determines which virtual page needed Possibly inspect instruction 4. OS checks validity of address, seeks page frame If invalid, kill process; if no free frame, choose victim 5. If selected frame is dirty, write it to disk Suspend faulting process, run another while I/O completes
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25 Page Fault Handling (2)
6. OS schedules I/O to bring new page in from disk
7. Page tables updated
8. Faulting instruction backed up to when it began
9. Faulting process scheduled
10. Registers restored; Program continues
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Other Implementation Issues
• Instruction rollback (backup) • Locking pages in memory (pinning) • Backing store (static / dynamic) • Memory Manager at User Level – Separation of Policy and Mechanism
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26 Instruction Backup
An instruction causing a page fault
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Locking Pages in Memory
• Virtual memory and I/O occasionally interact • Proc issues call for read from device into buffer – while waiting for I/O, another processes starts up – has a page fault – buffer for the first proc may be chosen to be paged out • Need to specify some pages locked – exempted from being target pages
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27 Backing Store
(a) Paging to static swap area (b) Backing up pages dynamically 224
Separation of Policy and Mechanism
Page fault handling with an external pager
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28 Segmentation (1)
• One-dimensional address space with growing tables
• One table may bump into another 226
Segmentation (2)
Allows each table to grow or shrink, independently 227
29 Segmentation (3)
• Segment: Linear sequence of addresses • Each can grow/shrink independently • Addresses: (segment #, address within it) • All segments start at 0 (simpler to gen.) • Distinct protections, shared libraries easier Consider paging versus segmentation issues – size, fragmentation, relocation…
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Segmentation (4)
Comparison of paging and segmentation 229
30 Implementation of Pure Segmentation
(a)-(d) Development of checkerboarding
(e) Removal of the checkerboarding by compaction230
MULTICS segmentation/paging
• 2^18 segments, each 65536 words long • each segment a virtual memory (so paged) – paging: uniform page size, ability to keep some of it off main memory – segmentation: easier programming, protection, sharing - modularity. • each program has a segment table (itself a paged segment!)
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31 Segmentation with Paging: MULTICS (1)
• Descriptor segment points to page tables
• Segment descriptor – numbers are field lengths232
Segmentation with Paging: MULTICS (2)
A 34-bit MULTICS virtual address
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32 MULTICS memory reference 1. segment # points to segment descriptor 2. check if segm page table is in memory, if not a segment fault happens; protection also checked 3. check page table entry for page; if not in memory, page fault. 4. Offset is added, read/store happens
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Segmentation with Paging: MULTICS (3)
Conversion of a 2-part MULTICS address into a main memory address 235
33 Segmentation with Paging: MULTICS (4)
• Simplified version of the MULTICS TLB
• Existence of 2 page sizes makes actual TLB more complicated 236
Segmentation with Paging: Pentium (1)
A Pentium selector
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34 Segmentation with Paging: Pentium (2)
• Pentium code segment descriptor • Data segments differ slightly 238
Segmentation with Paging: Pentium (3)
Conversion of a (selector, offset) pair to a linear address
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35 Segmentation with Paging: Pentium (4)
Mapping of a linear address onto a physical address
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Segmentation with Paging: Pentium (5)
Level Protection on the Pentium
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