MultiWriterTM On-Board Programming

Higher Throughput. Lower Cost. Solving the ISP Productivity Bottleneck.

The ISP Challenge ming on-board ISP devices. The MultiWriter Reduces Cost bed-of-nails (BoN) fixture provides While Multiplying Throughput in Circuit Board ready access to the device and when Assembly and Test appropriately equipped, ICT channel cards are architecturally suited to ISP The MultiWriter™ ISP System is programming functions. However, the logical in-line, ICT-based ISP As product life cycles shorten and ICT systems are expensive—even programming solution to the pro- cost pressures mount, circuit design- more so when equipped with ISP ductivity dilemma. Integrated with ers are using In-System Program- mable (ISP) devices such as embed- ded microcontrollers, serial Flash and FPGAs on just about every type of board. ISP chips let designers add enhanced features to new products ICT Stim/Measure with minimal hardware redesign. and Power

ISP design proliferation means that Bed-of-Nails Test Fixture Control and data signals the chips must be programmed USB HASP* before or after they are soldered to MultiWriter Control Board(s) the board. Logistics and inventory USB HUB considerations almost always point to programming the ISP chip after it’s been attached to the board. PC with Windows OS

Unfortunately, today’s existing ISP programming solutions are almost ICT Test Program always too slow, too expensive—or both—for high-volume manufac- * USB HASP contains device programming algorithms, turing. This is especially true when encrypted device data les, and control setup manufacturing multi-board panel assemblies, which are increasingly popular in today’s PCB assembly Installing the ISP Control Module and one or more buffer modules inside the test environment of high volumes and fixture adds complete ISP programming capability to the Analyst in-circuit tester. shrinking board sizes. No expensive tester-based hardware is required. Most dedicated chip programmers are not an option because they do programming capability. Add in the CheckSum’s Analyst™ low-cost ICT, not meet the requirements of high- high-priced BoN fixturing required MultiWriter solves the productiv- speed assembly lines. Typically, they by these testers, and the increased ity bottleneck by programming can program only one device at a throughput offered by traditional multiple ISP chips simultaneously time and are simply too slow to ICTs often comes at too high a cost. at near data-book speeds—all at a keep up with the line beat rate. substantially lower price point than The manufacturing engineer’s other ICT-based approaches. This Many production engineers have dilemma is stark: one way or the advanced design delivers a signifi- turned to in-circuit testers (ICT) other, today’s in-line ISP solutions cant throughput advantage over as an ideal platform for program- are a productivity bottleneck. both standalone ISP programmers and traditional in-circuit testers–in The MultiWriter design approach is MultiWriter’s Throughput Speed: both overall throughput and serial far more economical than that of How Fast Is It? programming speed. traditional in-circuit test systems, which rely on expensive channel The primary design goal of the MultiWriter MultiWriter uses unique, patented† cards to deliver ISP programming ISP System is to enhance throughput technology to program up to 384 functionality. In addition, with Mul- where it matters most–in the production serial bus ISP devices simultane- tiWriter, ISP programming capability line. Here’s an example of MultiWriter’s programming time for a single device or ously in a single pass. Whether can be added on a project or per- several chips simultaneously.* you have a single chip on a single board basis, providing more flexibil- board or multiple chips per board ity. The flexible architecture of the Device Type: 25LC640 Serial EEPROM on a multiple-board assembly or any Analyst ICT system enables Check- Memory Size: 8K Byte combination in between, the total Sum to respond to customers’ needs Serial Bus type: SPI at 2 MHz programming time will be identical. and adapt to changing technologies. In addition, MultiWriter programs Benchmark Results: serial Flash, EEPROMS, embedded microcontrollers, and FPGAs at near- Programming Time for a Single Device: data book speeds. Software Overhead: 1.16 Seconds Programming Time: 0.65 Seconds MultiWriter ISP TOTAL 1.81 Seconds Following CheckSum’s design philos- ophy of developing straightforward Programming Four Devices Programmed in Parallel: products that simplify customer Software Overhead: 1.16 Seconds processes and reduce manufactur- Structure & Process Programming Time (4-Up): 0.69 Seconds ing cost, MultiWriter is the first TOTAL 1.85 Seconds ICT-based ISP system designed spe- Board Design Considerations cifically for popular serial-bus pro- Verification Time for a Single Device: gramming protocols. Working inte- As is the case in most designs, the Software Overhead: 1.16 Seconds Verification Time: 0.10 Seconds grally with CheckSum’s Analyst™ ICT circuit design must allow in-system TOTAL 1.26 Seconds product line, MultiWriter reduces programming such that the device cost because it eliminates the can be programmed without the Verification Time for Four Devices in hardware and software overhead requirement to overdrive other sig- Parallel: and complexity required for rarely nals. The ISP device programming Software Overhead: 1.16 Seconds needed parallel-bus programming. pins must be accessible via a bed-of- Verification Time: 0.10 Seconds In addition, serial-bus programming nails fixture—just like any other in- TOTAL 1.26 Seconds is the key to achieving program- circuit test point. ming speeds that are essentially the * Many factors can affect actual through- put; actual results will vary. fastest cited in the part’s published The board or multi-board panel specification sheet. assembly layout should provide electrical access to the programming Example Devices That Can Be MultiWriter’s unique hardware pins that are as physically close as Programmed by MultiWriter and software architecture not possible to the device being pro- only reduces cost while multiply- grammed in order to minimize cross- • I2C Serial EEPROMs (e.g. 24LC00) ing throughput it also simplifies talk and noise. Microchip, Atmel application. CheckSum provides ISP • SPI Serial EEPROMs (e.g. M95256) programming capability by putting STMicroelectronics it into the fixture, rather than in the • Microwire – (e.g. 93LC32) Microchip test system. MultiWriter hardware Device Programming • JTAG programming, CPLDs from resides right in the Analyst BoN test Atmel, Xilinx, Altera and Lattice Considerations fixture—eliminating the need for (e.g. Xilinx XC9572, Altera EPM3064) • Flash Microcontrollers: complex and expensive system chan- Microchip (e.g. PIC16F877, PIC18F248) nel cards and shortening signal path MultiWriter allows unique data such Atmel AVR (e.g. A T90S8535) length for improved signal integrity. as a date code or serial number for Atmel ATmega (e.g. ATmega32) Its application library includes bus the parts to be programmed with Atmel ATtiny (e.g. ATtiny15) algorithms for a host of popular ISP minimal impact on programming STMicro ST7 STM8, STM32 device families. time. The part serial number or Hitachi H8 other data such as an assembly serial Renesas H8S, M16, R8C family Like CheckSum’s Analyst ICT systems, number entered via bar code can be Freescale HC908, HC912, and Star12 every aspect of MultiWriter is aimed stored in a file or provided at run- TI TMS470, MSP430 NEC 78K, V850 a single goal: increasing manufactur- time. Calibration or other measure- ing productivity and reducing cost. ment data can be programmed into

† MultiWriter Technology is protected under U.S. Patent No. 7,802,021. each part separately. Since unique the MutliWriter controller places data is typically a very small portion the chip in the “read” state and the Low-Cost ICT: Save Money by of the overall part memory, the pro- code just programmed is verified. Reducing Complexity gramming time for chip-unique data The Program and Verify operations In the late 1980s, when cell phones were the size will be minimal. can occur on a Test Step basis. of shoeboxes and PDAs existed in imagination only, test engineers relied on high-capability in-circuit testers (ICT) like the HP (now Agilent) 3070 and A standard data file format (INTEL The board assembly (or individual the GenRad 2280-Series. Test engineers needed hex, Motorola S-Record, SVF, STAPL) panel in a multi-up assembly) will be ICT loaded with every possible test technique and capability in order to find a wide variety of analog is used for storage of unique data powered-up to program the part, and digital faults in processes whose yields were that is accessed during the ISP pro- so a sufficient board power source frequently less than 75%. gramming process. must be available at the test system. Circuit boards and the manufacturing processes that build them have come a long way since then. Today, SMT is the norm, and complex mixed- The MultiWriter Controller board technology chips like SOC occupy smaller, denser has two operating modes: Program Smart ISP. MultiWriter’s Smart boards. Process yields are routinely 95%. The fault and Verify. In Program mode, the ISP™ technology ensures that the spectrum has shifted from shorts to opens, with controller places the ISP chip in the ISP programming phase follows fewer analog faults and almost no digital defects. “program” state and code appropri- a defect-free in-circuit test of the ate to the device is retrieved from board. The test system programs The Problem with Using “Big Iron” ICT in the computer memory and applied only boards that have passed the Today’s Processes via the fixture-based buffer boards. in-circuit tests. Only assemblies that Despite these major changes in device, board, and process technologies, many test engineers still Once chip programming is complete, have passed the opens/shorts and insist on using traditional “big iron” ICT for every other component tests project and every board. This is true even though are powered-on. For today’s boards rarely require capabilities such as high-accuracy analog and digital backdrive. Why? example, if a panel has The low failure rates of today’s “jellybean” ICs has seven tested-good assem- made digital backdrive tests effectively superfluous, blies out of eight total (as and vector-based tests for complex ICs such as SOCs are exorbitantly expensive and time- consuming illustrated in the figure (and frequently impossible) to write. As a result, left), then only those the actual test programs that run on a traditional seven will be powered-on ICT today almost always exclude complex analog or digital tests. Nevertheless, many test engineers for ISP device program- argue that the extra capabilities are an insurance ming. policy—there when needed “just in case.” It may seem that having for this extra “tester 384 insurance” makes sense, but the insurance comes with a price. Even when their excess capability is left unused, “big iron” testers cost more to own and operate. The inherent complexity of fixtures, programs, and maintenance for these systems still drives up costs significantly—even when the tester itself is “free.” Estimates place the annual excess cost of using traditional ICT instead of lower-cost testers at more than $250 million in North America alone. This is money that is spent needlessly when excess tester capability is not matched to the reality of higher yields and today’s new fault spectrum.

The CheckSum Difference CheckSum’s Analyst low-cost ICT systems match the requirements and the fault spectrum of today’s higher-yield processes. Unnecessary and unused capabilities—and their associated complexity and costs—are omitted. Not only is the price of Analyst systems a fraction of traditional ICT, more impor- tantly, ongoing operating costs (fixtures, programs, and support) are typically 50% less. Our focus on minimizing fixture cost and simplifying program- ming saves money each time a new test job comes ISP programming follows a power-off in-circuit test. Smart on line. Electronics manufacturers who switch over ISP™ ensures that board power is applied only to those to CheckSum systems find the cost savings to be boards in a multi-board panel assembly that have passed immediate and dramatic. the in-circuit test, ensuring that components are not inad- MultiWriter carries CheckSum’s cost-saving vertently damaged. Standard code for all ISP parts is pro- philosophy into the realm of on-board ISP pro- grammed simultaneously followed by chip-unique program gramming: omitting superfluous capability while code on a per-device basis. maximizing productivity across each board and each project. Key Features & Benefits and all combinations in between, are Specifications programmed simultaneously. System Computer Interface ICT-based in-line ISP programming  Flexible code verification can be  USB 1.1 or USB 2.0. Recommend USB at lower cost: performed after all programming is 2.0 for max. speed and throughput. complete or on a step-by-step basis.   MultiWriter ISP programming and Requires CheckSum Analyst ems test verification is part of a fully-integrated  Boards need not be de-paneled prior system software running in a system that also includes the bed-of- to programming ISP devices. Windows OS environment. nails fixture and in-circuit test program Comprehensive device and bus Supported Part Families with Serial in a complete, ready-to-run package. algorithm library Programming Bus Algorithms  Designed for high-volume produc-  Currently supported bus algorithms  24LCXX (I2C) and 25LCXX (SPI) tion environments, the MultiWriter include I2C, SPI, Microwire, JTAG, and  93CXX (Microwire) system employs the same process used PIC, with more under development.  Atmel ATmega and ATtiny families on today’s traditional in-circuit testers  MultiWriter’s architecture supports  Cypress CY8C21XXX/C24XXX (ISSP) to program ISP devices after they’ve user-defined algorithms, as well.  Microchip PIC 12F, 16F, 18F, dsPIC30F been soldered to the board—but at a Smart ISP™ ensures failed boards are  Freescale HC908, HC912, Star12 (UART/ fraction of the system, fixturing, and not programmed—even when part of BDM) & MPC5X (JTAG) programming costs. a multi-up assembly.  STMicro M24/25, M34/35, M93/95, ST7,  With CheckSum’s Smart ISP technol- STM8, STM32 (SWIM/JTAG/USART) ogy, there’s no possibility of damag-  Hitachi H8 and Renesas H8S, M16, R8C ing expensive components. Power is family (USART/UART) applied only to boards or individual  TI TMS470, MSP430 boards within a multi-board panel  NEC 78K0, V850 and Xilinx CoolRunner assembly that has passed the ICT II/XPLA3 CPLD family opens/shorts and other component  Zilog Z8 family tests. ISP Controller Board  Controller board is connected to com- Analyst Unique data may be programmed on ems www.CheckSum.com - made in USA a per-device basis—even on panelized puter via USB 2.0, which also powers boards. the board. Requires “high power” USB  MultiWriter handles data unique to 2.0 rated hub. Board draws approxi- each device such as serial number or mately 150 mA unloaded. board calibration information  Board dimensions: Approximately  Data collected on-the-fly at earlier 3” x 5.5” / 8 cm x 14 cm, mounted in test stages may be manipulated (i.e., bed-of-nails test fixture. The MultiWriter ISP System is appropriate for calculations performed) and then ISP Buffer Board circuit boards and multi-board panel assemblies programmed directly into the device  Driver Voltage: 3.3V or resistor requiring on-board code programming and veri- fication of serial bus ISP devices. MultiWriter during the same test sequence. programmable for lower voltages is available only as an integrated element of a Fixture-mounted buffer boards ensure  Nominal output impedance: CheckSum-developed application package that 200 Ohms (buffer to device) includes a bed-of-nails fixture and associated test the highest signal quality.  Nominal sensor input impedance: program operating on an Analyst in-circuit test  A buffer board associated with each system. device to be programmed delivers >100K Ohms (device to buffer) clean signals and state conditioning  Twisted pair wiring between buffer MultiWriter is the first ISP programming at the highest possible programming driver/sensor and device. system integrated right into the bed-of-  speed. Buffer board nominal power supply nails fixture.  Buffer boards are mounted right requirement: +12V, +5V (usually pro-  Fixture-based architecture delivers in the fixture, eliminating cabling vided by PWR-2 Module). maximum flexibility at the lowest pos-  problems and ground return issues for Driver/sensor buffer boards are sible cost. noise-minimized reliability. mounted in a bed-of-nails test fixture.  Eliminates the requirement for expen-  Buffer board: Single 2.125” x 2.125” sive tester channels and long signal User Data Protection Encryption Option (5.4 cm x 5.4 cm), 4-up 2.125” x 8.75” paths.  An optional data protection encryp- (5.4 cm x 22.23 cm) tion software package is available Simultaneous device programming that makes the contents of the device  Up to 384 ISP devices* whether on file not readable without the encryp- a single board or distributed across CheckSum LLC tion key. This protection system also 6120 195th Street NE multiple boards in a panel assembly, prevents production personnel from Arlington, WA 98223 Tel: 1 – 877 – CHECKSUM modifying the device data. Tel: +1 360 435 5510 Fax: +1 360 435 5535 * Up to 16 MultiWriter control modules with up to 24 buffer modules each for 384 maximum devices. www.checksum.com One MultiWriter control module required for each unique device bus algorithm. Analyst, CheckSum, MultiWriter, and Smart ISP are trademarks of CheckSum LLC. Other product names are trademarks of their respective manufacturers.

@2015 CheckSum LLC. All rights reserved. Printed in the USA. 20150113